This commit is contained in:
Mahesh Balasubramanian (Student) 2021-09-29 11:34:27 -07:00
commit c635a805f9
20 changed files with 4868 additions and 537 deletions

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@ -1,6 +1,8 @@
#include <stdio.h>
#include <stdlib.h>
<<<<<<< HEAD
=======
/*int sum(int count){
int ret=0;
//int vec[10] = {1,2,3,4,5,6,7,8,9,10};
@ -12,6 +14,7 @@
return ret;
}*/
>>>>>>> 5f2c8bc0fcd0b4b59a263992775796f8c7c9371d
/*int power(int base, int pow){
if(pow == 0) return 1;
printf("Base = %d - Pow = %d\n", base, pow);
@ -19,12 +22,20 @@
#pragma CGRA
for(int i = 1; i < pow; i++)
ret *= base;
<<<<<<< HEAD
return ret;
}*/
=======
return ret;
}*/
>>>>>>> 5f2c8bc0fcd0b4b59a263992775796f8c7c9371d
int main(int argc, char *argv[])
{
int pow = atoi(argv[1]);
<<<<<<< HEAD
int ret = 1;
=======
int base = 2;
if(pow == 0) return 1;
printf("Base = %d - Pow = %d\n", base, pow);
@ -32,7 +43,12 @@ int main(int argc, char *argv[])
#pragma CGRA
for(int i = 1; i < pow; i++)
ret *= base;
>>>>>>> 5f2c8bc0fcd0b4b59a263992775796f8c7c9371d
//int ret = sum(pow);
#pragma CGRA
for(int i = 1; i < pow; i++)
ret *= 2;
printf("***** %d^%d = %d *****\n", 2, pow, ret);

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@ -0,0 +1,14 @@
X,4
Y,4
R,4
IC,0
Cclock,0.7
CPUclock,2
Mem,8GB
MODE,0
ALGO,FalconCrimson
MSA,10
MAPII,10
MAX_MAP,1000
MAX_II,50
LAMBDA,0.02
1 X 4
2 Y 4
3 R 4
4 IC 0
5 Cclock 0.7
6 CPUclock 2
7 Mem 8GB
8 MODE 0
9 ALGO FalconCrimson
10 MSA 10
11 MAPII 10
12 MAX_MAP 1000
13 MAX_II 50
14 LAMBDA 0.02

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@ -0,0 +1,11 @@
FILE1 = pow.c
all: pow
CC = cgracc
ARMCC = arm-linux-gnueabi-gcc
LIB = -lm
pow: ${FILE1} Makefile
$(CC) -static -O3 ${FILE1} -o pow
clean:
rm -rf pow CGRAExec m5out *.bc *.ll

4739
benchmarks/pow_func/out Normal file

File diff suppressed because it is too large Load Diff

33
benchmarks/pow_func/pow.c Normal file
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@ -0,0 +1,33 @@
#include <stdio.h>
#include <stdlib.h>
/*int sum(int count){
int ret=0;
//int vec[10] = {1,2,3,4,5,6,7,8,9,10};
#pragma CGRA
for(int i=0; i<count; i++)
ret += i;
return ret;
}*/
int power(int base, int pow){
if(pow == 0) return 1;
printf("Base = %d - Pow = %d\n", base, pow);
int ret = base;
#pragma CGRA
for(int i = 1; i < pow - 1; i++)
ret *= base;
return ret;
}
int main(int argc, char *argv[])
{
int pow = atoi(argv[1]);
int ret = power(2, pow);
//int ret = sum(pow);
printf("***** %d^%d = %d *****\n", 2, pow, ret);
}

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@ -74,6 +74,10 @@ Datatype CGRA_PE::GetDatatype()
return dt;
}
bool CGRA_PE::isNOOP(){
return ins->getOpCode() == NOOP;
}
void CGRA_PE::Decode()
{
DPRINTF(PE_DEBUG, "Inside Decode()\n");
@ -419,8 +423,7 @@ void CGRA_PE::IExecute()
{
//write the result to the controller bus
//(this->Controller_Reg) = !((Input1 == 1) && (Input2 == 0));
(this->Controller_Reg) = Output;
DPRINTF(CGRA_Detailed, "Controller_Reg reset\n");
(this->Controller_Reg) = !Output;
}
}
else
@ -1134,9 +1137,7 @@ onehopy2In = OneHopY2;
void CGRA_PE::SetController_Reg()
{
DPRINTF(PE_DEBUG, "Inside Set_cntrl_Reg()\n");
Controller_Reg = true;
DPRINTF(PE_DEBUG, "Exiting Set_cntrl_Reg()\n");
}
bool CGRA_PE::getController_Reg()

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@ -19,6 +19,7 @@
#include "CGRAFPRegisterFile.h"
#include "CGRAInstruction.h"
#include "debug/PE_DEBUG.hh"
#include "debug/CGRA_Execute.hh"
//#include "CGRA_MemoryPort.h"
#ifndef PE_H_
@ -145,7 +146,9 @@ public:
void setAddressBus(uint64_t * addr);
void setRWStatusBus(int * status);
void setAlignmentBus(unsigned *alignment);
void setDatatypeBus(int * dt);
void setDatatypeBus(int * dt);
bool isNOOP();
};

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@ -49,6 +49,7 @@ if 'AtomicCGRA' in env['CPU_MODELS']:
DebugFlag('Register_Debug')
DebugFlag('Instruction_print')
DebugFlag('Conditional_DEBUG')
DebugFlag('Cycles')
Source('CGRAException.cpp')
Source('CGRAInstruction.cpp')
#Source('CGRADecoder.cpp')

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@ -65,12 +65,14 @@
#include "debug/ExecFaulting.hh"
#include "debug/SimpleCPU.hh"
#include "debug/Instruction_print.hh"
#include "debug/Cycles.hh"
#include "params/AtomicCGRA.hh"
using namespace std;
using namespace TheISA;
volatile unsigned long cgraCycles = 0;
unsigned long debugCycles = 0;
void
AtomicCGRA::init()
@ -333,6 +335,7 @@ AtomicCGRA::activateContext(ThreadID thread_num)
threadInfo[thread_num]->thread->lastSuspend);
numCycles += delta;
cgraCycles += delta;
debugCycles += delta;
if (!tickEvent.scheduled()) {
//Make sure ticks are still on multiples of cycles
@ -985,8 +988,8 @@ void AtomicCGRA::CGRA_Execution(SimpleExecContext& t_info)
Len--;
{
_status = BaseCGRA::Running;
numCycles++;
cgraCycles++;
//numCycles++;
//cgraCycles++;
// DPRINTF(CGRA_Execute, "CGRA.CGRA_Exec(): numCycles = %d\n", numCycles);
//DPRINTF(CGRA_Detailed, "CGRA.Exec(): numCycles = %d\n", numCycles);
//printf("CGRA.Exec(): numCycles = %d\n", numCycles);
@ -1039,10 +1042,10 @@ void AtomicCGRA::CGRA_Execution(SimpleExecContext& t_info)
cgra_PEs[i * CGRA_YDim + j].FExecute();
//else if(cgra_PEs[i * CGRA_YDim + j].GetDatatype() == float64)
// cgra_PEs[i * CGRA_YDim + j].DExecute();
Conditional_Reg = (Conditional_Reg & cgra_PEs[i * CGRA_YDim + j].getController_Reg() );
DPRINTF(CGRA_Detailed, "Conditional reg is %d : Len = %d\n", Conditional_Reg, Len);
if(!Conditional_Reg && Len==0) DPRINTF(CGRA_Detailed, "Conditional_Reg reset -> moving to EPILOG\n");
if(!cgra_PEs[i * CGRA_YDim + j].isNOOP())
Conditional_Reg = (Conditional_Reg & cgra_PEs[i * CGRA_YDim + j].getController_Reg());
DPRINTF(CGRA_Detailed, "Conditional reg is %d : Len = %d\n", Conditional_Reg, Len);
}
}
@ -1058,10 +1061,7 @@ void AtomicCGRA::CGRA_Execution(SimpleExecContext& t_info)
Conditional_Reg = 0;
else
Conditional_Reg = 1;
}
else
{
;
DPRINTF(CGRA_Detailed, "Conditional reg is %d : Len = %d\n", Conditional_Reg, Len);
}
//*********WRITE BACK********************
@ -1084,7 +1084,7 @@ void AtomicCGRA::CGRA_Execution(SimpleExecContext& t_info)
printf("\n************* MEM READ *************\n");
printf("Row: %d - address: %d - data: %d\n", i, MemAddress[i], MemData[i]);
//x_dim=0;
MemBusStatus[i] == CGRA_MEMORY_RESET;
MemBusStatus[i] = CGRA_MEMORY_RESET;
}
else if (MemBusStatus[i] == CGRA_MEMORY_WRITE)
{
@ -1130,9 +1130,9 @@ void AtomicCGRA::CGRA_Execution(SimpleExecContext& t_info)
}
MemAccessCount++;
//x_dim=0;
MemBusStatus[i] == CGRA_MEMORY_RESET;
MemBusStatus[i] = CGRA_MEMORY_RESET;
}
MemBusStatus[i] == CGRA_MEMORY_RESET;
MemBusStatus[i] = CGRA_MEMORY_RESET;
}
CGRA_advanceTime();
@ -1203,12 +1203,12 @@ AtomicCGRA::tick()
Tick latency = 0;
for (int i = 0; i < width || locked; ++i) {
if(!is_CPU())
numCycles++;
debugCycles++;
DPRINTF(Cycles, "numCycles = %d\n", debugCycles);
if(!is_CPU())
{
numCycles++;
cgraCycles++;
//DPRINTF(CGRA_Execute, "CGRA.Tick(): numCycles = %d\n", numCycles);
//printf("CGRA.Tick(): numCycles = %d\n", numCycles);
updateCycleCounters(BaseCPU::CPU_STATE_ON);
}
@ -1652,8 +1652,12 @@ void AtomicCGRA::Setup_CGRA_Parameters()
std::ostringstream osLoopID;
osLoopID << TotalLoops;
// Need to modify this for multiple performance critical loops
std::string directoryPath = "./CGRAExec/L1/initCGRA.txt";
ifstream execLoop;
execLoop.open("./CGRAExec/LoopID.txt");
std::string loopID;
execLoop >> loopID;
std::string directoryPath = "./CGRAExec/" + loopID + "/initCGRA.txt";
unsigned long temp;
ifstream initCGRAFile;
@ -1695,7 +1699,7 @@ void AtomicCGRA::Setup_CGRA_Parameters()
if(KernelCounter <= 0) isTCdynamic = true;
DPRINTF(CGRA,"CGRA PARAMETERS: PROLOG= %d, EPILOG=%d, II=%d, KernelCounter=%d\n",Prolog,EPILog,II,KernelCounter);
DPRINTF(CGRA_Execute,"CGRA PARAMETERS: PROLOG= %d, EPILOG=%d, II=%d, KernelCounter=%d\n",Prolog,EPILog,II,KernelCounter);
DPRINTF(CGRA_Execute,"CGRA PARAMETERS: PROLOG= %d, EPILOG=%d, II=%d, KernelCounter=%d TCdynamic=%d\n",Prolog,EPILog,II,KernelCounter,isTCdynamic);
DPRINTF(CGRA,"CGRA PARAMETERS: PROLOGPC= %lx, EPILOGPC=%lx, KernelPC=%lx\n",(unsigned int)PROLogPC,(unsigned int)EPILogPC,(unsigned int)KernelPC);
DPRINTF(CGRA_Execute,"CGRA PARAMETERS: PROLOGPC= %lx, EPILOGPC=%lx, KernelPC=%lx\n",(unsigned int)PROLogPC,(unsigned int)EPILogPC,(unsigned int)KernelPC);
}
@ -1775,7 +1779,7 @@ void AtomicCGRA::CGRA_advancePC(SimpleThread* thread)
}
else if(state==KERN)
{
if(Conditional_Reg)
if(Conditional_Reg && cgraCycles <= 100) // cap iterations at 100 cycles -> FOR INF LOOP DEBUG ONLY
{
Len=II;
newPC=KernelPC;

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@ -555,13 +555,13 @@ BaseCGRA::preExecute()
//If we decoded an instruction this "tick", record information about it.
if (curStaticInst) {
#if TRACING_ON
//#ifdef TRACING_ON
traceData = tracer->getInstRecord(curTick(), thread->getTC(),
curStaticInst, thread->pcState(), curMacroStaticInst);
DPRINTF(Decode,"Decode: Decoded %s instruction: %#x\n",
curStaticInst->getName(), curStaticInst->machInst);
#endif // TRACING_ON
curStaticInst->getName(), curStaticInst->machInst);
//#endif // TRACING_ON
}
if (branchPred && curStaticInst &&

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@ -5,7 +5,7 @@
#Expected arguments or inputs - .c or .cpp files
#Set Paths
ccf_root="/home/local/ASUAD/quoclon1/ccf2_git/CCF-20.04"
ccf_root="/home/local/ASUAD/quoclon1/ccf9_27"
install_path="/home/local/ASUAD/quoclon1/sw"
obj="obj"
objFound=0;

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@ -149,18 +149,26 @@ int configureCGRA(unsigned int loopID)
if(kernelCount <= 0)
{
int newTC = kernelCount + dynamicTCVal;
printf("newTC = %d + %d\n", kernelCount, dynamicTCVal);
*(initCGRA + 7*(loopID-1) + 5) = newTC;
}
char initCGRAfile[40] = "./CGRAExec/L1";
strcat(initCGRAfile,"/initCGRA.txt");
count = fopen(initCGRAfile, "wb");
//char initCGRAfile[40] = "./CGRAExec/L1";
//strcat(initCGRAfile,"/initCGRA.txt");
//count = fopen(initCGRAfile, "wb");
strcat(directoryPath,"/initCGRA.txt");
count = fopen(directoryPath, "wb");
for(i=0; i<7; i++)
fprintf(count, "%d\n", *(initCGRA + 7*(loopID-1) + i));
fprintf(count, "%ld\n", (unsigned long long) epilogPtr[loopID-1]);
fprintf(count, "%ld\n", (unsigned long long) prologPtr[loopID-1]);
fprintf(count, "%ld\n", (unsigned long long) kernelPtr[loopID-1]);
fclose(count);
FILE* execLoop = fopen("./CGRAExec/LoopID.txt", "wb");
fprintf(execLoop, "L%d", loopID);
fclose(execLoop);
//printf("Exiting cgra.c configureCGRA\n");
return 0;

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@ -1,252 +0,0 @@
// Author: Shail Dave
#include "cgra.h"
#include <string.h>
#include <limits.h>
#define DEBUG 1
//#define usleep(time) myusleep(time)
//pthread_mutex_t mutex;
int initializeParameters(unsigned int loopID)
{
if(DEBUG) printf("from cgra.c Initialize Parameters\n");
unsigned int i=0;
*(initCGRA + 7*(loopID-1)) = 0x77e00000;
*(initCGRA + 7*(loopID-1) + 1) = 0x77e00000; //1st instruction, 0xe7e00000 is the opcode for no operation
*(initCGRA + 7*(loopID-1) + 2) = 0; //II
*(initCGRA + 7*(loopID-1) + 3) = 0; //Epilog length
*(initCGRA + 7*(loopID-1) + 4) = 0; //Prolog length
*(initCGRA + 7*(loopID-1) + 5) = 0; //KERNEL COUNTER
*(initCGRA + 7*(loopID-1) + 6) = 0; //Live-Variable Store Epilog Lenth
FILE* epi,*pro,*kern, *count, *config;
char loopno[25];
char directoryPath[20] = "./CGRAExec/L";
sprintf(loopno,"%d",loopID);
strcat(directoryPath,loopno);
char epifile[40] = "";
char profile[40] = "";
char kernfile[40] = "";
char liveOutfile[40] = "";
char configfile[40] = "";
strcat(epifile,directoryPath);
strcat(epifile,"/epilog_ins.bin");
strcat(profile,directoryPath);
strcat(profile,"/prolog_ins.bin");
strcat(kernfile,directoryPath);
strcat(kernfile,"/kernel_ins.bin");
strcat(configfile,directoryPath);
strcat(configfile,"/CGRA_config.txt");
//Make some error checking for fopen and fread
epi=fopen(epifile,"rb");
pro=fopen(profile,"rb");
kern=fopen(kernfile,"rb");
config=fopen(configfile, "r");
int episize,prosize,kernelsize, livevar_st_size;
fread(&episize,sizeof(int),1,epi);
fread(&prosize,sizeof(int),1,pro);
fread(&kernelsize,sizeof(int),1,kern);
printf("\n**********EPISIZE %d*********\n",episize);
printf("\n**********PROSIZE %d*********\n",prosize);
printf("\n**********KERNSIZE %d*********\n",kernelsize);
printf("\n******SIZE OF UNSIGNED LONG%d*****\n",sizeof(unsigned long));
printf("\n******SIZE OF UNSIGNED LONG LONG%d*****\n",sizeof(unsigned long long));
epilog=(unsigned long long*)malloc(episize*sizeof(unsigned long long));
prolog=(unsigned long long*)malloc(prosize*sizeof(unsigned long long));
kernel=(unsigned long long*)malloc(kernelsize*sizeof(unsigned long long));
fread(epilog,sizeof(unsigned long long),episize,epi);
fread(prolog,sizeof(unsigned long long),prosize,pro);
fread(kernel,sizeof(unsigned long long),kernelsize,kern);
strcat(liveOutfile,directoryPath);
strcat(liveOutfile,"/livevar_st_ins_count.txt");
count=fopen(liveOutfile,"r");
fscanf(count, "%d", &livevar_st_size);
char line[256];
int XDim=0, YDim=0;
int iter=0;
printf("\n*******************before while loop**************\n");
while(fgets(line, sizeof(line), config))
{
iter++;
if(iter==1)
XDim = atoi(line);
else if(iter==2)
YDim = atoi(line);
else
break;
}
printf("\n************XDIM and YDim are %d, %d\n", XDim, YDim);
int II = kernelsize/(XDim*YDim);
int epiLength = episize/(XDim*YDim);
int prolength = prosize/(XDim*YDim);
*(initCGRA + 7*(loopID-1) + 2) = II;
*(initCGRA + 7*(loopID-1) + 3) = epiLength;
*(initCGRA + 7*(loopID-1) + 4) = prolength;
*(initCGRA + 7*(loopID-1) + 6) = livevar_st_size/(XDim*YDim);
fclose(epi);
fclose(pro);
fclose(kern);
fclose(count);
fclose(config);
char loopitfile[40] = "";
strcat(loopitfile,directoryPath);
strcat(loopitfile,"/kernel_count.txt");
int kernelCount = 0;
count=fopen(loopitfile,"r");
fscanf(count, "%d", &kernelCount);
fclose(count);
printf("Loop Count: %d\n",kernelCount);
*(initCGRA + 7*(loopID-1) + 5) = kernelCount;
printf("From FILE: PROLOGPC= %lx, EPILOGPC=%lx, KernelPC=%lx\n",(unsigned long)prolog,(unsigned long)epilog,(unsigned long)kernel);
prologPtr[loopID-1] = (unsigned long long) prolog;
epilogPtr[loopID-1] = (unsigned long long) epilog;
kernelPtr[loopID-1] = (unsigned long long) kernel;
//printf("Exiting cgra.c Initialize Parameters\n");
return 0;
}
int configureCGRA(unsigned int loopID)
{
if(DEBUG) printf("configureCGRA\n");
unsigned int i=0;
int kernelCount = *(initCGRA + 7*(loopID-1) + 5);
FILE* count;
char loopno[25];
char directoryPath[20] = "./CGRAExec/L";
sprintf(loopno,"%d",loopID);
strcat(directoryPath,loopno);
if(DEBUG) printf("\nloopno = %s\n", loopno);
if(kernelCount <= 0)
{
int newTC = kernelCount + dynamicTCVal;
*(initCGRA + 7*(loopID-1) + 5) = newTC;
}
char initCGRAfile[40] = "./CGRAExec/L1";
strcat(initCGRAfile,"/initCGRA.txt");
count = fopen(initCGRAfile, "wb");
for(i=0; i<7; i++)
fprintf(count, "%d\n", *(initCGRA + 7*(loopID-1) + i));
fprintf(count, "%ld\n", (unsigned long long) epilogPtr[loopID-1]);
fprintf(count, "%ld\n", (unsigned long long) prologPtr[loopID-1]);
fprintf(count, "%ld\n", (unsigned long long) kernelPtr[loopID-1]);
fclose(count);
//printf("Exiting cgra.c configureCGRA\n");
return 0;
}
void checkTotalLoops( )
{
if(DEBUG) printf("checkTotalLoops\n");
char myfile[40] = "./CGRAExec/total_loops.txt";
FILE* count;
count = fopen(myfile, "r");
fscanf(count, "%u", &totalLoops);
fclose(count);
//printf("Exiiting cgra.c checkTotalLoops\n");
}
void* runOnCGRA(void)
{
printf("\n\nrunOnCGRA\n");
asm("mov r11,%[value]" : :[value]"r" (activate_CGRA):);
return NULL;
}
void accelerateOnCGRA(unsigned int loopNo)
{
printf("\n\naccelerateOnCGRA\n");
int result = 0;
int configure = configureCGRA(loopNo);
//if(DEBUG) printf("configure = %d, loopNo = %d\n", configure, loopNo);
if(configure == -1)
{
printf("Error in configuring CGRA:\n");
}
printf("Core will execute loop %u on CGRA\n",loopNo);
// thread_cond_cpu = 0;
//thread_cond_cgra = 1;
runOnCGRA();
//while(thread_cond_cpu != 1) {
// usleep(1);
// }
//printf("Exiting Accelerate on CGRA\n");
}
void deleteCGRA()
{
/*printf("deleting cgra\n");
thread_exit = 1;
thread_cond_cgra = 1;
printf("Main thread calling join w/ CGRA thread\n");
//pthread_join(pth, NULL);
//printf("Exiting cgra.c deleteCGRA\n"); */
}
void createCGRA()
{
if(DEBUG) printf("createCGRA\n");
int result = 0;
unsigned i=1;
checkTotalLoops();
initCGRA = (int *)malloc(sizeof(int)*7*totalLoops);
prologPtr = (int *)malloc(sizeof(int)*totalLoops);
kernelPtr = (int *)malloc(sizeof(int)*totalLoops);
epilogPtr = (int *)malloc(sizeof(int)*totalLoops);
//pthread_mutex_init(&mutex, NULL);
//pthread_mutex_lock(&mutex);
//result = pthread_create(&pth, NULL, (void*) &runOnCGRA, NULL);
for(i = 1; i <= totalLoops; i++)
{
initializeParameters(i);
}
//pthread_mutex_init(&mutex, NULL);
printf("Main thread calling CGRA thread...\n");
//asm("mov r8,%[value]" : :[value]"r" (CPU_idle):);
//printf("ASM CPU_IDLE Instruction completed\n");
//result = pthread_create(&pth, NULL, (void*) &runOnCGRA, NULL);
//printf("\n\nresult = %d\n\n", result);
//fflush(NULL);
}

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@ -1,38 +0,0 @@
// Author: Shail Dave
#ifndef _CGRA_H
#define _CGRA_H
#include <assert.h>
#include <pthread.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#define activate_CGRA 15
#define stop_CGRA 16
#define deactivate_CGRA 17
#define CPU_idle 71
void accelerateOnCGRA(unsigned int loopNo);
int setupAndExecuteCGRA(unsigned int loopNo);
int initializeParameters(unsigned int loopID);
int configureCGRA(unsigned int loopID);
void* runOnCGRA(void* arg);
void deleteCGRA();
unsigned long *prolog,*epilog,*kernel;
unsigned int *ArrPtr;
unsigned long * prologPtr, *kernelPtr, *epilogPtr;
int *initCGRA;
unsigned totalLoops=0;
pthread_t pth;
static unsigned int thread_cond_cpu = 1;
static unsigned int thread_cond_cgra = 0;
static unsigned int thread_exit = 0;
int dynamicTCVal = 0;
#endif /* EXEC_CGRA_ */

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@ -5,8 +5,8 @@
#Expected arguments or inputs - .c or .cpp files
#Set Paths
ccf_root="/home/local/ASUAD/mbalasu2/CCF-20.04"
install_path="/home/local/ASUAD/mbalasu2/sw"
ccf_root="/home/local/ASUAD/quoclon1/ccf9_27"
install_path="/home/local/ASUAD/quoclon1/sw"
obj="obj"
objFound=0;
searchstring=".o"
@ -174,7 +174,7 @@ llc -march="arm" CGRAGen.ll
clang -w -O3 -static -fno-unroll-loops -fno-slp-vectorize -fno-vectorize -target armv7a-none-linux-eabi CGRAGen.s -o $obj -lm
#Delete temporary files
rm *.s *.bc #*.ll
rm *.s *.bc *.ll
# Check if CGRAExec exists.
if [ -d "CGRAExec" ]; then

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@ -5,9 +5,7 @@ R=0
IC=0
CGRAclock=0
CPUClock=0
ccf_root="/home/local/ASUAD/quoclon1/ccf2_git/CCF-20.04"
pwd
ccf_root="/home/local/ASUAD/quoclon1/ccf9_27"
executable=$1
shift

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@ -1,63 +0,0 @@
#!/bin/bash
X=0
Y=0
R=0
IC=0
CGRAclock=0
CPUClock=0
ccf_root="/home/local/ASUAD/quoclon1/CCF_INS/ins3"
pwd
executable=$1
shift
subcommand=$1
shift
if [[ "$subcommand" == "--prog-args" ]]; then
args=""
for arg in "$@"
do
args+="$arg "
done
elif [[ "$subcommand" == "" ]]; then
args=""
else
echo "If your program has arguments, add the flag --prog-args"
exit 1
fi
if [ -f "CGRA_config.csv" ]; then
INPUTFILE="CGRA_config.csv"
X=$(grep -w X $INPUTFILE | cut -d, -f2)
Y=$(grep -w Y $INPUTFILE | cut -d, -f2)
R=$(grep -w R $INPUTFILE | cut -d, -f2)
IC=$(grep -w IC $INPUTFILE | cut -d, -f2)
CGRAclock=$(grep -w Cclock $INPUTFILE | cut -d, -f2)
CPUclock=$(grep -w CPUclock $INPUTFILE | cut -d, -f2)
else
echo "Please include CGRA architecture file"
exit 1
fi
echo $args
#if [ "$R" -le "2" ] || [ "$R" -eq "3" ] || [ "$R" -eq "5" ] || [ "$R" -eq "6" ] || [ "$R" -eq "7" ] || [ "$R" -gt "8" ] && [ "$R" - t "16" ] || [ "$R" -gt "16" ]; then
# echo -e "\e[31mRegister size of 4, 8 and 16 are only supported! Please change the CGRA_config.csv file to reflect this.\e[0m"
# exit 1
#fi
echo "Simulation for CGRA for $X x $Y with $R registers per PE"
Ghz="GHz"
cgraclock="$CGRAclock$Ghz"
cpuclock="$CPUclock$Ghz"
echo "CPU frequency @ $cpuclock"
echo "CGRA frequency @ $cgraclock"
echo CGRA${X}x${Y}R${R}torus
# CGRA Execution
gdb --args ${ccf_root}/gem5/build/ARM/gem5.debug --debug-flags=CGRA_Detailed ${ccf_root}/gem5/configs/example/se_cgra.py -n 2 --cpu-type "AtomicSipleCPU" --cgra --cgra-type "CGRA${X}x${Y}R${R}torus" -c ./${executable} -o ${args}

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@ -9,7 +9,7 @@ R=0
IC=0
CGRAclock=0
CPUClock=0
ccf_root="/home/local/ASUAD/quoclon1/ccf2_git/CCF-20.04"
ccf_root="/home/local/ASUAD/quoclon1/ccf9_27"
pwd

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@ -1,64 +0,0 @@
#!/bin/bash
#Get Architecture Information from the csv file and set corresponding architecture arguments
X=0
Y=0
R=0
IC=0
CGRAclock=0
CPUClock=0
ccf_root="/home/local/ASUAD/quoclon1/CCF_INS/ins3"
pwd
executable=$1
shift
subcommand=$1
shift
if [[ "$subcommand" == "--prog-args" ]]; then
args=""
for arg in "$@"
do
args+="$arg "
done
elif [[ "$subcommand" == "" ]]; then
args=""
else
echo "If your program has arguments, add the flag --prog-args"
exit 1
fi
if [ -f "CGRA_config.csv" ]; then
INPUTFILE="CGRA_config.csv"
X=$(grep -w X $INPUTFILE | cut -d, -f2)
Y=$(grep -w Y $INPUTFILE | cut -d, -f2)
R=$(grep -w R $INPUTFILE | cut -d, -f2)
IC=$(grep -w IC $INPUTFILE | cut -d, -f2)
CGRAclock=$(grep -w Cclock $INPUTFILE | cut -d, -f2)
CPUclock=$(grep -w CPUclock $INPUTFILE | cut -d, -f2)
else
echo "Please include CGRA architecture file"
exit 1
fi
echo $args
#if [ "$R" -le "2" ] || [ "$R" -eq "3" ] || [ "$R" -eq "5" ] || [ "$R" -eq "6" ] || [ "$R" -eq "7" ] || [ "$R" -gt "8" ] && [ "$R" -lt "16" ] || [ "$R" -gt "16" ]; then
# echo -e "\e[31mRegister size of 4, 8 and 16 are only supported! Please change the CGRA_config.csv file to reflect this.\e[0m"
# exit 1
#fi
echo "Simulation for CGRA for $X x $Y with $R registers per PE"
Ghz="GHz"
cgraclock="$CGRAclock$Ghz"
cpuclock="$CPUclock$Ghz"
echo "CPU frequency @ $cpuclock"
echo "CGRA frequency @ $cgraclock"
echo CGRA${X}x${Y}R${R}torus
# CGRA Execution
${ccf_root}/gem5/build/ARM/gem5.opt --debug-flags=CGRA_Detailed ${ccf_root}/gem5/configs/example/se_cgra.py -n 2 --cpu-type "AtomicSimpleCPU" --cgra --cgra-type "CGRA${X}x${Y}R${R}torus" -c ./${executable} -o ${args}

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@ -1,80 +0,0 @@
#!/bin/bash
############################################
############################################
## Author : Shail Dave ##
## Arizona State University ##
## ##
## Notes : Script File To Compile A Loop ##
## for its Execution on CGRA ##
## ##
############################################
############################################
#Set Architecture Parameters
#X=4
#Y=4
#R=4
X=0
Y=0
R=0
IC=0
CGRAclock=0
CPUClock=0
MODE=0
ALGO=0
if [ -f "CGRA_config.csv" ]; then
INPUTFILE="CGRA_config.csv"
X=$(grep X $INPUTFILE | cut -d, -f2)
Y=$(grep Y $INPUTFILE | cut -d, -f2)
R=$(grep R $INPUTFILE | cut -d, -f2)
MODE=$(grep MODE $INPUTFILE | cut -d, -f2)
ALGO=$(grep ALGO $INPUTFILE | cut -d, -f2)
else
echo "Please include CGRA architecture file"
exit 1
fi
obj="$1"
#Setting Paths
LEVEL=../..
#toolchain="/home/shail/ccf-init"
toolchain="/home/mahesh/git_repos/ccf"
script="$toolchain/scripts"
opcodegen="$toolchain/InstructionGenerator/insgen"
#Detect node and edge file
llvmedge="$(find ./ -name "*.txt" | grep -i loop | grep -i edge)"
llvmnode="$(find ./ -name "*.txt" | grep -i loop | grep -i node)"
#RAMP - Scheduling and Mapping
if [ $ALGO -eq 0 ]; then
$script/map.sh $llvmnode $llvmedge -X $X -Y $Y -R $R
elif [ $ALGO -eq 1 ]; then
$script/map1.sh $llvmnode $llvmedge $X $Y $R $MODE
elif [ $ALGO -eq 2 ]; then
$script/map2.sh $llvmnode $llvmedge $X $Y $R $MODE
elif [ $ALGO -eq 3 ]; then
$script/map3.sh $llvmnode $llvmedge $X $Y $R $MODE
else
$script/map4.sh $llvmnode $llvmedge $X $Y $R $MODE
fi
finalnode="$(find ./ -name "*.txt" | grep -i final | grep -i node)"
node="$(find ./ -name "*.txt" | grep -i DUMP | grep -i node)"
edge="$(find ./ -name "*.txt" | grep -i DUMP | grep -i edge)"
liveoutnode="$(find ./ -name "*.txt" | grep -i liveout | grep -i node)"
liveoutedge="$(find ./ -name "*.txt" | grep -i liveout | grep -i edge)"
#if [ $R -eq 0 ]; then
# R=4
#fi
#echo "Num regs is $R"
#Instruction Generator
#$opcodegen $finalnode $edge $llvmnode $llvmedge $obj prolog.sch kernel.sch epilog.sch $X $Y $R $liveoutnode $liveoutedge > cgra_instructions.txt