Merge branch 'main' of https://github.com/MPSLab-ASU/CCF-20.04 into main
This commit is contained in:
vinhta
commit
3c2162cb9e
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@ -1,14 +0,0 @@
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X,4
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Y,4
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R,4
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IC,0
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||||||
Cclock,0.7
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||||||
CPUclock,2
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||||||
Mem,8GB
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MODE,0
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||||||
ALGO,RAMP
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MSA,10
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||||||
MAPII,10
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MAX_MAP,1000
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MAX_II,50
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LAMBDA,0.02
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@ -1,14 +0,0 @@
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4
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4
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4
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0
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0.7
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2
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8GB
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0
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RAMP
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10
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10
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1000
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50
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0.02
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@ -1,5 +0,0 @@
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3 0 1 TRU 0
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2 1 1 TRU 0
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1 2 0 TRU 0
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0 3 0 TRU 0
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3 4 0 TRU 0
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@ -1,5 +0,0 @@
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0 29 0
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1 29 0
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2 4 0
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3 0 0
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4 10 0
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@ -1,20 +0,0 @@
|
||||||
digraph LoadConst {
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|
||||||
{
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|
||||||
0 [color=red ];
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||||||
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||||||
1 [color=red ];
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||||||
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||||||
2 [color=red ];
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||||||
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||||||
3 [color=red ];
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||||||
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||||||
4 [color=red ];
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||||||
3 -> 0 [style=bold, color=red, label=1]
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||||||
2 -> 1 [style=bold, color=red, label=1]
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||||||
1 -> 2
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||||||
0 -> 3
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3 -> 4
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||||||
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||||||
}
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||||||
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||||||
}
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||||||
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@ -1,33 +0,0 @@
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||||||
digraph Success_MS_ {
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|
||||||
{
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|
||||||
0 [color=red ];
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||||||
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||||||
1 [color=red ];
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||||||
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||||||
2 [color=red ];
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||||||
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||||||
3 [color=red ];
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||||||
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||||||
4 [color=red ];
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||||||
3 -> 0 [style=bold, color=red, label=1]
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||||||
2 -> 1 [style=bold, color=red, label=1]
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||||||
1 -> 2
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||||||
0 -> 3
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||||||
3 -> 4
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||||||
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||||||
}
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||||||
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|
||||||
{
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|
||||||
node [shape=plaintext];
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||||||
T0 -> T1;
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|
||||||
}{ rank = same;
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|
||||||
2; 3; T0;
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|
||||||
};
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|
||||||
{ rank = same;
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|
||||||
0; 1; 4; T1;
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|
||||||
};
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|
||||||
{ rank = same;
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|
||||||
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|
||||||
};
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|
||||||
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|
||||||
}
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|
||||||
|
|
@ -1,649 +0,0 @@
|
||||||
Inside insgen
|
|
||||||
|
|
||||||
UPDATING EDGES 3:0
|
|
||||||
|
|
||||||
UPDATING DEPENDENCY EDGES FOR NODE 0:1
|
|
||||||
|
|
||||||
UPDATING EDGES 2:1
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|
||||||
|
|
||||||
UPDATING DEPENDENCY EDGES FOR NODE 1:1
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|
||||||
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|
||||||
UPDATING EDGES 1:2
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|
||||||
|
|
||||||
UPDATING EDGES 0:3
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|
||||||
|
|
||||||
UPDATING EDGES 3:4
|
|
||||||
|
|
||||||
UPDATING EDGES 5:0
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|
||||||
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|
||||||
UPDATING EDGES 5:1
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|
||||||
|
|
||||||
UPDATING EDGES 5:2
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|
||||||
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|
||||||
UPDATING EDGES 5:3
|
|
||||||
|
|
||||||
UPDATING EDGES 6:4
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|
||||||
|
|
||||||
UPDATING EDGES 110:111
|
|
||||||
|
|
||||||
UPDATING EDGES 2:111
|
|
||||||
|
|
||||||
UPDATING EDGES 109:111
|
|
||||||
file ptr:0 open:1 prolog_size:64
|
|
||||||
|
|
||||||
|
|
||||||
64
|
|
||||||
32
|
|
||||||
32
|
|
||||||
*********KERNEL*****************
|
|
||||||
*********EPILOG*****************
|
|
||||||
LiveOut_data_pe: 2 liveOut_data: 2
|
|
||||||
PE: 0 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 1 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 2 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 3 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 4 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 5 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 6 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 7 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 8 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 9 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 10 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 11 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 12 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 13 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 14 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 15 Configuration Boundary: 0 10e004000
|
|
||||||
reg_num: 0
|
|
||||||
node: 6
|
|
||||||
We have arrived after isLiveStoreData Line
|
|
||||||
We have arrived after getNodeType
|
|
||||||
constant node: 6
|
|
||||||
Generating Instructions To Store Address (Hex) 9a640
|
|
||||||
Node name: gVar1
|
|
||||||
Loading dynamic constant value. LDA and LDD are 168c02004: 105c04000 in pe 2
|
|
||||||
Load Dyn Cons 168c02004 105c04000
|
|
||||||
node: 6
|
|
||||||
reg_num: 0
|
|
||||||
node: 0
|
|
||||||
We have arrived after isLiveStoreData Line
|
|
||||||
We have arrived after getNodeType
|
|
||||||
node: 0
|
|
||||||
reg_num: 0
|
|
||||||
node: 1
|
|
||||||
We have arrived after isLiveStoreData Line
|
|
||||||
We have arrived after getNodeType
|
|
||||||
node: 1
|
|
||||||
reg_num: 1
|
|
||||||
node: 2
|
|
||||||
We have arrived after isLiveStoreData Line
|
|
||||||
We have arrived after getNodeType
|
|
||||||
node: 2
|
|
||||||
reg_num: 0
|
|
||||||
node: 3
|
|
||||||
We have arrived after isLiveStoreData Line
|
|
||||||
We have arrived after getNodeType
|
|
||||||
node: 3
|
|
||||||
reg_num: 2
|
|
||||||
node: 4
|
|
||||||
We have arrived after isLiveStoreData Line
|
|
||||||
We have arrived after getNodeType
|
|
||||||
node: 4
|
|
||||||
reg_num: 1
|
|
||||||
node: 5
|
|
||||||
We have arrived after isLiveStoreData Line
|
|
||||||
We have arrived after getNodeType
|
|
||||||
constant node: 5
|
|
||||||
Large Constant (Hex): 1 Constant (Decimal): 1
|
|
||||||
node: 5
|
|
||||||
reg_num: 3
|
|
||||||
node: 6
|
|
||||||
We have arrived after isLiveStoreData Line
|
|
||||||
We have arrived after getNodeType
|
|
||||||
constant node: 6
|
|
||||||
Generating Instructions To Store Address (Hex) 9a640
|
|
||||||
Node name: gVar1
|
|
||||||
Loading dynamic constant value. LDA and LDD are 168d82004: 105c1c000 in pe 2
|
|
||||||
Load Dyn Cons 168d82004 105c1c000
|
|
||||||
node: 6
|
|
||||||
reg_num: 2
|
|
||||||
node: 109
|
|
||||||
We have arrived after isLiveStoreData Line
|
|
||||||
We have arrived after getNodeType
|
|
||||||
constant node: 109
|
|
||||||
Generating Instructions To Store Address (Hex) 9a644
|
|
||||||
Node name: gVar2
|
|
||||||
node: 109
|
|
||||||
reg_num: 3
|
|
||||||
node: 110
|
|
||||||
We have arrived after isLiveStoreData Line
|
|
||||||
We have arrived after getNodeType
|
|
||||||
ld_add/st_add node: 110
|
|
||||||
|
|
||||||
Variable Address (Hex): 9a644 Node: 110 PE: 0 Address (Decimal): 632388 RegNum: 3
|
|
||||||
node: 110
|
|
||||||
reg_num: 4
|
|
||||||
node: 111
|
|
||||||
pe mem op
|
|
||||||
0 12
|
|
||||||
1 3
|
|
||||||
2 16
|
|
||||||
3 3
|
|
||||||
4 0
|
|
||||||
5 0
|
|
||||||
6 0
|
|
||||||
7 0
|
|
||||||
8 0
|
|
||||||
9 0
|
|
||||||
10 0
|
|
||||||
11 0
|
|
||||||
12 0
|
|
||||||
13 0
|
|
||||||
14 0
|
|
||||||
15 0
|
|
||||||
|
|
||||||
****** Generatina Instructions For Non-Phi Nodes *****
|
|
||||||
|
|
||||||
NODES SCHEDULED AT 1
|
|
||||||
|
|
||||||
|
|
||||||
NODES SCHEDULED AT 2
|
|
||||||
2 3
|
|
||||||
|
|
||||||
FOR NODE 2: Datatype:1 opcode:8 lmux:1 rmux:6 reg1:0 reg2:0 we:1 wreg:4 imm:1 ab:0 db:0
|
|
||||||
Decoded 181c04001
|
|
||||||
|
|
||||||
FOR NODE 3: Datatype:1 opcode:0 lmux:2 rmux:6 reg1:0 reg2:0 we:0 wreg:0 imm:1 ab:0 db:0
|
|
||||||
Decoded 102c00001
|
|
||||||
|
|
||||||
NODES SCHEDULED AT 3
|
|
||||||
4
|
|
||||||
|
|
||||||
FOR NODE 4: Datatype:1 opcode:12 lmux:2 rmux:0 reg1:0 reg2:3 we:0 wreg:0 imm:0 ab:0 db:0
|
|
||||||
Decoded 1c2060000
|
|
||||||
|
|
||||||
****** Generating Instructions For Phi Nodes *****
|
|
||||||
|
|
||||||
NODES SCHEDULED AT 1
|
|
||||||
0 1
|
|
||||||
Phi Instructions
|
|
||||||
|
|
||||||
Phi! Prolog! FOR NODE 0: Datatype:1 opcode:1 lmux:6 rmux:0 reg1:0 reg2:0 we:0 wreg:0 imm:1 ab:0 db:0
|
|
||||||
Decoded 11e000001
|
|
||||||
|
|
||||||
Phi! Prolog! FOR NODE 1: Datatype:1 opcode:1 lmux:6 rmux:0 reg1:0 reg2:0 we:0 wreg:0 imm:1 ab:0 db:0
|
|
||||||
Decoded 11e000001
|
|
||||||
|
|
||||||
Kernel Instructions
|
|
||||||
|
|
||||||
FOR NODE 0: Datatype:1 opcode:1 lmux:1 rmux:6 reg1:0 reg2:0 we:0 wreg:0 imm:0 ab:0 db:0
|
|
||||||
Decoded 119c00000
|
|
||||||
|
|
||||||
FOR NODE 1: Datatype:1 opcode:1 lmux:2 rmux:6 reg1:0 reg2:0 we:0 wreg:0 imm:0 ab:0 db:0
|
|
||||||
Decoded 11ac00000
|
|
||||||
|
|
||||||
****** Generating Instructions For Store Nodes For Live Variables*****
|
|
||||||
|
|
||||||
NODES SCHEDULED AT 4
|
|
||||||
|
|
||||||
NODES SCHEDULED AT STORE CYCLE 0
|
|
||||||
110 111
|
|
||||||
|
|
||||||
FOR NODE 110: Datatype:1 opcode:6 lmux:0 rmux:6 reg1:3 reg2:0 we:0 wreg:0 imm:4 ab:1 db:0
|
|
||||||
Decoded 168d82004
|
|
||||||
|
|
||||||
FOR NODE 111: Datatype:1 opcode:0 lmux:0 rmux:6 reg1:4 reg2:0 we:0 wreg:0 imm:0 ab:0 db:1
|
|
||||||
Decoded 100c01000
|
|
||||||
*******PROLOG*********
|
|
||||||
0: 10e004000
|
|
||||||
1: 10e004000
|
|
||||||
2: 10e004000
|
|
||||||
3: 10e004000
|
|
||||||
4: 10e004000
|
|
||||||
5: 10e004000
|
|
||||||
6: 10e004000
|
|
||||||
7: 10e004000
|
|
||||||
8: 10e004000
|
|
||||||
9: 10e004000
|
|
||||||
10: 10e004000
|
|
||||||
11: 10e004000
|
|
||||||
12: 10e004000
|
|
||||||
13: 10e004000
|
|
||||||
14: 10e004000
|
|
||||||
15: 10e004000
|
|
||||||
16: 11e00c001
|
|
||||||
17: 177e00000
|
|
||||||
18: 11e004640
|
|
||||||
19: 177e00000
|
|
||||||
20: 177e00000
|
|
||||||
21: 177e00000
|
|
||||||
22: 177e00000
|
|
||||||
23: 177e00000
|
|
||||||
24: 177e00000
|
|
||||||
25: 177e00000
|
|
||||||
26: 177e00000
|
|
||||||
27: 177e00000
|
|
||||||
28: 177e00000
|
|
||||||
29: 177e00000
|
|
||||||
30: 177e00000
|
|
||||||
31: 177e00000
|
|
||||||
32: 12e00c000
|
|
||||||
33: 177e00000
|
|
||||||
34: 12e00409a
|
|
||||||
35: 177e00000
|
|
||||||
36: 177e00000
|
|
||||||
37: 177e00000
|
|
||||||
38: 177e00000
|
|
||||||
39: 177e00000
|
|
||||||
40: 177e00000
|
|
||||||
41: 177e00000
|
|
||||||
42: 177e00000
|
|
||||||
43: 177e00000
|
|
||||||
44: 177e00000
|
|
||||||
45: 177e00000
|
|
||||||
46: 177e00000
|
|
||||||
47: 177e00000
|
|
||||||
48: 13e00c000
|
|
||||||
49: 177e00000
|
|
||||||
50: 13e004000
|
|
||||||
51: 177e00000
|
|
||||||
52: 177e00000
|
|
||||||
53: 177e00000
|
|
||||||
54: 177e00000
|
|
||||||
55: 177e00000
|
|
||||||
56: 177e00000
|
|
||||||
57: 177e00000
|
|
||||||
58: 177e00000
|
|
||||||
59: 177e00000
|
|
||||||
60: 177e00000
|
|
||||||
61: 177e00000
|
|
||||||
62: 177e00000
|
|
||||||
63: 177e00000
|
|
||||||
64: 11e014644
|
|
||||||
65: 177e00000
|
|
||||||
66: 168c02004
|
|
||||||
67: 177e00000
|
|
||||||
68: 177e00000
|
|
||||||
69: 177e00000
|
|
||||||
70: 177e00000
|
|
||||||
71: 177e00000
|
|
||||||
72: 177e00000
|
|
||||||
73: 177e00000
|
|
||||||
74: 177e00000
|
|
||||||
75: 177e00000
|
|
||||||
76: 177e00000
|
|
||||||
77: 177e00000
|
|
||||||
78: 177e00000
|
|
||||||
79: 177e00000
|
|
||||||
80: 12e01409a
|
|
||||||
81: 177e00000
|
|
||||||
82: 105c04000
|
|
||||||
83: 177e00000
|
|
||||||
84: 177e00000
|
|
||||||
85: 177e00000
|
|
||||||
86: 177e00000
|
|
||||||
87: 177e00000
|
|
||||||
88: 177e00000
|
|
||||||
89: 177e00000
|
|
||||||
90: 177e00000
|
|
||||||
91: 177e00000
|
|
||||||
92: 177e00000
|
|
||||||
93: 177e00000
|
|
||||||
94: 177e00000
|
|
||||||
95: 177e00000
|
|
||||||
96: 13e014000
|
|
||||||
97: 177e00000
|
|
||||||
98: 11e01c640
|
|
||||||
99: 177e00000
|
|
||||||
100: 177e00000
|
|
||||||
101: 177e00000
|
|
||||||
102: 177e00000
|
|
||||||
103: 177e00000
|
|
||||||
104: 177e00000
|
|
||||||
105: 177e00000
|
|
||||||
106: 177e00000
|
|
||||||
107: 177e00000
|
|
||||||
108: 177e00000
|
|
||||||
109: 177e00000
|
|
||||||
110: 177e00000
|
|
||||||
111: 177e00000
|
|
||||||
112: 11e01c644
|
|
||||||
113: 177e00000
|
|
||||||
114: 12e01c09a
|
|
||||||
115: 177e00000
|
|
||||||
116: 177e00000
|
|
||||||
117: 177e00000
|
|
||||||
118: 177e00000
|
|
||||||
119: 177e00000
|
|
||||||
120: 177e00000
|
|
||||||
121: 177e00000
|
|
||||||
122: 177e00000
|
|
||||||
123: 177e00000
|
|
||||||
124: 177e00000
|
|
||||||
125: 177e00000
|
|
||||||
126: 177e00000
|
|
||||||
127: 177e00000
|
|
||||||
128: 12e01c09a
|
|
||||||
129: 177e00000
|
|
||||||
130: 13e01c000
|
|
||||||
131: 177e00000
|
|
||||||
132: 177e00000
|
|
||||||
133: 177e00000
|
|
||||||
134: 177e00000
|
|
||||||
135: 177e00000
|
|
||||||
136: 177e00000
|
|
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137: 177e00000
|
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138: 177e00000
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139: 177e00000
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140: 177e00000
|
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141: 177e00000
|
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142: 177e00000
|
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||||||
143: 177e00000
|
|
||||||
144: 13e01c000
|
|
||||||
145: 177e00000
|
|
||||||
146: 168d82004
|
|
||||||
147: 177e00000
|
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148: 177e00000
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149: 177e00000
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150: 177e00000
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151: 177e00000
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154: 177e00000
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156: 177e00000
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157: 177e00000
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159: 177e00000
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160: 177e00000
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161: 177e00000
|
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162: 105c1c000
|
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163: 177e00000
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165: 177e00000
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166: 177e00000
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167: 177e00000
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168: 177e00000
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169: 177e00000
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170: 177e00000
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171: 177e00000
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172: 177e00000
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173: 177e00000
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174: 177e00000
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175: 177e00000
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176: 177e00000
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177: 177e00000
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179: 177e00000
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180: 177e00000
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181: 177e00000
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182: 177e00000
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183: 177e00000
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184: 177e00000
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185: 177e00000
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187: 177e00000
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188: 177e00000
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189: 177e00000
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190: 177e00000
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191: 177e00000
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198: 177e00000
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199: 177e00000
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200: 177e00000
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201: 177e00000
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202: 177e00000
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211: 177e00000
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216: 177e00000
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219: 177e00000
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220: 177e00000
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221: 177e00000
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222: 177e00000
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223: 177e00000
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224: 177e00000
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225: 177e00000
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226: 177e00000
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227: 177e00000
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228: 177e00000
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229: 177e00000
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230: 177e00000
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231: 177e00000
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232: 177e00000
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233: 177e00000
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234: 177e00000
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235: 177e00000
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236: 177e00000
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237: 177e00000
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238: 177e00000
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239: 177e00000
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240: 177e00000
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241: 177e00000
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242: 177e00000
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243: 177e00000
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244: 177e00000
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245: 177e00000
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246: 177e00000
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247: 177e00000
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248: 177e00000
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249: 177e00000
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250: 177e00000
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251: 177e00000
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252: 177e00000
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253: 177e00000
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254: 177e00000
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255: 177e00000
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256: 177e00000
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257: 177e00000
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258: 177e00000
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259: 177e00000
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260: 177e00000
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261: 177e00000
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262: 177e00000
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265: 177e00000
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266: 177e00000
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267: 177e00000
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268: 177e00000
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269: 177e00000
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270: 177e00000
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271: 177e00000
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272: 177e00000
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273: 177e00000
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274: 177e00000
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275: 177e00000
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276: 177e00000
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277: 177e00000
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278: 177e00000
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279: 177e00000
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280: 177e00000
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281: 177e00000
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282: 177e00000
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283: 177e00000
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284: 177e00000
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285: 177e00000
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286: 177e00000
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287: 177e00000
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288: 177e00000
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289: 177e00000
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290: 177e00000
|
|
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291: 177e00000
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292: 177e00000
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293: 177e00000
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294: 177e00000
|
|
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295: 177e00000
|
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296: 177e00000
|
|
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297: 177e00000
|
|
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298: 177e00000
|
|
||||||
299: 177e00000
|
|
||||||
300: 177e00000
|
|
||||||
301: 177e00000
|
|
||||||
302: 177e00000
|
|
||||||
303: 177e00000
|
|
||||||
304: 11e000001
|
|
||||||
305: 11e000001
|
|
||||||
306: 177e00000
|
|
||||||
307: 177e00000
|
|
||||||
308: 177e00000
|
|
||||||
309: 177e00000
|
|
||||||
310: 177e00000
|
|
||||||
311: 177e00000
|
|
||||||
312: 177e00000
|
|
||||||
313: 177e00000
|
|
||||||
314: 177e00000
|
|
||||||
315: 177e00000
|
|
||||||
316: 177e00000
|
|
||||||
317: 177e00000
|
|
||||||
318: 177e00000
|
|
||||||
319: 177e00000
|
|
||||||
320: 177e00000
|
|
||||||
321: 177e00000
|
|
||||||
322: 181c04001
|
|
||||||
323: 102c00001
|
|
||||||
324: 177e00000
|
|
||||||
325: 177e00000
|
|
||||||
326: 177e00000
|
|
||||||
327: 177e00000
|
|
||||||
328: 177e00000
|
|
||||||
329: 177e00000
|
|
||||||
330: 177e00000
|
|
||||||
331: 177e00000
|
|
||||||
332: 177e00000
|
|
||||||
333: 177e00000
|
|
||||||
334: 177e00000
|
|
||||||
335: 177e00000
|
|
||||||
336: 119c00000
|
|
||||||
337: 11ac00000
|
|
||||||
338: 1c2060000
|
|
||||||
339: 177e00000
|
|
||||||
340: 177e00000
|
|
||||||
341: 177e00000
|
|
||||||
342: 177e00000
|
|
||||||
343: 177e00000
|
|
||||||
344: 177e00000
|
|
||||||
345: 177e00000
|
|
||||||
346: 177e00000
|
|
||||||
347: 177e00000
|
|
||||||
348: 177e00000
|
|
||||||
349: 177e00000
|
|
||||||
350: 177e00000
|
|
||||||
351: 177e00000
|
|
||||||
*******KERNEl*********
|
|
||||||
0: 177e00000
|
|
||||||
1: 177e00000
|
|
||||||
2: 181c04001
|
|
||||||
3: 102c00001
|
|
||||||
4: 177e00000
|
|
||||||
5: 177e00000
|
|
||||||
6: 177e00000
|
|
||||||
7: 177e00000
|
|
||||||
8: 177e00000
|
|
||||||
9: 177e00000
|
|
||||||
10: 177e00000
|
|
||||||
11: 177e00000
|
|
||||||
12: 177e00000
|
|
||||||
13: 177e00000
|
|
||||||
14: 177e00000
|
|
||||||
15: 177e00000
|
|
||||||
16: 119c00000
|
|
||||||
17: 11ac00000
|
|
||||||
18: 1c2060000
|
|
||||||
19: 177e00000
|
|
||||||
20: 177e00000
|
|
||||||
21: 177e00000
|
|
||||||
22: 177e00000
|
|
||||||
23: 177e00000
|
|
||||||
24: 177e00000
|
|
||||||
25: 177e00000
|
|
||||||
26: 177e00000
|
|
||||||
27: 177e00000
|
|
||||||
28: 177e00000
|
|
||||||
29: 177e00000
|
|
||||||
30: 177e00000
|
|
||||||
31: 177e00000
|
|
||||||
Store instr: 168d82004
|
|
||||||
Store instr: 100c01000
|
|
||||||
*******EPILOG*********
|
|
||||||
0: 177e00000
|
|
||||||
1: 177e00000
|
|
||||||
2: 181c04001
|
|
||||||
3: 102c00001
|
|
||||||
4: 177e00000
|
|
||||||
5: 177e00000
|
|
||||||
6: 177e00000
|
|
||||||
7: 177e00000
|
|
||||||
8: 177e00000
|
|
||||||
9: 177e00000
|
|
||||||
10: 177e00000
|
|
||||||
11: 177e00000
|
|
||||||
12: 177e00000
|
|
||||||
13: 177e00000
|
|
||||||
14: 177e00000
|
|
||||||
15: 177e00000
|
|
||||||
16: 177e00000
|
|
||||||
17: 177e00000
|
|
||||||
18: 1c2060000
|
|
||||||
19: 177e00000
|
|
||||||
20: 177e00000
|
|
||||||
21: 177e00000
|
|
||||||
22: 177e00000
|
|
||||||
23: 177e00000
|
|
||||||
24: 177e00000
|
|
||||||
25: 177e00000
|
|
||||||
26: 177e00000
|
|
||||||
27: 177e00000
|
|
||||||
28: 177e00000
|
|
||||||
29: 177e00000
|
|
||||||
30: 177e00000
|
|
||||||
31: 177e00000
|
|
||||||
32: 168d82004
|
|
||||||
33: 177e00000
|
|
||||||
34: 100c01000
|
|
||||||
35: 177e00000
|
|
||||||
36: 177e00000
|
|
||||||
37: 177e00000
|
|
||||||
38: 177e00000
|
|
||||||
39: 177e00000
|
|
||||||
40: 177e00000
|
|
||||||
41: 177e00000
|
|
||||||
42: 177e00000
|
|
||||||
43: 177e00000
|
|
||||||
44: 177e00000
|
|
||||||
45: 177e00000
|
|
||||||
46: 177e00000
|
|
||||||
47: 177e00000
|
|
||||||
48: 177e00000
|
|
||||||
49: 177e00000
|
|
||||||
50: 177e00000
|
|
||||||
51: 177e00000
|
|
||||||
52: 177e00000
|
|
||||||
53: 177e00000
|
|
||||||
54: 177e00000
|
|
||||||
55: 177e00000
|
|
||||||
56: 177e00000
|
|
||||||
57: 177e00000
|
|
||||||
58: 177e00000
|
|
||||||
59: 177e00000
|
|
||||||
60: 177e00000
|
|
||||||
61: 177e00000
|
|
||||||
62: 177e00000
|
|
||||||
63: 177e00000
|
|
||||||
|
|
@ -1,21 +0,0 @@
|
||||||
Mapping has started
|
|
||||||
Curerent II: 2 rec_MII: 2
|
|
||||||
|
|
||||||
Trying to schedule DDG at II: 2
|
|
||||||
5
|
|
||||||
5
|
|
||||||
Feasible II is 2 Schedule Len is 2
|
|
||||||
|
|
||||||
II after scheduling is: 2
|
|
||||||
Start Placement for II = 2
|
|
||||||
Node 0 is scheduled at 1 ASAP: 0 ALAP: 1 Mod: 1
|
|
||||||
Node 1 is scheduled at 1 ASAP: 0 ALAP: 1 Mod: 1
|
|
||||||
Node 2 is scheduled at 2 ASAP: 1 ALAP: 2 Mod: 0
|
|
||||||
Node 3 is scheduled at 2 ASAP: 1 ALAP: 2 Mod: 0
|
|
||||||
Node 4 is scheduled at 3 ASAP: 2 ALAP: 3 Mod: 1
|
|
||||||
Graph has n = 80 vertices.
|
|
||||||
Find a Clique of size at least k = 5
|
|
||||||
Attempt total number 1, Clique Size: 5
|
|
||||||
|
|
||||||
MII = 2 Current II=2
|
|
||||||
Mapping is completed
|
|
||||||
|
|
@ -1,33 +0,0 @@
|
||||||
-1
|
|
||||||
-1
|
|
||||||
2
|
|
||||||
3
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
4
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
32
|
|
||||||
Binary file not shown.
|
|
@ -1,7 +0,0 @@
|
||||||
0 29 1
|
|
||||||
1 29 1
|
|
||||||
2 4 1
|
|
||||||
3 0 1
|
|
||||||
4 10 1
|
|
||||||
5 30 1
|
|
||||||
6 30 1
|
|
||||||
|
|
@ -1,10 +0,0 @@
|
||||||
2011168768
|
|
||||||
2011168768
|
|
||||||
2
|
|
||||||
4
|
|
||||||
22
|
|
||||||
3
|
|
||||||
1
|
|
||||||
673384
|
|
||||||
673904
|
|
||||||
676728
|
|
||||||
|
|
@ -1,33 +0,0 @@
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
2 0 2
|
|
||||||
3 0 2
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
0 0 1
|
|
||||||
1 0 1
|
|
||||||
4 0 3
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
32
|
|
||||||
|
|
@ -1 +0,0 @@
|
||||||
-2
|
|
||||||
Binary file not shown.
|
|
@ -1,3 +0,0 @@
|
||||||
107 108 0 LRE 0
|
|
||||||
108 4 0 TRU 1
|
|
||||||
6 107 0 TRU 0
|
|
||||||
|
|
@ -1,4 +0,0 @@
|
||||||
4 10 4 1
|
|
||||||
6 30 gVar1 1
|
|
||||||
107 19 ld_add_gVar1 1
|
|
||||||
108 20 ld_data_gVar1 1
|
|
||||||
|
|
@ -1,3 +0,0 @@
|
||||||
110 111 0 SRE 0
|
|
||||||
2 111 0 TRU 0
|
|
||||||
109 111 0 TRU 1
|
|
||||||
|
|
@ -1,4 +0,0 @@
|
||||||
2 4 2 0 1
|
|
||||||
109 30 gVar2 0 1
|
|
||||||
110 21 st_add_gVar2 4 1
|
|
||||||
111 22 st_data_gVar2 0 1
|
|
||||||
|
|
@ -1 +0,0 @@
|
||||||
16
|
|
||||||
|
|
@ -1,10 +0,0 @@
|
||||||
3 0 1 TRU 0
|
|
||||||
5 0 0 TRU 1
|
|
||||||
2 1 1 TRU 0
|
|
||||||
5 1 0 TRU 1
|
|
||||||
1 2 0 TRU 0
|
|
||||||
5 2 0 TRU 1
|
|
||||||
0 3 0 TRU 0
|
|
||||||
5 3 0 TRU 1
|
|
||||||
3 4 0 TRU 0
|
|
||||||
6 4 0 LIE 1
|
|
||||||
|
|
@ -1,7 +0,0 @@
|
||||||
0 29 0 0 1
|
|
||||||
1 29 1 0 1
|
|
||||||
2 4 2 0 1
|
|
||||||
3 0 3 0 1
|
|
||||||
4 10 4 0 1
|
|
||||||
5 30 ConstInt1 0 1
|
|
||||||
6 30 gVar1 4 1
|
|
||||||
|
|
@ -1,32 +0,0 @@
|
||||||
digraph loop_12 {
|
|
||||||
{
|
|
||||||
0 [shape=box, color=red, label="0\nPHI"];
|
|
||||||
|
|
||||||
1 [shape=box, color=red, label="1\nPHI"];
|
|
||||||
|
|
||||||
2 [shape=triangle, color=purple, label="2\nShiftl"];
|
|
||||||
|
|
||||||
3 [shape=polygon, color=purple, label="3\nAdd"];
|
|
||||||
|
|
||||||
4 [shape=trapezium, color=orange, label="4\nCMPEQ"];
|
|
||||||
|
|
||||||
5 [color=black, label="ConstInt1\n"];
|
|
||||||
|
|
||||||
6 [color=black, label="gVar1\n"];
|
|
||||||
|
|
||||||
109 [color=black, label="gVar2\n"];
|
|
||||||
3 -> 0 [style=bold, color=red, label=1]
|
|
||||||
5 -> 0 [color=gray]
|
|
||||||
2 -> 1 [style=bold, color=red, label=1]
|
|
||||||
5 -> 1 [color=gray]
|
|
||||||
1 -> 2
|
|
||||||
5 -> 2 [color=gray]
|
|
||||||
0 -> 3
|
|
||||||
5 -> 3 [color=gray]
|
|
||||||
3 -> 4
|
|
||||||
6 -> 4 [color=orange, label=4]
|
|
||||||
2 -> 109 [color=orange, label=4]
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
@ -1 +0,0 @@
|
||||||
0
|
|
||||||
|
|
@ -1,5 +0,0 @@
|
||||||
0 1
|
|
||||||
1 1
|
|
||||||
2 1
|
|
||||||
3 1
|
|
||||||
4 1
|
|
||||||
|
|
@ -1,65 +0,0 @@
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
0
|
|
||||||
1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
2
|
|
||||||
3
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
0
|
|
||||||
1
|
|
||||||
4
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
64
|
|
||||||
Binary file not shown.
|
|
@ -1,16 +0,0 @@
|
||||||
0 0
|
|
||||||
1 0
|
|
||||||
2 0
|
|
||||||
3 0
|
|
||||||
4 0
|
|
||||||
5 0
|
|
||||||
6 0
|
|
||||||
7 0
|
|
||||||
8 0
|
|
||||||
9 0
|
|
||||||
10 0
|
|
||||||
11 0
|
|
||||||
12 0
|
|
||||||
13 0
|
|
||||||
14 0
|
|
||||||
15 0
|
|
||||||
|
|
@ -1,112 +0,0 @@
|
||||||
#!/bin/bash
|
|
||||||
|
|
||||||
############################################
|
|
||||||
############################################
|
|
||||||
## Author : Shail Dave ##
|
|
||||||
## Arizona State University ##
|
|
||||||
## ##
|
|
||||||
## Notes : Script File To Compile A Loop ##
|
|
||||||
## for its Execution on CGRA ##
|
|
||||||
## ##
|
|
||||||
############################################
|
|
||||||
############################################
|
|
||||||
|
|
||||||
#Set Architecture Parameters
|
|
||||||
#X=4
|
|
||||||
#Y=4
|
|
||||||
#R=4
|
|
||||||
|
|
||||||
X=0
|
|
||||||
Y=0
|
|
||||||
R=0
|
|
||||||
IC=0
|
|
||||||
CGRAclock=0
|
|
||||||
CPUClock=0
|
|
||||||
ALGO=""
|
|
||||||
MSA=10
|
|
||||||
MAPII=10
|
|
||||||
MAX_MAP=1000
|
|
||||||
MAX_II=50
|
|
||||||
LAMBDA=0.02
|
|
||||||
|
|
||||||
if [ -f "CGRA_config.csv" ]; then
|
|
||||||
INPUTFILE="CGRA_config.csv"
|
|
||||||
X=$(grep -w X $INPUTFILE | cut -d, -f2)
|
|
||||||
Y=$(grep -w Y $INPUTFILE | cut -d, -f2)
|
|
||||||
R=$(grep -w R $INPUTFILE | cut -d, -f2)
|
|
||||||
ALGO=$(grep -w ALGO $INPUTFILE | cut -d, -f2)
|
|
||||||
MSA=$(grep -w MSA $INPUTFILE | cut -d, -f2)
|
|
||||||
MAPII=$(grep -w MAPII $INPUTFILE | cut -d, -f2)
|
|
||||||
MAX_MAP=$(grep -w MAX_MAP $INPUTFILE | cut -d, -f2)
|
|
||||||
MAX_II=$(grep -w MAX_II $INPUTFILE | cut -d, -f2)
|
|
||||||
LAMBDA=$(grep -w LAMBDA $INPUTFILE | cut -d, -f2)
|
|
||||||
|
|
||||||
|
|
||||||
else
|
|
||||||
echo "Please include CGRA architecture file"
|
|
||||||
exit 1
|
|
||||||
fi
|
|
||||||
|
|
||||||
obj="$1"
|
|
||||||
|
|
||||||
#Setting Paths
|
|
||||||
LEVEL=../..
|
|
||||||
#toolchain="/home/shail/ccf-init"
|
|
||||||
ccf_root="$2"
|
|
||||||
script="$ccf_root/scripts"
|
|
||||||
opcodegen="$ccf_root/InstructionGenerator/insgen"
|
|
||||||
opcodegen1="$ccf_root/InstructionGenerator/falcon_insgen"
|
|
||||||
|
|
||||||
#Detect node and edge file
|
|
||||||
llvmedge="$(find . -name "*.txt" | grep -i loop | grep -i edge)"
|
|
||||||
llvmnode="$(find . -name "*.txt" | grep -i loop | grep -i node)"
|
|
||||||
|
|
||||||
echo $llvmnode
|
|
||||||
|
|
||||||
#RAMP - Scheduling and Mapping
|
|
||||||
#if [ $ALGO -eq 0 ]; then
|
|
||||||
# $script/map.sh $llvmnode $llvmedge -X $X -Y $Y -R $R
|
|
||||||
#elif [ $ALGO -eq 1 ]; then
|
|
||||||
# $script/map1.sh $llvmnode $llvmedge $X $Y $R $MODE
|
|
||||||
#elif [ $ALGO -eq 2 ]; then
|
|
||||||
# $script/map2.sh $llvmnode $llvmedge $X $Y $R $MODE
|
|
||||||
#elif [ $ALGO -eq 3 ]; then
|
|
||||||
# $script/map3.sh $llvmnode $llvmedge $X $Y $R $MODE
|
|
||||||
#else
|
|
||||||
# $script/map4.sh $llvmnode $llvmedge $X $Y $R $MODE $SCHED
|
|
||||||
#fi
|
|
||||||
|
|
||||||
pwd
|
|
||||||
find ${ccf_root}/mappings -maxdepth 1 -mindepth 1 -type d | while read dir; do
|
|
||||||
if [[ $dir == *"$ALGO" ]]; then
|
|
||||||
map="$dir/Release"
|
|
||||||
nodefile="$dir/DFGFiles"
|
|
||||||
$map/$ALGO -EDGE $llvmedge -NODE $llvmnode -X $X -Y $Y -R $R -MSA $MSA -MAPII $MAPII -MAX_MAP $MAX_MAP -MAX_II $MAX_II -LAMBDA $LAMBDA #> $schfile
|
|
||||||
$nodefile/nodefile $llvmnode DUMP_node.txt > final_node.txt
|
|
||||||
fi
|
|
||||||
done
|
|
||||||
|
|
||||||
finalnode="$(find ./ -name "*.txt" | grep -i final | grep -i node)"
|
|
||||||
node="$(find ./ -name "*.txt" | grep -i DUMP | grep -i node)"
|
|
||||||
edge="$(find ./ -name "*.txt" | grep -i DUMP | grep -i edge)"
|
|
||||||
|
|
||||||
liveoutnode="$(find ./ -name "*.txt" | grep -i liveout | grep -i node)"
|
|
||||||
liveoutedge="$(find ./ -name "*.txt" | grep -i liveout | grep -i edge)"
|
|
||||||
|
|
||||||
if [ $R -eq 0 ]; then
|
|
||||||
R=4
|
|
||||||
fi
|
|
||||||
|
|
||||||
|
|
||||||
#echo "Num regs is $R"
|
|
||||||
|
|
||||||
#Instruction Generator
|
|
||||||
echo Instruction Generator
|
|
||||||
if [ $ALGO == "FalconCrimson" ]; then
|
|
||||||
echo running FalcomCrimson
|
|
||||||
$opcodegen1 $finalnode $edge $llvmnode $llvmedge $obj prolog.sch kernel.sch epilog.sch $X $Y $R $liveoutnode $liveoutedge > cgra_instructions.txt
|
|
||||||
else
|
|
||||||
echo Running something else
|
|
||||||
#$opcodegen $finalnode $edge $llvmnode $llvmedge $obj prolog.sch kernel.sch epilog.sch $X $Y $R $liveoutnode $liveoutedge > cgra_instructions.txt
|
|
||||||
$opcodegen $finalnode $edge $llvmnode $llvmedge $obj prolog.sch kernel.sch epilog.sch $X $Y $R $liveoutnode $liveoutedge &> cgra_instructions.debug
|
|
||||||
fi
|
|
||||||
|
|
@ -1 +0,0 @@
|
||||||
1
|
|
||||||
|
|
@ -1,575 +0,0 @@
|
||||||
; ModuleID = 'CGRAGen.bc'
|
|
||||||
source_filename = "llvm-link"
|
|
||||||
target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
|
|
||||||
target triple = "armv7-none-linux-eabi"
|
|
||||||
|
|
||||||
%struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, %struct._IO_codecvt*, %struct._IO_wide_data*, %struct._IO_FILE*, i8*, i32, i32, [40 x i8] }
|
|
||||||
%struct._IO_marker = type opaque
|
|
||||||
%struct._IO_codecvt = type opaque
|
|
||||||
%struct._IO_wide_data = type opaque
|
|
||||||
|
|
||||||
@.str = private unnamed_addr constant [24 x i8] c"***** %d^%d = %d *****\0A\00", align 1
|
|
||||||
@totalLoops = dso_local global i32 0, align 4
|
|
||||||
@dynamicTCVal = dso_local local_unnamed_addr global i32 0, align 4
|
|
||||||
@initCGRA = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@epilog = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@prolog = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@kernel = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@prologPtr = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@epilogPtr = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@kernelPtr = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@ArrPtr = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@pth = dso_local local_unnamed_addr global i32 0, align 4
|
|
||||||
@str = private unnamed_addr constant [34 x i8] c"from cgra.c Initialize Parameters\00", align 1
|
|
||||||
@__const.configureCGRA.directoryPath = private unnamed_addr constant [20 x i8] c"./CGRAExec/L\00\00\00\00\00\00\00\00", align 1
|
|
||||||
@.str.1 = private unnamed_addr constant [3 x i8] c"%d\00", align 1
|
|
||||||
@.str.2 = private unnamed_addr constant [16 x i8] c"/epilog_ins.bin\00", align 1
|
|
||||||
@.str.3 = private unnamed_addr constant [16 x i8] c"/prolog_ins.bin\00", align 1
|
|
||||||
@.str.4 = private unnamed_addr constant [16 x i8] c"/kernel_ins.bin\00", align 1
|
|
||||||
@.str.5 = private unnamed_addr constant [17 x i8] c"/CGRA_config.txt\00", align 1
|
|
||||||
@.str.6 = private unnamed_addr constant [3 x i8] c"rb\00", align 1
|
|
||||||
@.str.7 = private unnamed_addr constant [2 x i8] c"r\00", align 1
|
|
||||||
@.str.8 = private unnamed_addr constant [32 x i8] c"\0A**********EPISIZE %d*********\0A\00", align 1
|
|
||||||
@.str.9 = private unnamed_addr constant [32 x i8] c"\0A**********PROSIZE %d*********\0A\00", align 1
|
|
||||||
@.str.10 = private unnamed_addr constant [33 x i8] c"\0A**********KERNSIZE %d*********\0A\00", align 1
|
|
||||||
@.str.11 = private unnamed_addr constant [37 x i8] c"\0A******SIZE OF UNSIGNED LONG%d*****\0A\00", align 1
|
|
||||||
@.str.12 = private unnamed_addr constant [42 x i8] c"\0A******SIZE OF UNSIGNED LONG LONG%d*****\0A\00", align 1
|
|
||||||
@.str.13 = private unnamed_addr constant [26 x i8] c"/livevar_st_ins_count.txt\00", align 1
|
|
||||||
@.str.14 = private unnamed_addr constant [39 x i8] c"\0A************XDIM and YDim are %d, %d\0A\00", align 1
|
|
||||||
@.str.15 = private unnamed_addr constant [18 x i8] c"/kernel_count.txt\00", align 1
|
|
||||||
@.str.16 = private unnamed_addr constant [16 x i8] c"Loop Count: %d\0A\00", align 1
|
|
||||||
@.str.17 = private unnamed_addr constant [55 x i8] c"From FILE: PROLOGPC= %lx, EPILOGPC=%lx, KernelPC=%lx\0A\00", align 1
|
|
||||||
@str.34 = private unnamed_addr constant [14 x i8] c"configureCGRA\00", align 1
|
|
||||||
@.str.19 = private unnamed_addr constant [14 x i8] c"\0Aloopno = %s\0A\00", align 1
|
|
||||||
@.str.20 = private unnamed_addr constant [17 x i8] c"newTC = %d + %d\0A\00", align 1
|
|
||||||
@__const.configureCGRA.initCGRAfile = private unnamed_addr constant [40 x i8] c"./CGRAExec/L1\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 1
|
|
||||||
@.str.21 = private unnamed_addr constant [14 x i8] c"/initCGRA.txt\00", align 1
|
|
||||||
@.str.22 = private unnamed_addr constant [3 x i8] c"wb\00", align 1
|
|
||||||
@.str.23 = private unnamed_addr constant [4 x i8] c"%d\0A\00", align 1
|
|
||||||
@.str.24 = private unnamed_addr constant [5 x i8] c"%ld\0A\00", align 1
|
|
||||||
@str.35 = private unnamed_addr constant [16 x i8] c"checkTotalLoops\00", align 1
|
|
||||||
@__const.checkTotalLoops.myfile = private unnamed_addr constant [40 x i8] c"./CGRAExec/total_loops.txt\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 1
|
|
||||||
@.str.26 = private unnamed_addr constant [3 x i8] c"%u\00", align 1
|
|
||||||
@str.36 = private unnamed_addr constant [12 x i8] c"\0A\0ArunOnCGRA\00", align 1
|
|
||||||
@str.37 = private unnamed_addr constant [19 x i8] c"\0A\0AaccelerateOnCGRA\00", align 1
|
|
||||||
@.str.30 = private unnamed_addr constant [35 x i8] c"Core will execute loop %u on CGRA\0A\00", align 1
|
|
||||||
@str.38 = private unnamed_addr constant [15 x i8] c"\0Adeleting cgra\00", align 1
|
|
||||||
@str.39 = private unnamed_addr constant [11 x i8] c"createCGRA\00", align 1
|
|
||||||
@str.40 = private unnamed_addr constant [35 x i8] c"Main thread calling CGRA thread...\00", align 1
|
|
||||||
@gVar1 = common local_unnamed_addr global i32 0
|
|
||||||
@gVar2 = common local_unnamed_addr global i32 0
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
define dso_local i32 @main(i32 %0, i8** nocapture readonly %1) local_unnamed_addr #0 {
|
|
||||||
call void @createCGRA()
|
|
||||||
%3 = getelementptr inbounds i8*, i8** %1, i32 1
|
|
||||||
%4 = load i8*, i8** %3, align 4, !tbaa !5
|
|
||||||
%5 = tail call i32 @strtol(i8* nocapture nonnull %4, i8** null, i32 10) #11
|
|
||||||
%6 = icmp sgt i32 %5, 1
|
|
||||||
store i32 %5, i32* @gVar1, align 4
|
|
||||||
br i1 %6, label %.preheader.preheader, label %.loopexit
|
|
||||||
|
|
||||||
.preheader.preheader: ; preds = %2
|
|
||||||
%7 = sub i32 %5, 1
|
|
||||||
%8 = sdiv i32 %7, 1
|
|
||||||
store i32 %8, i32* @dynamicTCVal, align 4
|
|
||||||
br label %9
|
|
||||||
|
|
||||||
9: ; preds = %.preheader.preheader
|
|
||||||
call void @accelerateOnCGRA(i32 1)
|
|
||||||
br label %.loopexit.loopexit
|
|
||||||
|
|
||||||
.loopexit.loopexit: ; preds = %9
|
|
||||||
br label %10
|
|
||||||
|
|
||||||
10: ; preds = %.loopexit.loopexit
|
|
||||||
%11 = load i32, i32* @gVar2, align 4
|
|
||||||
br label %.loopexit
|
|
||||||
|
|
||||||
.loopexit: ; preds = %10, %2
|
|
||||||
%12 = phi i32 [ 1, %2 ], [ %11, %10 ]
|
|
||||||
%13 = tail call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i32 0, i32 0), i32 2, i32 %5, i32 %12)
|
|
||||||
call void @deleteCGRA()
|
|
||||||
ret i32 0
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind willreturn
|
|
||||||
declare dso_local i32 @strtol(i8* readonly, i8** nocapture, i32) local_unnamed_addr #1
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @printf(i8* nocapture noundef readonly, ...) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: nounwind
|
|
||||||
define dso_local i32 @initializeParameters(i32 %0) local_unnamed_addr #3 {
|
|
||||||
%2 = alloca [25 x i8], align 1
|
|
||||||
%3 = alloca [20 x i8], align 1
|
|
||||||
%4 = alloca [40 x i8], align 1
|
|
||||||
%5 = alloca [40 x i8], align 1
|
|
||||||
%6 = alloca [40 x i8], align 1
|
|
||||||
%7 = alloca [40 x i8], align 1
|
|
||||||
%8 = alloca [40 x i8], align 1
|
|
||||||
%9 = alloca i32, align 4
|
|
||||||
%10 = alloca i32, align 4
|
|
||||||
%11 = alloca i32, align 4
|
|
||||||
%12 = alloca i32, align 4
|
|
||||||
%13 = alloca [256 x i8], align 1
|
|
||||||
%14 = alloca [40 x i8], align 1
|
|
||||||
%15 = alloca i32, align 4
|
|
||||||
%16 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @str, i32 0, i32 0))
|
|
||||||
%17 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%18 = add i32 %0, -1
|
|
||||||
%19 = mul i32 %18, 7
|
|
||||||
%20 = getelementptr inbounds i32, i32* %17, i32 %19
|
|
||||||
store i32 2011168768, i32* %20, align 4, !tbaa !9
|
|
||||||
%21 = getelementptr inbounds i32, i32* %20, i32 1
|
|
||||||
store i32 2011168768, i32* %21, align 4, !tbaa !9
|
|
||||||
%22 = getelementptr inbounds i32, i32* %20, i32 2
|
|
||||||
%23 = getelementptr inbounds [25 x i8], [25 x i8]* %2, i32 0, i32 0
|
|
||||||
%24 = bitcast i32* %22 to i8*
|
|
||||||
tail call void @llvm.memset.p0i8.i64(i8* nonnull align 4 dereferenceable(20) %24, i8 0, i64 20, i1 false)
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 25, i8* nonnull %23) #11
|
|
||||||
%25 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 20, i8* nonnull %25) #11
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(20) %25, i8* nonnull align 1 dereferenceable(20) getelementptr inbounds ([20 x i8], [20 x i8]* @__const.configureCGRA.directoryPath, i32 0, i32 0), i32 20, i1 false)
|
|
||||||
%26 = call i32 (i8*, i8*, ...) @sprintf(i8* nonnull %23, i8* nonnull dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i32 0, i32 0), i32 %0) #11
|
|
||||||
%27 = call i8* @strcat(i8* nonnull %25, i8* nonnull %23) #11
|
|
||||||
%28 = getelementptr inbounds [40 x i8], [40 x i8]* %4, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %28) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %28, i8 0, i32 40, i1 false)
|
|
||||||
%29 = getelementptr inbounds [40 x i8], [40 x i8]* %5, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %29) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %29, i8 0, i32 40, i1 false)
|
|
||||||
%30 = getelementptr inbounds [40 x i8], [40 x i8]* %6, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %30) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %30, i8 0, i32 40, i1 false)
|
|
||||||
%31 = getelementptr inbounds [40 x i8], [40 x i8]* %7, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %31) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %31, i8 0, i32 40, i1 false)
|
|
||||||
%32 = getelementptr inbounds [40 x i8], [40 x i8]* %8, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %32) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %32, i8 0, i32 40, i1 false)
|
|
||||||
%33 = call i8* @strcat(i8* nonnull %28, i8* nonnull %25) #11
|
|
||||||
%34 = call i32 @strlen(i8* nonnull %28)
|
|
||||||
%35 = getelementptr [40 x i8], [40 x i8]* %4, i32 0, i32 %34
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(16) %35, i8* nonnull align 1 dereferenceable(16) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i32 0, i32 0), i32 16, i1 false)
|
|
||||||
%36 = call i8* @strcat(i8* nonnull %29, i8* nonnull %25) #11
|
|
||||||
%37 = call i32 @strlen(i8* nonnull %29)
|
|
||||||
%38 = getelementptr [40 x i8], [40 x i8]* %5, i32 0, i32 %37
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(16) %38, i8* nonnull align 1 dereferenceable(16) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.3, i32 0, i32 0), i32 16, i1 false)
|
|
||||||
%39 = call i8* @strcat(i8* nonnull %30, i8* nonnull %25) #11
|
|
||||||
%40 = call i32 @strlen(i8* nonnull %30)
|
|
||||||
%41 = getelementptr [40 x i8], [40 x i8]* %6, i32 0, i32 %40
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(16) %41, i8* nonnull align 1 dereferenceable(16) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.4, i32 0, i32 0), i32 16, i1 false)
|
|
||||||
%42 = call i8* @strcat(i8* nonnull %32, i8* nonnull %25) #11
|
|
||||||
%43 = call i32 @strlen(i8* nonnull %32)
|
|
||||||
%44 = getelementptr [40 x i8], [40 x i8]* %8, i32 0, i32 %43
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(17) %44, i8* nonnull align 1 dereferenceable(17) getelementptr inbounds ([17 x i8], [17 x i8]* @.str.5, i32 0, i32 0), i32 17, i1 false)
|
|
||||||
%45 = call %struct._IO_FILE* @fopen(i8* nonnull %28, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.6, i32 0, i32 0))
|
|
||||||
%46 = call %struct._IO_FILE* @fopen(i8* nonnull %29, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.6, i32 0, i32 0))
|
|
||||||
%47 = call %struct._IO_FILE* @fopen(i8* nonnull %30, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.6, i32 0, i32 0))
|
|
||||||
%48 = call %struct._IO_FILE* @fopen(i8* nonnull %32, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.7, i32 0, i32 0))
|
|
||||||
%49 = bitcast i32* %9 to i8*
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %49) #11
|
|
||||||
%50 = bitcast i32* %10 to i8*
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %50) #11
|
|
||||||
%51 = bitcast i32* %11 to i8*
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %51) #11
|
|
||||||
%52 = bitcast i32* %12 to i8*
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %52) #11
|
|
||||||
%53 = call i32 @fread(i8* nonnull %49, i32 4, i32 1, %struct._IO_FILE* %45)
|
|
||||||
%54 = call i32 @fread(i8* nonnull %50, i32 4, i32 1, %struct._IO_FILE* %46)
|
|
||||||
%55 = call i32 @fread(i8* nonnull %51, i32 4, i32 1, %struct._IO_FILE* %47)
|
|
||||||
%56 = load i32, i32* %9, align 4, !tbaa !9
|
|
||||||
%57 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @.str.8, i32 0, i32 0), i32 %56)
|
|
||||||
%58 = load i32, i32* %10, align 4, !tbaa !9
|
|
||||||
%59 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @.str.9, i32 0, i32 0), i32 %58)
|
|
||||||
%60 = load i32, i32* %11, align 4, !tbaa !9
|
|
||||||
%61 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @.str.10, i32 0, i32 0), i32 %60)
|
|
||||||
%62 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @.str.11, i32 0, i32 0), i32 4)
|
|
||||||
%63 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @.str.12, i32 0, i32 0), i32 8)
|
|
||||||
%64 = shl i32 %56, 3
|
|
||||||
%65 = call noalias i8* @malloc(i32 %64) #11
|
|
||||||
store i8* %65, i8** bitcast (i32** @epilog to i8**), align 4, !tbaa !5
|
|
||||||
%66 = shl i32 %58, 3
|
|
||||||
%67 = call noalias i8* @malloc(i32 %66) #11
|
|
||||||
store i8* %67, i8** bitcast (i32** @prolog to i8**), align 4, !tbaa !5
|
|
||||||
%68 = shl i32 %60, 3
|
|
||||||
%69 = call noalias i8* @malloc(i32 %68) #11
|
|
||||||
store i8* %69, i8** bitcast (i32** @kernel to i8**), align 4, !tbaa !5
|
|
||||||
%70 = call i32 @fread(i8* %65, i32 8, i32 %56, %struct._IO_FILE* %45)
|
|
||||||
%71 = load i8*, i8** bitcast (i32** @prolog to i8**), align 4, !tbaa !5
|
|
||||||
%72 = call i32 @fread(i8* %71, i32 8, i32 %58, %struct._IO_FILE* %46)
|
|
||||||
%73 = load i8*, i8** bitcast (i32** @kernel to i8**), align 4, !tbaa !5
|
|
||||||
%74 = call i32 @fread(i8* %73, i32 8, i32 %60, %struct._IO_FILE* %47)
|
|
||||||
%75 = call i8* @strcat(i8* nonnull %31, i8* nonnull %25) #11
|
|
||||||
%76 = call i32 @strlen(i8* nonnull %31)
|
|
||||||
%77 = getelementptr [40 x i8], [40 x i8]* %7, i32 0, i32 %76
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(26) %77, i8* nonnull align 1 dereferenceable(26) getelementptr inbounds ([26 x i8], [26 x i8]* @.str.13, i32 0, i32 0), i32 26, i1 false)
|
|
||||||
%78 = call %struct._IO_FILE* @fopen(i8* nonnull %31, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.7, i32 0, i32 0))
|
|
||||||
%79 = call i32 (%struct._IO_FILE*, i8*, ...) @__isoc99_fscanf(%struct._IO_FILE* %78, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i32 0, i32 0), i32* nonnull %12) #11
|
|
||||||
%80 = getelementptr inbounds [256 x i8], [256 x i8]* %13, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 256, i8* nonnull %80) #11
|
|
||||||
%81 = call i8* @fgets(i8* nonnull %80, i32 256, %struct._IO_FILE* %48)
|
|
||||||
%82 = icmp eq i8* %81, null
|
|
||||||
br i1 %82, label %.loopexit, label %.preheader.preheader
|
|
||||||
|
|
||||||
.preheader.preheader: ; preds = %1
|
|
||||||
br label %.preheader
|
|
||||||
|
|
||||||
.preheader: ; preds = %94, %.preheader.preheader
|
|
||||||
%83 = phi i32 [ %96, %94 ], [ 0, %.preheader.preheader ]
|
|
||||||
%84 = phi i32 [ %95, %94 ], [ 0, %.preheader.preheader ]
|
|
||||||
%85 = phi i32 [ %86, %94 ], [ 0, %.preheader.preheader ]
|
|
||||||
%86 = add nuw nsw i32 %85, 1
|
|
||||||
%87 = icmp eq i32 %85, 0
|
|
||||||
br i1 %87, label %88, label %90
|
|
||||||
|
|
||||||
88: ; preds = %.preheader
|
|
||||||
%89 = call i32 @strtol(i8* nocapture nonnull %80, i8** null, i32 10) #11
|
|
||||||
br label %94
|
|
||||||
|
|
||||||
90: ; preds = %.preheader
|
|
||||||
%91 = icmp eq i32 %86, 2
|
|
||||||
br i1 %91, label %92, label %.loopexit.loopexit
|
|
||||||
|
|
||||||
92: ; preds = %90
|
|
||||||
%93 = call i32 @strtol(i8* nocapture nonnull %80, i8** null, i32 10) #11
|
|
||||||
br label %94
|
|
||||||
|
|
||||||
94: ; preds = %92, %88
|
|
||||||
%95 = phi i32 [ %84, %88 ], [ %93, %92 ]
|
|
||||||
%96 = phi i32 [ %89, %88 ], [ %83, %92 ]
|
|
||||||
%97 = call i8* @fgets(i8* nonnull %80, i32 256, %struct._IO_FILE* %48)
|
|
||||||
%98 = icmp eq i8* %97, null
|
|
||||||
br i1 %98, label %.loopexit.loopexit, label %.preheader, !llvm.loop !11
|
|
||||||
|
|
||||||
.loopexit.loopexit: ; preds = %94, %90
|
|
||||||
%.ph = phi i32 [ %95, %94 ], [ %84, %90 ]
|
|
||||||
%.ph6 = phi i32 [ %96, %94 ], [ %83, %90 ]
|
|
||||||
br label %.loopexit
|
|
||||||
|
|
||||||
.loopexit: ; preds = %.loopexit.loopexit, %1
|
|
||||||
%99 = phi i32 [ 0, %1 ], [ %.ph, %.loopexit.loopexit ]
|
|
||||||
%100 = phi i32 [ 0, %1 ], [ %.ph6, %.loopexit.loopexit ]
|
|
||||||
%101 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @.str.14, i32 0, i32 0), i32 %100, i32 %99)
|
|
||||||
%102 = mul nsw i32 %100, %99
|
|
||||||
%103 = sdiv i32 %60, %102
|
|
||||||
%104 = sdiv i32 %56, %102
|
|
||||||
%105 = sdiv i32 %58, %102
|
|
||||||
%106 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%107 = getelementptr inbounds i32, i32* %106, i32 %19
|
|
||||||
%108 = getelementptr inbounds i32, i32* %107, i32 2
|
|
||||||
store i32 %103, i32* %108, align 4, !tbaa !9
|
|
||||||
%109 = getelementptr inbounds i32, i32* %107, i32 3
|
|
||||||
store i32 %104, i32* %109, align 4, !tbaa !9
|
|
||||||
%110 = getelementptr inbounds i32, i32* %107, i32 4
|
|
||||||
store i32 %105, i32* %110, align 4, !tbaa !9
|
|
||||||
%111 = load i32, i32* %12, align 4, !tbaa !9
|
|
||||||
%112 = sdiv i32 %111, %102
|
|
||||||
%113 = getelementptr inbounds i32, i32* %107, i32 6
|
|
||||||
store i32 %112, i32* %113, align 4, !tbaa !9
|
|
||||||
%114 = call i32 @fclose(%struct._IO_FILE* %45)
|
|
||||||
%115 = call i32 @fclose(%struct._IO_FILE* %46)
|
|
||||||
%116 = call i32 @fclose(%struct._IO_FILE* %47)
|
|
||||||
%117 = call i32 @fclose(%struct._IO_FILE* %78)
|
|
||||||
%118 = call i32 @fclose(%struct._IO_FILE* %48)
|
|
||||||
%119 = getelementptr inbounds [40 x i8], [40 x i8]* %14, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %119) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %119, i8 0, i32 40, i1 false)
|
|
||||||
%120 = call i8* @strcat(i8* nonnull %119, i8* nonnull %25) #11
|
|
||||||
%121 = call i32 @strlen(i8* nonnull %119)
|
|
||||||
%122 = getelementptr [40 x i8], [40 x i8]* %14, i32 0, i32 %121
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(18) %122, i8* nonnull align 1 dereferenceable(18) getelementptr inbounds ([18 x i8], [18 x i8]* @.str.15, i32 0, i32 0), i32 18, i1 false)
|
|
||||||
%123 = bitcast i32* %15 to i8*
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %123) #11
|
|
||||||
store i32 0, i32* %15, align 4, !tbaa !9
|
|
||||||
%124 = call %struct._IO_FILE* @fopen(i8* nonnull %119, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.7, i32 0, i32 0))
|
|
||||||
%125 = call i32 (%struct._IO_FILE*, i8*, ...) @__isoc99_fscanf(%struct._IO_FILE* %124, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i32 0, i32 0), i32* nonnull %15) #11
|
|
||||||
%126 = call i32 @fclose(%struct._IO_FILE* %124)
|
|
||||||
%127 = load i32, i32* %15, align 4, !tbaa !9
|
|
||||||
%128 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.16, i32 0, i32 0), i32 %127)
|
|
||||||
%129 = load i32, i32* %15, align 4, !tbaa !9
|
|
||||||
%130 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%131 = getelementptr inbounds i32, i32* %130, i32 %19
|
|
||||||
%132 = getelementptr inbounds i32, i32* %131, i32 5
|
|
||||||
store i32 %129, i32* %132, align 4, !tbaa !9
|
|
||||||
%133 = load i32*, i32** @prolog, align 4, !tbaa !5
|
|
||||||
%134 = ptrtoint i32* %133 to i32
|
|
||||||
%135 = load i32*, i32** @epilog, align 4, !tbaa !5
|
|
||||||
%136 = ptrtoint i32* %135 to i32
|
|
||||||
%137 = load i32*, i32** @kernel, align 4, !tbaa !5
|
|
||||||
%138 = ptrtoint i32* %137 to i32
|
|
||||||
%139 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([55 x i8], [55 x i8]* @.str.17, i32 0, i32 0), i32 %134, i32 %136, i32 %138)
|
|
||||||
%140 = load i32*, i32** @prolog, align 4, !tbaa !5
|
|
||||||
%141 = ptrtoint i32* %140 to i32
|
|
||||||
%142 = load i32*, i32** @prologPtr, align 4, !tbaa !5
|
|
||||||
%143 = getelementptr inbounds i32, i32* %142, i32 %18
|
|
||||||
store i32 %141, i32* %143, align 4, !tbaa !14
|
|
||||||
%144 = load i32*, i32** @epilog, align 4, !tbaa !5
|
|
||||||
%145 = ptrtoint i32* %144 to i32
|
|
||||||
%146 = load i32*, i32** @epilogPtr, align 4, !tbaa !5
|
|
||||||
%147 = getelementptr inbounds i32, i32* %146, i32 %18
|
|
||||||
store i32 %145, i32* %147, align 4, !tbaa !14
|
|
||||||
%148 = load i32*, i32** @kernel, align 4, !tbaa !5
|
|
||||||
%149 = ptrtoint i32* %148 to i32
|
|
||||||
%150 = load i32*, i32** @kernelPtr, align 4, !tbaa !5
|
|
||||||
%151 = getelementptr inbounds i32, i32* %150, i32 %18
|
|
||||||
store i32 %149, i32* %151, align 4, !tbaa !14
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %123) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %119) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 256, i8* nonnull %80) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %52) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %51) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %50) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %49) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %32) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %31) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %30) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %29) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %28) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 20, i8* nonnull %25) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 25, i8* nonnull %23) #11
|
|
||||||
ret i32 0
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare noundef i32 @puts(i8* nocapture noundef readonly) local_unnamed_addr #4
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
|
|
||||||
declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1 immarg) #5
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nosync nounwind willreturn
|
|
||||||
declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #6
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nosync nounwind willreturn
|
|
||||||
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture writeonly, i8* noalias nocapture readonly, i32, i1 immarg) #6
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @sprintf(i8* noalias nocapture noundef writeonly, i8* nocapture noundef readonly, ...) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nounwind willreturn
|
|
||||||
declare dso_local i8* @strcat(i8* noalias returned writeonly, i8* noalias nocapture readonly) local_unnamed_addr #7
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
|
|
||||||
declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i1 immarg) #5
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nounwind readonly willreturn
|
|
||||||
declare i32 @strlen(i8* nocapture) local_unnamed_addr #8
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noalias noundef %struct._IO_FILE* @fopen(i8* nocapture noundef readonly, i8* nocapture noundef readonly) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @fread(i8* nocapture noundef, i32 noundef, i32 noundef, %struct._IO_FILE* nocapture noundef) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: inaccessiblememonly nofree nounwind willreturn
|
|
||||||
declare dso_local noalias noundef i8* @malloc(i32) local_unnamed_addr #9
|
|
||||||
|
|
||||||
declare dso_local i32 @__isoc99_fscanf(%struct._IO_FILE*, i8*, ...) local_unnamed_addr #10
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i8* @fgets(i8* noundef, i32 noundef, %struct._IO_FILE* nocapture noundef) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @fclose(%struct._IO_FILE* nocapture noundef) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nosync nounwind willreturn
|
|
||||||
declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #6
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
define dso_local i32 @configureCGRA(i32 %0) local_unnamed_addr #0 {
|
|
||||||
%2 = alloca [25 x i8], align 1
|
|
||||||
%3 = alloca [20 x i8], align 1
|
|
||||||
%4 = alloca [40 x i8], align 1
|
|
||||||
%5 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str.34, i32 0, i32 0))
|
|
||||||
%6 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%7 = add i32 %0, -1
|
|
||||||
%8 = mul i32 %7, 7
|
|
||||||
%9 = getelementptr inbounds i32, i32* %6, i32 %8
|
|
||||||
%10 = getelementptr inbounds i32, i32* %9, i32 5
|
|
||||||
%11 = load i32, i32* %10, align 4, !tbaa !9
|
|
||||||
%12 = getelementptr inbounds [25 x i8], [25 x i8]* %2, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 25, i8* nonnull %12) #11
|
|
||||||
%13 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 20, i8* nonnull %13) #11
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(20) %13, i8* nonnull align 1 dereferenceable(20) getelementptr inbounds ([20 x i8], [20 x i8]* @__const.configureCGRA.directoryPath, i32 0, i32 0), i32 20, i1 false)
|
|
||||||
%14 = call i32 (i8*, i8*, ...) @sprintf(i8* nonnull %12, i8* nonnull dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i32 0, i32 0), i32 %0) #11
|
|
||||||
%15 = call i8* @strcat(i8* nonnull %13, i8* nonnull %12) #11
|
|
||||||
%16 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str.19, i32 0, i32 0), i8* nonnull %12)
|
|
||||||
%17 = icmp slt i32 %11, 1
|
|
||||||
br i1 %17, label %18, label %25
|
|
||||||
|
|
||||||
18: ; preds = %1
|
|
||||||
%19 = load i32, i32* @dynamicTCVal, align 4, !tbaa !9
|
|
||||||
%20 = add nsw i32 %19, %11
|
|
||||||
%21 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @.str.20, i32 0, i32 0), i32 %11, i32 %19)
|
|
||||||
%22 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%23 = getelementptr inbounds i32, i32* %22, i32 %8
|
|
||||||
%24 = getelementptr inbounds i32, i32* %23, i32 5
|
|
||||||
store i32 %20, i32* %24, align 4, !tbaa !9
|
|
||||||
br label %25
|
|
||||||
|
|
||||||
25: ; preds = %18, %1
|
|
||||||
%26 = getelementptr inbounds [40 x i8], [40 x i8]* %4, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %26) #11
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %26, i8* nonnull align 1 dereferenceable(40) getelementptr inbounds ([40 x i8], [40 x i8]* @__const.configureCGRA.initCGRAfile, i32 0, i32 0), i32 40, i1 false)
|
|
||||||
%27 = call i32 @strlen(i8* nonnull %26)
|
|
||||||
%28 = getelementptr [40 x i8], [40 x i8]* %4, i32 0, i32 %27
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(14) %28, i8* nonnull align 1 dereferenceable(14) getelementptr inbounds ([14 x i8], [14 x i8]* @.str.21, i32 0, i32 0), i32 14, i1 false)
|
|
||||||
%29 = call %struct._IO_FILE* @fopen(i8* nonnull %26, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.22, i32 0, i32 0))
|
|
||||||
br label %30
|
|
||||||
|
|
||||||
30: ; preds = %30, %25
|
|
||||||
%31 = phi i32 [ 0, %25 ], [ %37, %30 ]
|
|
||||||
%32 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%33 = getelementptr inbounds i32, i32* %32, i32 %8
|
|
||||||
%34 = getelementptr inbounds i32, i32* %33, i32 %31
|
|
||||||
%35 = load i32, i32* %34, align 4, !tbaa !9
|
|
||||||
%36 = call i32 (%struct._IO_FILE*, i8*, ...) @fprintf(%struct._IO_FILE* %29, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.23, i32 0, i32 0), i32 %35)
|
|
||||||
%37 = add nuw nsw i32 %31, 1
|
|
||||||
%38 = icmp eq i32 %37, 7
|
|
||||||
br i1 %38, label %39, label %30, !llvm.loop !16
|
|
||||||
|
|
||||||
39: ; preds = %30
|
|
||||||
%40 = load i32*, i32** @epilogPtr, align 4, !tbaa !5
|
|
||||||
%41 = getelementptr inbounds i32, i32* %40, i32 %7
|
|
||||||
%42 = load i32, i32* %41, align 4, !tbaa !14
|
|
||||||
%43 = zext i32 %42 to i64
|
|
||||||
%44 = call i32 (%struct._IO_FILE*, i8*, ...) @fprintf(%struct._IO_FILE* %29, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.24, i32 0, i32 0), i64 %43)
|
|
||||||
%45 = load i32*, i32** @prologPtr, align 4, !tbaa !5
|
|
||||||
%46 = getelementptr inbounds i32, i32* %45, i32 %7
|
|
||||||
%47 = load i32, i32* %46, align 4, !tbaa !14
|
|
||||||
%48 = zext i32 %47 to i64
|
|
||||||
%49 = call i32 (%struct._IO_FILE*, i8*, ...) @fprintf(%struct._IO_FILE* %29, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.24, i32 0, i32 0), i64 %48)
|
|
||||||
%50 = load i32*, i32** @kernelPtr, align 4, !tbaa !5
|
|
||||||
%51 = getelementptr inbounds i32, i32* %50, i32 %7
|
|
||||||
%52 = load i32, i32* %51, align 4, !tbaa !14
|
|
||||||
%53 = zext i32 %52 to i64
|
|
||||||
%54 = call i32 (%struct._IO_FILE*, i8*, ...) @fprintf(%struct._IO_FILE* %29, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.24, i32 0, i32 0), i64 %53)
|
|
||||||
%55 = call i32 @fclose(%struct._IO_FILE* %29)
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %26) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 20, i8* nonnull %13) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 25, i8* nonnull %12) #11
|
|
||||||
ret i32 0
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @fprintf(%struct._IO_FILE* nocapture noundef, i8* nocapture noundef readonly, ...) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: nounwind
|
|
||||||
define dso_local void @checkTotalLoops() local_unnamed_addr #3 {
|
|
||||||
%1 = alloca [40 x i8], align 1
|
|
||||||
%2 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str.35, i32 0, i32 0))
|
|
||||||
%3 = getelementptr inbounds [40 x i8], [40 x i8]* %1, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %3) #11
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %3, i8* nonnull align 1 dereferenceable(40) getelementptr inbounds ([40 x i8], [40 x i8]* @__const.checkTotalLoops.myfile, i32 0, i32 0), i32 40, i1 false)
|
|
||||||
%4 = call %struct._IO_FILE* @fopen(i8* nonnull %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.7, i32 0, i32 0))
|
|
||||||
%5 = tail call i32 (%struct._IO_FILE*, i8*, ...) @__isoc99_fscanf(%struct._IO_FILE* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.26, i32 0, i32 0), i32* nonnull @totalLoops) #11
|
|
||||||
%6 = tail call i32 @fclose(%struct._IO_FILE* %4)
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %3) #11
|
|
||||||
ret void
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nounwind
|
|
||||||
define dso_local i8* @runOnCGRA() local_unnamed_addr #3 {
|
|
||||||
%1 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str.36, i32 0, i32 0))
|
|
||||||
tail call void asm sideeffect "mov r11,$0", "r"(i32 15) #11, !srcloc !17
|
|
||||||
ret i8* null
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nounwind
|
|
||||||
define dso_local void @accelerateOnCGRA(i32 %0) local_unnamed_addr #3 {
|
|
||||||
%2 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str.37, i32 0, i32 0))
|
|
||||||
%3 = tail call i32 @configureCGRA(i32 %0)
|
|
||||||
%4 = tail call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @.str.30, i32 0, i32 0), i32 %0)
|
|
||||||
%5 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str.36, i32 0, i32 0)) #11
|
|
||||||
tail call void asm sideeffect "mov r11,$0", "r"(i32 15) #11, !srcloc !17
|
|
||||||
ret void
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
define dso_local void @deleteCGRA() local_unnamed_addr #0 {
|
|
||||||
%1 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str.38, i32 0, i32 0))
|
|
||||||
ret void
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nounwind
|
|
||||||
define dso_local void @createCGRA() local_unnamed_addr #3 {
|
|
||||||
%1 = alloca [40 x i8], align 1
|
|
||||||
%2 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str.39, i32 0, i32 0))
|
|
||||||
%3 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str.35, i32 0, i32 0)) #11
|
|
||||||
%4 = getelementptr inbounds [40 x i8], [40 x i8]* %1, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %4) #11
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %4, i8* nonnull align 1 dereferenceable(40) getelementptr inbounds ([40 x i8], [40 x i8]* @__const.checkTotalLoops.myfile, i32 0, i32 0), i32 40, i1 false) #11
|
|
||||||
%5 = call %struct._IO_FILE* @fopen(i8* nonnull %4, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.7, i32 0, i32 0)) #11
|
|
||||||
%6 = tail call i32 (%struct._IO_FILE*, i8*, ...) @__isoc99_fscanf(%struct._IO_FILE* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.26, i32 0, i32 0), i32* nonnull @totalLoops) #11
|
|
||||||
%7 = tail call i32 @fclose(%struct._IO_FILE* %5) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %4) #11
|
|
||||||
%8 = load i32, i32* @totalLoops, align 4, !tbaa !9
|
|
||||||
%9 = mul i32 %8, 28
|
|
||||||
%10 = tail call noalias i8* @malloc(i32 %9) #11
|
|
||||||
store i8* %10, i8** bitcast (i32** @initCGRA to i8**), align 4, !tbaa !5
|
|
||||||
%11 = shl i32 %8, 2
|
|
||||||
%12 = tail call noalias i8* @malloc(i32 %11) #11
|
|
||||||
store i8* %12, i8** bitcast (i32** @prologPtr to i8**), align 4, !tbaa !5
|
|
||||||
%13 = tail call noalias i8* @malloc(i32 %11) #11
|
|
||||||
store i8* %13, i8** bitcast (i32** @kernelPtr to i8**), align 4, !tbaa !5
|
|
||||||
%14 = tail call noalias i8* @malloc(i32 %11) #11
|
|
||||||
store i8* %14, i8** bitcast (i32** @epilogPtr to i8**), align 4, !tbaa !5
|
|
||||||
%15 = icmp eq i32 %8, 0
|
|
||||||
br i1 %15, label %.loopexit, label %.preheader.preheader
|
|
||||||
|
|
||||||
.preheader.preheader: ; preds = %0
|
|
||||||
br label %.preheader
|
|
||||||
|
|
||||||
.preheader: ; preds = %.preheader, %.preheader.preheader
|
|
||||||
%16 = phi i32 [ %18, %.preheader ], [ 1, %.preheader.preheader ]
|
|
||||||
%17 = tail call i32 @initializeParameters(i32 %16)
|
|
||||||
%18 = add i32 %16, 1
|
|
||||||
%19 = load i32, i32* @totalLoops, align 4, !tbaa !9
|
|
||||||
%20 = icmp ugt i32 %18, %19
|
|
||||||
br i1 %20, label %.loopexit.loopexit, label %.preheader, !llvm.loop !18
|
|
||||||
|
|
||||||
.loopexit.loopexit: ; preds = %.preheader
|
|
||||||
br label %.loopexit
|
|
||||||
|
|
||||||
.loopexit: ; preds = %.loopexit.loopexit, %0
|
|
||||||
%21 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str.40, i32 0, i32 0))
|
|
||||||
ret void
|
|
||||||
}
|
|
||||||
|
|
||||||
attributes #0 = { nofree nounwind "disable-tail-calls"="false" "frame-pointer"="none" "min-legal-vector-width"="0" "no-jump-tables"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #1 = { nofree nounwind willreturn "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #2 = { nofree nounwind "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #3 = { nounwind "disable-tail-calls"="false" "frame-pointer"="none" "min-legal-vector-width"="0" "no-jump-tables"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #4 = { nofree nounwind }
|
|
||||||
attributes #5 = { argmemonly nofree nosync nounwind willreturn writeonly }
|
|
||||||
attributes #6 = { argmemonly nofree nosync nounwind willreturn }
|
|
||||||
attributes #7 = { argmemonly nofree nounwind willreturn "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #8 = { argmemonly nofree nounwind readonly willreturn }
|
|
||||||
attributes #9 = { inaccessiblememonly nofree nounwind willreturn "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #10 = { "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #11 = { nounwind }
|
|
||||||
|
|
||||||
!llvm.ident = !{!0, !0}
|
|
||||||
!llvm.module.flags = !{!1, !2, !3, !4}
|
|
||||||
|
|
||||||
!0 = !{!"clang version 13.0.0 (https://github.com/MPSLab-ASU/CCF-20.04/ 05285de7579f417a4d73ad832b8f4cc497f25235)"}
|
|
||||||
!1 = !{i32 7, !"Dwarf Version", i32 4}
|
|
||||||
!2 = !{i32 2, !"Debug Info Version", i32 3}
|
|
||||||
!3 = !{i32 1, !"wchar_size", i32 4}
|
|
||||||
!4 = !{i32 1, !"min_enum_size", i32 4}
|
|
||||||
!5 = !{!6, !6, i64 0}
|
|
||||||
!6 = !{!"any pointer", !7, i64 0}
|
|
||||||
!7 = !{!"omnipotent char", !8, i64 0}
|
|
||||||
!8 = !{!"Simple C/C++ TBAA"}
|
|
||||||
!9 = !{!10, !10, i64 0}
|
|
||||||
!10 = !{!"int", !7, i64 0}
|
|
||||||
!11 = distinct !{!11, !12, !13}
|
|
||||||
!12 = !{!"llvm.loop.mustprogress"}
|
|
||||||
!13 = !{!"llvm.loop.unroll.disable"}
|
|
||||||
!14 = !{!15, !15, i64 0}
|
|
||||||
!15 = !{!"long", !7, i64 0}
|
|
||||||
!16 = distinct !{!16, !12, !13}
|
|
||||||
!17 = !{i32 5341}
|
|
||||||
!18 = distinct !{!18, !12, !13}
|
|
||||||
|
|
@ -6,7 +6,7 @@ Cclock,0.7
|
||||||
CPUclock,2
|
CPUclock,2
|
||||||
Mem,8GB
|
Mem,8GB
|
||||||
MODE,0
|
MODE,0
|
||||||
ALGO,RAMP
|
ALGO,GraphMinor
|
||||||
MSA,10
|
MSA,10
|
||||||
MAPII,10
|
MAPII,10
|
||||||
MAX_MAP,1000
|
MAX_MAP,1000
|
||||||
|
|
|
||||||
|
|
|
@ -1,579 +0,0 @@
|
||||||
; ModuleID = 'CondDDGGen.bc'
|
|
||||||
source_filename = "llvm-link"
|
|
||||||
target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
|
|
||||||
target triple = "armv7-none-linux-eabi"
|
|
||||||
|
|
||||||
%struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, %struct._IO_codecvt*, %struct._IO_wide_data*, %struct._IO_FILE*, i8*, i32, i32, [40 x i8] }
|
|
||||||
%struct._IO_marker = type opaque
|
|
||||||
%struct._IO_codecvt = type opaque
|
|
||||||
%struct._IO_wide_data = type opaque
|
|
||||||
|
|
||||||
@.str = private unnamed_addr constant [24 x i8] c"***** %d^%d = %d *****\0A\00", align 1
|
|
||||||
@totalLoops = dso_local global i32 0, align 4
|
|
||||||
@dynamicTCVal = dso_local local_unnamed_addr global i32 0, align 4
|
|
||||||
@initCGRA = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@epilog = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@prolog = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@kernel = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@prologPtr = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@epilogPtr = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@kernelPtr = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@ArrPtr = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@pth = dso_local local_unnamed_addr global i32 0, align 4
|
|
||||||
@str = private unnamed_addr constant [34 x i8] c"from cgra.c Initialize Parameters\00", align 1
|
|
||||||
@__const.configureCGRA.directoryPath = private unnamed_addr constant [20 x i8] c"./CGRAExec/L\00\00\00\00\00\00\00\00", align 1
|
|
||||||
@.str.1 = private unnamed_addr constant [3 x i8] c"%d\00", align 1
|
|
||||||
@.str.2 = private unnamed_addr constant [16 x i8] c"/epilog_ins.bin\00", align 1
|
|
||||||
@.str.3 = private unnamed_addr constant [16 x i8] c"/prolog_ins.bin\00", align 1
|
|
||||||
@.str.4 = private unnamed_addr constant [16 x i8] c"/kernel_ins.bin\00", align 1
|
|
||||||
@.str.5 = private unnamed_addr constant [17 x i8] c"/CGRA_config.txt\00", align 1
|
|
||||||
@.str.6 = private unnamed_addr constant [3 x i8] c"rb\00", align 1
|
|
||||||
@.str.7 = private unnamed_addr constant [2 x i8] c"r\00", align 1
|
|
||||||
@.str.8 = private unnamed_addr constant [32 x i8] c"\0A**********EPISIZE %d*********\0A\00", align 1
|
|
||||||
@.str.9 = private unnamed_addr constant [32 x i8] c"\0A**********PROSIZE %d*********\0A\00", align 1
|
|
||||||
@.str.10 = private unnamed_addr constant [33 x i8] c"\0A**********KERNSIZE %d*********\0A\00", align 1
|
|
||||||
@.str.11 = private unnamed_addr constant [37 x i8] c"\0A******SIZE OF UNSIGNED LONG%d*****\0A\00", align 1
|
|
||||||
@.str.12 = private unnamed_addr constant [42 x i8] c"\0A******SIZE OF UNSIGNED LONG LONG%d*****\0A\00", align 1
|
|
||||||
@.str.13 = private unnamed_addr constant [26 x i8] c"/livevar_st_ins_count.txt\00", align 1
|
|
||||||
@.str.14 = private unnamed_addr constant [39 x i8] c"\0A************XDIM and YDim are %d, %d\0A\00", align 1
|
|
||||||
@.str.15 = private unnamed_addr constant [18 x i8] c"/kernel_count.txt\00", align 1
|
|
||||||
@.str.16 = private unnamed_addr constant [16 x i8] c"Loop Count: %d\0A\00", align 1
|
|
||||||
@.str.17 = private unnamed_addr constant [55 x i8] c"From FILE: PROLOGPC= %lx, EPILOGPC=%lx, KernelPC=%lx\0A\00", align 1
|
|
||||||
@str.34 = private unnamed_addr constant [14 x i8] c"configureCGRA\00", align 1
|
|
||||||
@.str.19 = private unnamed_addr constant [14 x i8] c"\0Aloopno = %s\0A\00", align 1
|
|
||||||
@.str.20 = private unnamed_addr constant [17 x i8] c"newTC = %d + %d\0A\00", align 1
|
|
||||||
@__const.configureCGRA.initCGRAfile = private unnamed_addr constant [40 x i8] c"./CGRAExec/L1\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 1
|
|
||||||
@.str.21 = private unnamed_addr constant [14 x i8] c"/initCGRA.txt\00", align 1
|
|
||||||
@.str.22 = private unnamed_addr constant [3 x i8] c"wb\00", align 1
|
|
||||||
@.str.23 = private unnamed_addr constant [4 x i8] c"%d\0A\00", align 1
|
|
||||||
@.str.24 = private unnamed_addr constant [5 x i8] c"%ld\0A\00", align 1
|
|
||||||
@str.35 = private unnamed_addr constant [16 x i8] c"checkTotalLoops\00", align 1
|
|
||||||
@__const.checkTotalLoops.myfile = private unnamed_addr constant [40 x i8] c"./CGRAExec/total_loops.txt\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 1
|
|
||||||
@.str.26 = private unnamed_addr constant [3 x i8] c"%u\00", align 1
|
|
||||||
@str.36 = private unnamed_addr constant [12 x i8] c"\0A\0ArunOnCGRA\00", align 1
|
|
||||||
@str.37 = private unnamed_addr constant [19 x i8] c"\0A\0AaccelerateOnCGRA\00", align 1
|
|
||||||
@.str.30 = private unnamed_addr constant [35 x i8] c"Core will execute loop %u on CGRA\0A\00", align 1
|
|
||||||
@str.38 = private unnamed_addr constant [15 x i8] c"\0Adeleting cgra\00", align 1
|
|
||||||
@str.39 = private unnamed_addr constant [11 x i8] c"createCGRA\00", align 1
|
|
||||||
@str.40 = private unnamed_addr constant [35 x i8] c"Main thread calling CGRA thread...\00", align 1
|
|
||||||
@gVar1 = common local_unnamed_addr global i32 0
|
|
||||||
@gVar2 = common local_unnamed_addr global i32 0
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
define dso_local i32 @main(i32 %0, i8** nocapture readonly %1) local_unnamed_addr #0 {
|
|
||||||
%3 = getelementptr inbounds i8*, i8** %1, i32 1
|
|
||||||
%4 = load i8*, i8** %3, align 4, !tbaa !5
|
|
||||||
%5 = tail call i32 @strtol(i8* nocapture nonnull %4, i8** null, i32 10) #11
|
|
||||||
%6 = icmp sgt i32 %5, 1
|
|
||||||
store i32 %5, i32* @gVar1, align 4
|
|
||||||
br i1 %6, label %.preheader.preheader, label %.loopexit
|
|
||||||
|
|
||||||
.preheader.preheader: ; preds = %2
|
|
||||||
%7 = sub i32 %5, 1
|
|
||||||
%8 = sdiv i32 %7, 1
|
|
||||||
store i32 %8, i32* @dynamicTCVal, align 4
|
|
||||||
br label %.preheader
|
|
||||||
|
|
||||||
.loopexit.loopexit: ; preds = %.preheader
|
|
||||||
br label %9
|
|
||||||
|
|
||||||
9: ; preds = %.loopexit.loopexit
|
|
||||||
%10 = load i32, i32* @gVar2, align 4
|
|
||||||
br label %.loopexit
|
|
||||||
|
|
||||||
.loopexit: ; preds = %9, %2
|
|
||||||
%11 = phi i32 [ 1, %2 ], [ %10, %9 ]
|
|
||||||
%12 = tail call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i32 0, i32 0), i32 2, i32 %5, i32 %11)
|
|
||||||
ret i32 0
|
|
||||||
|
|
||||||
.preheader: ; preds = %.preheader, %.preheader.preheader
|
|
||||||
%13 = phi i32 [ %16, %.preheader ], [ 1, %.preheader.preheader ]
|
|
||||||
%14 = phi i32 [ %15, %.preheader ], [ 1, %.preheader.preheader ]
|
|
||||||
%15 = shl nsw i32 %14, 1
|
|
||||||
%16 = add nuw nsw i32 %13, 1
|
|
||||||
%17 = icmp eq i32 %16, %5
|
|
||||||
br i1 %17, label %.loopexit.loopexit, label %.preheader, !llvm.loop !9
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind willreturn
|
|
||||||
declare dso_local i32 @strtol(i8* readonly, i8** nocapture, i32) local_unnamed_addr #1
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @printf(i8* nocapture noundef readonly, ...) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: nounwind
|
|
||||||
define dso_local i32 @initializeParameters(i32 %0) local_unnamed_addr #3 {
|
|
||||||
%2 = alloca [25 x i8], align 1
|
|
||||||
%3 = alloca [20 x i8], align 1
|
|
||||||
%4 = alloca [40 x i8], align 1
|
|
||||||
%5 = alloca [40 x i8], align 1
|
|
||||||
%6 = alloca [40 x i8], align 1
|
|
||||||
%7 = alloca [40 x i8], align 1
|
|
||||||
%8 = alloca [40 x i8], align 1
|
|
||||||
%9 = alloca i32, align 4
|
|
||||||
%10 = alloca i32, align 4
|
|
||||||
%11 = alloca i32, align 4
|
|
||||||
%12 = alloca i32, align 4
|
|
||||||
%13 = alloca [256 x i8], align 1
|
|
||||||
%14 = alloca [40 x i8], align 1
|
|
||||||
%15 = alloca i32, align 4
|
|
||||||
%16 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @str, i32 0, i32 0))
|
|
||||||
%17 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%18 = add i32 %0, -1
|
|
||||||
%19 = mul i32 %18, 7
|
|
||||||
%20 = getelementptr inbounds i32, i32* %17, i32 %19
|
|
||||||
store i32 2011168768, i32* %20, align 4, !tbaa !13
|
|
||||||
%21 = getelementptr inbounds i32, i32* %20, i32 1
|
|
||||||
store i32 2011168768, i32* %21, align 4, !tbaa !13
|
|
||||||
%22 = getelementptr inbounds i32, i32* %20, i32 2
|
|
||||||
%23 = getelementptr inbounds [25 x i8], [25 x i8]* %2, i32 0, i32 0
|
|
||||||
%24 = bitcast i32* %22 to i8*
|
|
||||||
tail call void @llvm.memset.p0i8.i64(i8* nonnull align 4 dereferenceable(20) %24, i8 0, i64 20, i1 false)
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 25, i8* nonnull %23) #11
|
|
||||||
%25 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 20, i8* nonnull %25) #11
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(20) %25, i8* nonnull align 1 dereferenceable(20) getelementptr inbounds ([20 x i8], [20 x i8]* @__const.configureCGRA.directoryPath, i32 0, i32 0), i32 20, i1 false)
|
|
||||||
%26 = call i32 (i8*, i8*, ...) @sprintf(i8* nonnull %23, i8* nonnull dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i32 0, i32 0), i32 %0) #11
|
|
||||||
%27 = call i8* @strcat(i8* nonnull %25, i8* nonnull %23) #11
|
|
||||||
%28 = getelementptr inbounds [40 x i8], [40 x i8]* %4, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %28) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %28, i8 0, i32 40, i1 false)
|
|
||||||
%29 = getelementptr inbounds [40 x i8], [40 x i8]* %5, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %29) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %29, i8 0, i32 40, i1 false)
|
|
||||||
%30 = getelementptr inbounds [40 x i8], [40 x i8]* %6, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %30) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %30, i8 0, i32 40, i1 false)
|
|
||||||
%31 = getelementptr inbounds [40 x i8], [40 x i8]* %7, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %31) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %31, i8 0, i32 40, i1 false)
|
|
||||||
%32 = getelementptr inbounds [40 x i8], [40 x i8]* %8, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %32) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %32, i8 0, i32 40, i1 false)
|
|
||||||
%33 = call i8* @strcat(i8* nonnull %28, i8* nonnull %25) #11
|
|
||||||
%34 = call i32 @strlen(i8* nonnull %28)
|
|
||||||
%35 = getelementptr [40 x i8], [40 x i8]* %4, i32 0, i32 %34
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(16) %35, i8* nonnull align 1 dereferenceable(16) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i32 0, i32 0), i32 16, i1 false)
|
|
||||||
%36 = call i8* @strcat(i8* nonnull %29, i8* nonnull %25) #11
|
|
||||||
%37 = call i32 @strlen(i8* nonnull %29)
|
|
||||||
%38 = getelementptr [40 x i8], [40 x i8]* %5, i32 0, i32 %37
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(16) %38, i8* nonnull align 1 dereferenceable(16) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.3, i32 0, i32 0), i32 16, i1 false)
|
|
||||||
%39 = call i8* @strcat(i8* nonnull %30, i8* nonnull %25) #11
|
|
||||||
%40 = call i32 @strlen(i8* nonnull %30)
|
|
||||||
%41 = getelementptr [40 x i8], [40 x i8]* %6, i32 0, i32 %40
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(16) %41, i8* nonnull align 1 dereferenceable(16) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.4, i32 0, i32 0), i32 16, i1 false)
|
|
||||||
%42 = call i8* @strcat(i8* nonnull %32, i8* nonnull %25) #11
|
|
||||||
%43 = call i32 @strlen(i8* nonnull %32)
|
|
||||||
%44 = getelementptr [40 x i8], [40 x i8]* %8, i32 0, i32 %43
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(17) %44, i8* nonnull align 1 dereferenceable(17) getelementptr inbounds ([17 x i8], [17 x i8]* @.str.5, i32 0, i32 0), i32 17, i1 false)
|
|
||||||
%45 = call %struct._IO_FILE* @fopen(i8* nonnull %28, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.6, i32 0, i32 0))
|
|
||||||
%46 = call %struct._IO_FILE* @fopen(i8* nonnull %29, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.6, i32 0, i32 0))
|
|
||||||
%47 = call %struct._IO_FILE* @fopen(i8* nonnull %30, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.6, i32 0, i32 0))
|
|
||||||
%48 = call %struct._IO_FILE* @fopen(i8* nonnull %32, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.7, i32 0, i32 0))
|
|
||||||
%49 = bitcast i32* %9 to i8*
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %49) #11
|
|
||||||
%50 = bitcast i32* %10 to i8*
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %50) #11
|
|
||||||
%51 = bitcast i32* %11 to i8*
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %51) #11
|
|
||||||
%52 = bitcast i32* %12 to i8*
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %52) #11
|
|
||||||
%53 = call i32 @fread(i8* nonnull %49, i32 4, i32 1, %struct._IO_FILE* %45)
|
|
||||||
%54 = call i32 @fread(i8* nonnull %50, i32 4, i32 1, %struct._IO_FILE* %46)
|
|
||||||
%55 = call i32 @fread(i8* nonnull %51, i32 4, i32 1, %struct._IO_FILE* %47)
|
|
||||||
%56 = load i32, i32* %9, align 4, !tbaa !13
|
|
||||||
%57 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @.str.8, i32 0, i32 0), i32 %56)
|
|
||||||
%58 = load i32, i32* %10, align 4, !tbaa !13
|
|
||||||
%59 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @.str.9, i32 0, i32 0), i32 %58)
|
|
||||||
%60 = load i32, i32* %11, align 4, !tbaa !13
|
|
||||||
%61 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @.str.10, i32 0, i32 0), i32 %60)
|
|
||||||
%62 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @.str.11, i32 0, i32 0), i32 4)
|
|
||||||
%63 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @.str.12, i32 0, i32 0), i32 8)
|
|
||||||
%64 = shl i32 %56, 3
|
|
||||||
%65 = call noalias i8* @malloc(i32 %64) #11
|
|
||||||
store i8* %65, i8** bitcast (i32** @epilog to i8**), align 4, !tbaa !5
|
|
||||||
%66 = shl i32 %58, 3
|
|
||||||
%67 = call noalias i8* @malloc(i32 %66) #11
|
|
||||||
store i8* %67, i8** bitcast (i32** @prolog to i8**), align 4, !tbaa !5
|
|
||||||
%68 = shl i32 %60, 3
|
|
||||||
%69 = call noalias i8* @malloc(i32 %68) #11
|
|
||||||
store i8* %69, i8** bitcast (i32** @kernel to i8**), align 4, !tbaa !5
|
|
||||||
%70 = call i32 @fread(i8* %65, i32 8, i32 %56, %struct._IO_FILE* %45)
|
|
||||||
%71 = load i8*, i8** bitcast (i32** @prolog to i8**), align 4, !tbaa !5
|
|
||||||
%72 = call i32 @fread(i8* %71, i32 8, i32 %58, %struct._IO_FILE* %46)
|
|
||||||
%73 = load i8*, i8** bitcast (i32** @kernel to i8**), align 4, !tbaa !5
|
|
||||||
%74 = call i32 @fread(i8* %73, i32 8, i32 %60, %struct._IO_FILE* %47)
|
|
||||||
%75 = call i8* @strcat(i8* nonnull %31, i8* nonnull %25) #11
|
|
||||||
%76 = call i32 @strlen(i8* nonnull %31)
|
|
||||||
%77 = getelementptr [40 x i8], [40 x i8]* %7, i32 0, i32 %76
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(26) %77, i8* nonnull align 1 dereferenceable(26) getelementptr inbounds ([26 x i8], [26 x i8]* @.str.13, i32 0, i32 0), i32 26, i1 false)
|
|
||||||
%78 = call %struct._IO_FILE* @fopen(i8* nonnull %31, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.7, i32 0, i32 0))
|
|
||||||
%79 = call i32 (%struct._IO_FILE*, i8*, ...) @__isoc99_fscanf(%struct._IO_FILE* %78, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i32 0, i32 0), i32* nonnull %12) #11
|
|
||||||
%80 = getelementptr inbounds [256 x i8], [256 x i8]* %13, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 256, i8* nonnull %80) #11
|
|
||||||
%81 = call i8* @fgets(i8* nonnull %80, i32 256, %struct._IO_FILE* %48)
|
|
||||||
%82 = icmp eq i8* %81, null
|
|
||||||
br i1 %82, label %.loopexit, label %.preheader.preheader
|
|
||||||
|
|
||||||
.preheader.preheader: ; preds = %1
|
|
||||||
br label %.preheader
|
|
||||||
|
|
||||||
.preheader: ; preds = %94, %.preheader.preheader
|
|
||||||
%83 = phi i32 [ %96, %94 ], [ 0, %.preheader.preheader ]
|
|
||||||
%84 = phi i32 [ %95, %94 ], [ 0, %.preheader.preheader ]
|
|
||||||
%85 = phi i32 [ %86, %94 ], [ 0, %.preheader.preheader ]
|
|
||||||
%86 = add nuw nsw i32 %85, 1
|
|
||||||
%87 = icmp eq i32 %85, 0
|
|
||||||
br i1 %87, label %88, label %90
|
|
||||||
|
|
||||||
88: ; preds = %.preheader
|
|
||||||
%89 = call i32 @strtol(i8* nocapture nonnull %80, i8** null, i32 10) #11
|
|
||||||
br label %94
|
|
||||||
|
|
||||||
90: ; preds = %.preheader
|
|
||||||
%91 = icmp eq i32 %86, 2
|
|
||||||
br i1 %91, label %92, label %.loopexit.loopexit
|
|
||||||
|
|
||||||
92: ; preds = %90
|
|
||||||
%93 = call i32 @strtol(i8* nocapture nonnull %80, i8** null, i32 10) #11
|
|
||||||
br label %94
|
|
||||||
|
|
||||||
94: ; preds = %92, %88
|
|
||||||
%95 = phi i32 [ %84, %88 ], [ %93, %92 ]
|
|
||||||
%96 = phi i32 [ %89, %88 ], [ %83, %92 ]
|
|
||||||
%97 = call i8* @fgets(i8* nonnull %80, i32 256, %struct._IO_FILE* %48)
|
|
||||||
%98 = icmp eq i8* %97, null
|
|
||||||
br i1 %98, label %.loopexit.loopexit, label %.preheader, !llvm.loop !15
|
|
||||||
|
|
||||||
.loopexit.loopexit: ; preds = %94, %90
|
|
||||||
%.ph = phi i32 [ %95, %94 ], [ %84, %90 ]
|
|
||||||
%.ph6 = phi i32 [ %96, %94 ], [ %83, %90 ]
|
|
||||||
br label %.loopexit
|
|
||||||
|
|
||||||
.loopexit: ; preds = %.loopexit.loopexit, %1
|
|
||||||
%99 = phi i32 [ 0, %1 ], [ %.ph, %.loopexit.loopexit ]
|
|
||||||
%100 = phi i32 [ 0, %1 ], [ %.ph6, %.loopexit.loopexit ]
|
|
||||||
%101 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @.str.14, i32 0, i32 0), i32 %100, i32 %99)
|
|
||||||
%102 = mul nsw i32 %100, %99
|
|
||||||
%103 = sdiv i32 %60, %102
|
|
||||||
%104 = sdiv i32 %56, %102
|
|
||||||
%105 = sdiv i32 %58, %102
|
|
||||||
%106 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%107 = getelementptr inbounds i32, i32* %106, i32 %19
|
|
||||||
%108 = getelementptr inbounds i32, i32* %107, i32 2
|
|
||||||
store i32 %103, i32* %108, align 4, !tbaa !13
|
|
||||||
%109 = getelementptr inbounds i32, i32* %107, i32 3
|
|
||||||
store i32 %104, i32* %109, align 4, !tbaa !13
|
|
||||||
%110 = getelementptr inbounds i32, i32* %107, i32 4
|
|
||||||
store i32 %105, i32* %110, align 4, !tbaa !13
|
|
||||||
%111 = load i32, i32* %12, align 4, !tbaa !13
|
|
||||||
%112 = sdiv i32 %111, %102
|
|
||||||
%113 = getelementptr inbounds i32, i32* %107, i32 6
|
|
||||||
store i32 %112, i32* %113, align 4, !tbaa !13
|
|
||||||
%114 = call i32 @fclose(%struct._IO_FILE* %45)
|
|
||||||
%115 = call i32 @fclose(%struct._IO_FILE* %46)
|
|
||||||
%116 = call i32 @fclose(%struct._IO_FILE* %47)
|
|
||||||
%117 = call i32 @fclose(%struct._IO_FILE* %78)
|
|
||||||
%118 = call i32 @fclose(%struct._IO_FILE* %48)
|
|
||||||
%119 = getelementptr inbounds [40 x i8], [40 x i8]* %14, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %119) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %119, i8 0, i32 40, i1 false)
|
|
||||||
%120 = call i8* @strcat(i8* nonnull %119, i8* nonnull %25) #11
|
|
||||||
%121 = call i32 @strlen(i8* nonnull %119)
|
|
||||||
%122 = getelementptr [40 x i8], [40 x i8]* %14, i32 0, i32 %121
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(18) %122, i8* nonnull align 1 dereferenceable(18) getelementptr inbounds ([18 x i8], [18 x i8]* @.str.15, i32 0, i32 0), i32 18, i1 false)
|
|
||||||
%123 = bitcast i32* %15 to i8*
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %123) #11
|
|
||||||
store i32 0, i32* %15, align 4, !tbaa !13
|
|
||||||
%124 = call %struct._IO_FILE* @fopen(i8* nonnull %119, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.7, i32 0, i32 0))
|
|
||||||
%125 = call i32 (%struct._IO_FILE*, i8*, ...) @__isoc99_fscanf(%struct._IO_FILE* %124, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i32 0, i32 0), i32* nonnull %15) #11
|
|
||||||
%126 = call i32 @fclose(%struct._IO_FILE* %124)
|
|
||||||
%127 = load i32, i32* %15, align 4, !tbaa !13
|
|
||||||
%128 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.16, i32 0, i32 0), i32 %127)
|
|
||||||
%129 = load i32, i32* %15, align 4, !tbaa !13
|
|
||||||
%130 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%131 = getelementptr inbounds i32, i32* %130, i32 %19
|
|
||||||
%132 = getelementptr inbounds i32, i32* %131, i32 5
|
|
||||||
store i32 %129, i32* %132, align 4, !tbaa !13
|
|
||||||
%133 = load i32*, i32** @prolog, align 4, !tbaa !5
|
|
||||||
%134 = ptrtoint i32* %133 to i32
|
|
||||||
%135 = load i32*, i32** @epilog, align 4, !tbaa !5
|
|
||||||
%136 = ptrtoint i32* %135 to i32
|
|
||||||
%137 = load i32*, i32** @kernel, align 4, !tbaa !5
|
|
||||||
%138 = ptrtoint i32* %137 to i32
|
|
||||||
%139 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([55 x i8], [55 x i8]* @.str.17, i32 0, i32 0), i32 %134, i32 %136, i32 %138)
|
|
||||||
%140 = load i32*, i32** @prolog, align 4, !tbaa !5
|
|
||||||
%141 = ptrtoint i32* %140 to i32
|
|
||||||
%142 = load i32*, i32** @prologPtr, align 4, !tbaa !5
|
|
||||||
%143 = getelementptr inbounds i32, i32* %142, i32 %18
|
|
||||||
store i32 %141, i32* %143, align 4, !tbaa !16
|
|
||||||
%144 = load i32*, i32** @epilog, align 4, !tbaa !5
|
|
||||||
%145 = ptrtoint i32* %144 to i32
|
|
||||||
%146 = load i32*, i32** @epilogPtr, align 4, !tbaa !5
|
|
||||||
%147 = getelementptr inbounds i32, i32* %146, i32 %18
|
|
||||||
store i32 %145, i32* %147, align 4, !tbaa !16
|
|
||||||
%148 = load i32*, i32** @kernel, align 4, !tbaa !5
|
|
||||||
%149 = ptrtoint i32* %148 to i32
|
|
||||||
%150 = load i32*, i32** @kernelPtr, align 4, !tbaa !5
|
|
||||||
%151 = getelementptr inbounds i32, i32* %150, i32 %18
|
|
||||||
store i32 %149, i32* %151, align 4, !tbaa !16
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %123) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %119) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 256, i8* nonnull %80) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %52) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %51) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %50) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %49) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %32) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %31) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %30) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %29) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %28) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 20, i8* nonnull %25) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 25, i8* nonnull %23) #11
|
|
||||||
ret i32 0
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare noundef i32 @puts(i8* nocapture noundef readonly) local_unnamed_addr #4
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
|
|
||||||
declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1 immarg) #5
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nosync nounwind willreturn
|
|
||||||
declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #6
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nosync nounwind willreturn
|
|
||||||
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture writeonly, i8* noalias nocapture readonly, i32, i1 immarg) #6
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @sprintf(i8* noalias nocapture noundef writeonly, i8* nocapture noundef readonly, ...) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nounwind willreturn
|
|
||||||
declare dso_local i8* @strcat(i8* noalias returned writeonly, i8* noalias nocapture readonly) local_unnamed_addr #7
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
|
|
||||||
declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i1 immarg) #5
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nounwind readonly willreturn
|
|
||||||
declare i32 @strlen(i8* nocapture) local_unnamed_addr #8
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noalias noundef %struct._IO_FILE* @fopen(i8* nocapture noundef readonly, i8* nocapture noundef readonly) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @fread(i8* nocapture noundef, i32 noundef, i32 noundef, %struct._IO_FILE* nocapture noundef) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: inaccessiblememonly nofree nounwind willreturn
|
|
||||||
declare dso_local noalias noundef i8* @malloc(i32) local_unnamed_addr #9
|
|
||||||
|
|
||||||
declare dso_local i32 @__isoc99_fscanf(%struct._IO_FILE*, i8*, ...) local_unnamed_addr #10
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i8* @fgets(i8* noundef, i32 noundef, %struct._IO_FILE* nocapture noundef) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @fclose(%struct._IO_FILE* nocapture noundef) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nosync nounwind willreturn
|
|
||||||
declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #6
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
define dso_local i32 @configureCGRA(i32 %0) local_unnamed_addr #0 {
|
|
||||||
%2 = alloca [25 x i8], align 1
|
|
||||||
%3 = alloca [20 x i8], align 1
|
|
||||||
%4 = alloca [40 x i8], align 1
|
|
||||||
%5 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str.34, i32 0, i32 0))
|
|
||||||
%6 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%7 = add i32 %0, -1
|
|
||||||
%8 = mul i32 %7, 7
|
|
||||||
%9 = getelementptr inbounds i32, i32* %6, i32 %8
|
|
||||||
%10 = getelementptr inbounds i32, i32* %9, i32 5
|
|
||||||
%11 = load i32, i32* %10, align 4, !tbaa !13
|
|
||||||
%12 = getelementptr inbounds [25 x i8], [25 x i8]* %2, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 25, i8* nonnull %12) #11
|
|
||||||
%13 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 20, i8* nonnull %13) #11
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(20) %13, i8* nonnull align 1 dereferenceable(20) getelementptr inbounds ([20 x i8], [20 x i8]* @__const.configureCGRA.directoryPath, i32 0, i32 0), i32 20, i1 false)
|
|
||||||
%14 = call i32 (i8*, i8*, ...) @sprintf(i8* nonnull %12, i8* nonnull dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i32 0, i32 0), i32 %0) #11
|
|
||||||
%15 = call i8* @strcat(i8* nonnull %13, i8* nonnull %12) #11
|
|
||||||
%16 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str.19, i32 0, i32 0), i8* nonnull %12)
|
|
||||||
%17 = icmp slt i32 %11, 1
|
|
||||||
br i1 %17, label %18, label %25
|
|
||||||
|
|
||||||
18: ; preds = %1
|
|
||||||
%19 = load i32, i32* @dynamicTCVal, align 4, !tbaa !13
|
|
||||||
%20 = add nsw i32 %19, %11
|
|
||||||
%21 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @.str.20, i32 0, i32 0), i32 %11, i32 %19)
|
|
||||||
%22 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%23 = getelementptr inbounds i32, i32* %22, i32 %8
|
|
||||||
%24 = getelementptr inbounds i32, i32* %23, i32 5
|
|
||||||
store i32 %20, i32* %24, align 4, !tbaa !13
|
|
||||||
br label %25
|
|
||||||
|
|
||||||
25: ; preds = %18, %1
|
|
||||||
%26 = getelementptr inbounds [40 x i8], [40 x i8]* %4, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %26) #11
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %26, i8* nonnull align 1 dereferenceable(40) getelementptr inbounds ([40 x i8], [40 x i8]* @__const.configureCGRA.initCGRAfile, i32 0, i32 0), i32 40, i1 false)
|
|
||||||
%27 = call i32 @strlen(i8* nonnull %26)
|
|
||||||
%28 = getelementptr [40 x i8], [40 x i8]* %4, i32 0, i32 %27
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(14) %28, i8* nonnull align 1 dereferenceable(14) getelementptr inbounds ([14 x i8], [14 x i8]* @.str.21, i32 0, i32 0), i32 14, i1 false)
|
|
||||||
%29 = call %struct._IO_FILE* @fopen(i8* nonnull %26, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.22, i32 0, i32 0))
|
|
||||||
br label %30
|
|
||||||
|
|
||||||
30: ; preds = %30, %25
|
|
||||||
%31 = phi i32 [ 0, %25 ], [ %37, %30 ]
|
|
||||||
%32 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%33 = getelementptr inbounds i32, i32* %32, i32 %8
|
|
||||||
%34 = getelementptr inbounds i32, i32* %33, i32 %31
|
|
||||||
%35 = load i32, i32* %34, align 4, !tbaa !13
|
|
||||||
%36 = call i32 (%struct._IO_FILE*, i8*, ...) @fprintf(%struct._IO_FILE* %29, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.23, i32 0, i32 0), i32 %35)
|
|
||||||
%37 = add nuw nsw i32 %31, 1
|
|
||||||
%38 = icmp eq i32 %37, 7
|
|
||||||
br i1 %38, label %39, label %30, !llvm.loop !18
|
|
||||||
|
|
||||||
39: ; preds = %30
|
|
||||||
%40 = load i32*, i32** @epilogPtr, align 4, !tbaa !5
|
|
||||||
%41 = getelementptr inbounds i32, i32* %40, i32 %7
|
|
||||||
%42 = load i32, i32* %41, align 4, !tbaa !16
|
|
||||||
%43 = zext i32 %42 to i64
|
|
||||||
%44 = call i32 (%struct._IO_FILE*, i8*, ...) @fprintf(%struct._IO_FILE* %29, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.24, i32 0, i32 0), i64 %43)
|
|
||||||
%45 = load i32*, i32** @prologPtr, align 4, !tbaa !5
|
|
||||||
%46 = getelementptr inbounds i32, i32* %45, i32 %7
|
|
||||||
%47 = load i32, i32* %46, align 4, !tbaa !16
|
|
||||||
%48 = zext i32 %47 to i64
|
|
||||||
%49 = call i32 (%struct._IO_FILE*, i8*, ...) @fprintf(%struct._IO_FILE* %29, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.24, i32 0, i32 0), i64 %48)
|
|
||||||
%50 = load i32*, i32** @kernelPtr, align 4, !tbaa !5
|
|
||||||
%51 = getelementptr inbounds i32, i32* %50, i32 %7
|
|
||||||
%52 = load i32, i32* %51, align 4, !tbaa !16
|
|
||||||
%53 = zext i32 %52 to i64
|
|
||||||
%54 = call i32 (%struct._IO_FILE*, i8*, ...) @fprintf(%struct._IO_FILE* %29, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.24, i32 0, i32 0), i64 %53)
|
|
||||||
%55 = call i32 @fclose(%struct._IO_FILE* %29)
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %26) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 20, i8* nonnull %13) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 25, i8* nonnull %12) #11
|
|
||||||
ret i32 0
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @fprintf(%struct._IO_FILE* nocapture noundef, i8* nocapture noundef readonly, ...) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: nounwind
|
|
||||||
define dso_local void @checkTotalLoops() local_unnamed_addr #3 {
|
|
||||||
%1 = alloca [40 x i8], align 1
|
|
||||||
%2 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str.35, i32 0, i32 0))
|
|
||||||
%3 = getelementptr inbounds [40 x i8], [40 x i8]* %1, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %3) #11
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %3, i8* nonnull align 1 dereferenceable(40) getelementptr inbounds ([40 x i8], [40 x i8]* @__const.checkTotalLoops.myfile, i32 0, i32 0), i32 40, i1 false)
|
|
||||||
%4 = call %struct._IO_FILE* @fopen(i8* nonnull %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.7, i32 0, i32 0))
|
|
||||||
%5 = tail call i32 (%struct._IO_FILE*, i8*, ...) @__isoc99_fscanf(%struct._IO_FILE* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.26, i32 0, i32 0), i32* nonnull @totalLoops) #11
|
|
||||||
%6 = tail call i32 @fclose(%struct._IO_FILE* %4)
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %3) #11
|
|
||||||
ret void
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nounwind
|
|
||||||
define dso_local i8* @runOnCGRA() local_unnamed_addr #3 {
|
|
||||||
%1 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str.36, i32 0, i32 0))
|
|
||||||
tail call void asm sideeffect "mov r11,$0", "r"(i32 15) #11, !srcloc !19
|
|
||||||
ret i8* null
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nounwind
|
|
||||||
define dso_local void @accelerateOnCGRA(i32 %0) local_unnamed_addr #3 {
|
|
||||||
%2 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str.37, i32 0, i32 0))
|
|
||||||
%3 = tail call i32 @configureCGRA(i32 %0)
|
|
||||||
%4 = tail call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @.str.30, i32 0, i32 0), i32 %0)
|
|
||||||
%5 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str.36, i32 0, i32 0)) #11
|
|
||||||
tail call void asm sideeffect "mov r11,$0", "r"(i32 15) #11, !srcloc !19
|
|
||||||
ret void
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
define dso_local void @deleteCGRA() local_unnamed_addr #0 {
|
|
||||||
%1 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str.38, i32 0, i32 0))
|
|
||||||
ret void
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nounwind
|
|
||||||
define dso_local void @createCGRA() local_unnamed_addr #3 {
|
|
||||||
%1 = alloca [40 x i8], align 1
|
|
||||||
%2 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str.39, i32 0, i32 0))
|
|
||||||
%3 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str.35, i32 0, i32 0)) #11
|
|
||||||
%4 = getelementptr inbounds [40 x i8], [40 x i8]* %1, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %4) #11
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %4, i8* nonnull align 1 dereferenceable(40) getelementptr inbounds ([40 x i8], [40 x i8]* @__const.checkTotalLoops.myfile, i32 0, i32 0), i32 40, i1 false) #11
|
|
||||||
%5 = call %struct._IO_FILE* @fopen(i8* nonnull %4, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.7, i32 0, i32 0)) #11
|
|
||||||
%6 = tail call i32 (%struct._IO_FILE*, i8*, ...) @__isoc99_fscanf(%struct._IO_FILE* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.26, i32 0, i32 0), i32* nonnull @totalLoops) #11
|
|
||||||
%7 = tail call i32 @fclose(%struct._IO_FILE* %5) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %4) #11
|
|
||||||
%8 = load i32, i32* @totalLoops, align 4, !tbaa !13
|
|
||||||
%9 = mul i32 %8, 28
|
|
||||||
%10 = tail call noalias i8* @malloc(i32 %9) #11
|
|
||||||
store i8* %10, i8** bitcast (i32** @initCGRA to i8**), align 4, !tbaa !5
|
|
||||||
%11 = shl i32 %8, 2
|
|
||||||
%12 = tail call noalias i8* @malloc(i32 %11) #11
|
|
||||||
store i8* %12, i8** bitcast (i32** @prologPtr to i8**), align 4, !tbaa !5
|
|
||||||
%13 = tail call noalias i8* @malloc(i32 %11) #11
|
|
||||||
store i8* %13, i8** bitcast (i32** @kernelPtr to i8**), align 4, !tbaa !5
|
|
||||||
%14 = tail call noalias i8* @malloc(i32 %11) #11
|
|
||||||
store i8* %14, i8** bitcast (i32** @epilogPtr to i8**), align 4, !tbaa !5
|
|
||||||
%15 = icmp eq i32 %8, 0
|
|
||||||
br i1 %15, label %.loopexit, label %.preheader.preheader
|
|
||||||
|
|
||||||
.preheader.preheader: ; preds = %0
|
|
||||||
br label %.preheader
|
|
||||||
|
|
||||||
.preheader: ; preds = %.preheader, %.preheader.preheader
|
|
||||||
%16 = phi i32 [ %18, %.preheader ], [ 1, %.preheader.preheader ]
|
|
||||||
%17 = tail call i32 @initializeParameters(i32 %16)
|
|
||||||
%18 = add i32 %16, 1
|
|
||||||
%19 = load i32, i32* @totalLoops, align 4, !tbaa !13
|
|
||||||
%20 = icmp ugt i32 %18, %19
|
|
||||||
br i1 %20, label %.loopexit.loopexit, label %.preheader, !llvm.loop !20
|
|
||||||
|
|
||||||
.loopexit.loopexit: ; preds = %.preheader
|
|
||||||
br label %.loopexit
|
|
||||||
|
|
||||||
.loopexit: ; preds = %.loopexit.loopexit, %0
|
|
||||||
%21 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str.40, i32 0, i32 0))
|
|
||||||
ret void
|
|
||||||
}
|
|
||||||
|
|
||||||
attributes #0 = { nofree nounwind "disable-tail-calls"="false" "frame-pointer"="none" "min-legal-vector-width"="0" "no-jump-tables"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #1 = { nofree nounwind willreturn "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #2 = { nofree nounwind "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #3 = { nounwind "disable-tail-calls"="false" "frame-pointer"="none" "min-legal-vector-width"="0" "no-jump-tables"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #4 = { nofree nounwind }
|
|
||||||
attributes #5 = { argmemonly nofree nosync nounwind willreturn writeonly }
|
|
||||||
attributes #6 = { argmemonly nofree nosync nounwind willreturn }
|
|
||||||
attributes #7 = { argmemonly nofree nounwind willreturn "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #8 = { argmemonly nofree nounwind readonly willreturn }
|
|
||||||
attributes #9 = { inaccessiblememonly nofree nounwind willreturn "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #10 = { "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #11 = { nounwind }
|
|
||||||
|
|
||||||
!llvm.ident = !{!0, !0}
|
|
||||||
!llvm.module.flags = !{!1, !2, !3, !4}
|
|
||||||
|
|
||||||
!0 = !{!"clang version 13.0.0 (https://github.com/MPSLab-ASU/CCF-20.04/ 05285de7579f417a4d73ad832b8f4cc497f25235)"}
|
|
||||||
!1 = !{i32 7, !"Dwarf Version", i32 4}
|
|
||||||
!2 = !{i32 2, !"Debug Info Version", i32 3}
|
|
||||||
!3 = !{i32 1, !"wchar_size", i32 4}
|
|
||||||
!4 = !{i32 1, !"min_enum_size", i32 4}
|
|
||||||
!5 = !{!6, !6, i64 0}
|
|
||||||
!6 = !{!"any pointer", !7, i64 0}
|
|
||||||
!7 = !{!"omnipotent char", !8, i64 0}
|
|
||||||
!8 = !{!"Simple C/C++ TBAA"}
|
|
||||||
!9 = distinct !{!9, !10, !11, !12}
|
|
||||||
!10 = !{!"llvm.loop.mustprogress"}
|
|
||||||
!11 = !{!"llvm.loop.CGRA.enable"}
|
|
||||||
!12 = !{!"llvm.loop.unroll.disable"}
|
|
||||||
!13 = !{!14, !14, i64 0}
|
|
||||||
!14 = !{!"int", !7, i64 0}
|
|
||||||
!15 = distinct !{!15, !10, !12}
|
|
||||||
!16 = !{!17, !17, i64 0}
|
|
||||||
!17 = !{!"long", !7, i64 0}
|
|
||||||
!18 = distinct !{!18, !10, !12}
|
|
||||||
!19 = !{i32 5341}
|
|
||||||
!20 = distinct !{!20, !10, !12}
|
|
||||||
|
|
@ -1,573 +0,0 @@
|
||||||
; ModuleID = 'InvokeCGRA.bc'
|
|
||||||
source_filename = "llvm-link"
|
|
||||||
target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
|
|
||||||
target triple = "armv7-none-linux-eabi"
|
|
||||||
|
|
||||||
%struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, %struct._IO_codecvt*, %struct._IO_wide_data*, %struct._IO_FILE*, i8*, i32, i32, [40 x i8] }
|
|
||||||
%struct._IO_marker = type opaque
|
|
||||||
%struct._IO_codecvt = type opaque
|
|
||||||
%struct._IO_wide_data = type opaque
|
|
||||||
|
|
||||||
@.str = private unnamed_addr constant [24 x i8] c"***** %d^%d = %d *****\0A\00", align 1
|
|
||||||
@totalLoops = dso_local global i32 0, align 4
|
|
||||||
@dynamicTCVal = dso_local local_unnamed_addr global i32 0, align 4
|
|
||||||
@initCGRA = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@epilog = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@prolog = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@kernel = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@prologPtr = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@epilogPtr = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@kernelPtr = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@ArrPtr = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@pth = dso_local local_unnamed_addr global i32 0, align 4
|
|
||||||
@str = private unnamed_addr constant [34 x i8] c"from cgra.c Initialize Parameters\00", align 1
|
|
||||||
@__const.configureCGRA.directoryPath = private unnamed_addr constant [20 x i8] c"./CGRAExec/L\00\00\00\00\00\00\00\00", align 1
|
|
||||||
@.str.1 = private unnamed_addr constant [3 x i8] c"%d\00", align 1
|
|
||||||
@.str.2 = private unnamed_addr constant [16 x i8] c"/epilog_ins.bin\00", align 1
|
|
||||||
@.str.3 = private unnamed_addr constant [16 x i8] c"/prolog_ins.bin\00", align 1
|
|
||||||
@.str.4 = private unnamed_addr constant [16 x i8] c"/kernel_ins.bin\00", align 1
|
|
||||||
@.str.5 = private unnamed_addr constant [17 x i8] c"/CGRA_config.txt\00", align 1
|
|
||||||
@.str.6 = private unnamed_addr constant [3 x i8] c"rb\00", align 1
|
|
||||||
@.str.7 = private unnamed_addr constant [2 x i8] c"r\00", align 1
|
|
||||||
@.str.8 = private unnamed_addr constant [32 x i8] c"\0A**********EPISIZE %d*********\0A\00", align 1
|
|
||||||
@.str.9 = private unnamed_addr constant [32 x i8] c"\0A**********PROSIZE %d*********\0A\00", align 1
|
|
||||||
@.str.10 = private unnamed_addr constant [33 x i8] c"\0A**********KERNSIZE %d*********\0A\00", align 1
|
|
||||||
@.str.11 = private unnamed_addr constant [37 x i8] c"\0A******SIZE OF UNSIGNED LONG%d*****\0A\00", align 1
|
|
||||||
@.str.12 = private unnamed_addr constant [42 x i8] c"\0A******SIZE OF UNSIGNED LONG LONG%d*****\0A\00", align 1
|
|
||||||
@.str.13 = private unnamed_addr constant [26 x i8] c"/livevar_st_ins_count.txt\00", align 1
|
|
||||||
@.str.14 = private unnamed_addr constant [39 x i8] c"\0A************XDIM and YDim are %d, %d\0A\00", align 1
|
|
||||||
@.str.15 = private unnamed_addr constant [18 x i8] c"/kernel_count.txt\00", align 1
|
|
||||||
@.str.16 = private unnamed_addr constant [16 x i8] c"Loop Count: %d\0A\00", align 1
|
|
||||||
@.str.17 = private unnamed_addr constant [55 x i8] c"From FILE: PROLOGPC= %lx, EPILOGPC=%lx, KernelPC=%lx\0A\00", align 1
|
|
||||||
@str.34 = private unnamed_addr constant [14 x i8] c"configureCGRA\00", align 1
|
|
||||||
@.str.19 = private unnamed_addr constant [14 x i8] c"\0Aloopno = %s\0A\00", align 1
|
|
||||||
@.str.20 = private unnamed_addr constant [17 x i8] c"newTC = %d + %d\0A\00", align 1
|
|
||||||
@__const.configureCGRA.initCGRAfile = private unnamed_addr constant [40 x i8] c"./CGRAExec/L1\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 1
|
|
||||||
@.str.21 = private unnamed_addr constant [14 x i8] c"/initCGRA.txt\00", align 1
|
|
||||||
@.str.22 = private unnamed_addr constant [3 x i8] c"wb\00", align 1
|
|
||||||
@.str.23 = private unnamed_addr constant [4 x i8] c"%d\0A\00", align 1
|
|
||||||
@.str.24 = private unnamed_addr constant [5 x i8] c"%ld\0A\00", align 1
|
|
||||||
@str.35 = private unnamed_addr constant [16 x i8] c"checkTotalLoops\00", align 1
|
|
||||||
@__const.checkTotalLoops.myfile = private unnamed_addr constant [40 x i8] c"./CGRAExec/total_loops.txt\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 1
|
|
||||||
@.str.26 = private unnamed_addr constant [3 x i8] c"%u\00", align 1
|
|
||||||
@str.36 = private unnamed_addr constant [12 x i8] c"\0A\0ArunOnCGRA\00", align 1
|
|
||||||
@str.37 = private unnamed_addr constant [19 x i8] c"\0A\0AaccelerateOnCGRA\00", align 1
|
|
||||||
@.str.30 = private unnamed_addr constant [35 x i8] c"Core will execute loop %u on CGRA\0A\00", align 1
|
|
||||||
@str.38 = private unnamed_addr constant [15 x i8] c"\0Adeleting cgra\00", align 1
|
|
||||||
@str.39 = private unnamed_addr constant [11 x i8] c"createCGRA\00", align 1
|
|
||||||
@str.40 = private unnamed_addr constant [35 x i8] c"Main thread calling CGRA thread...\00", align 1
|
|
||||||
@gVar1 = common local_unnamed_addr global i32 0
|
|
||||||
@gVar2 = common local_unnamed_addr global i32 0
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
define dso_local i32 @main(i32 %0, i8** nocapture readonly %1) local_unnamed_addr #0 {
|
|
||||||
%3 = getelementptr inbounds i8*, i8** %1, i32 1
|
|
||||||
%4 = load i8*, i8** %3, align 4, !tbaa !5
|
|
||||||
%5 = tail call i32 @strtol(i8* nocapture nonnull %4, i8** null, i32 10) #11
|
|
||||||
%6 = icmp sgt i32 %5, 1
|
|
||||||
store i32 %5, i32* @gVar1, align 4
|
|
||||||
br i1 %6, label %.preheader.preheader, label %.loopexit
|
|
||||||
|
|
||||||
.preheader.preheader: ; preds = %2
|
|
||||||
%7 = sub i32 %5, 1
|
|
||||||
%8 = sdiv i32 %7, 1
|
|
||||||
store i32 %8, i32* @dynamicTCVal, align 4
|
|
||||||
br label %9
|
|
||||||
|
|
||||||
9: ; preds = %.preheader.preheader
|
|
||||||
call void @accelerateOnCGRA(i32 1)
|
|
||||||
br label %.loopexit.loopexit
|
|
||||||
|
|
||||||
.loopexit.loopexit: ; preds = %9
|
|
||||||
br label %10
|
|
||||||
|
|
||||||
10: ; preds = %.loopexit.loopexit
|
|
||||||
%11 = load i32, i32* @gVar2, align 4
|
|
||||||
br label %.loopexit
|
|
||||||
|
|
||||||
.loopexit: ; preds = %10, %2
|
|
||||||
%12 = phi i32 [ 1, %2 ], [ %11, %10 ]
|
|
||||||
%13 = tail call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i32 0, i32 0), i32 2, i32 %5, i32 %12)
|
|
||||||
ret i32 0
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind willreturn
|
|
||||||
declare dso_local i32 @strtol(i8* readonly, i8** nocapture, i32) local_unnamed_addr #1
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @printf(i8* nocapture noundef readonly, ...) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: nounwind
|
|
||||||
define dso_local i32 @initializeParameters(i32 %0) local_unnamed_addr #3 {
|
|
||||||
%2 = alloca [25 x i8], align 1
|
|
||||||
%3 = alloca [20 x i8], align 1
|
|
||||||
%4 = alloca [40 x i8], align 1
|
|
||||||
%5 = alloca [40 x i8], align 1
|
|
||||||
%6 = alloca [40 x i8], align 1
|
|
||||||
%7 = alloca [40 x i8], align 1
|
|
||||||
%8 = alloca [40 x i8], align 1
|
|
||||||
%9 = alloca i32, align 4
|
|
||||||
%10 = alloca i32, align 4
|
|
||||||
%11 = alloca i32, align 4
|
|
||||||
%12 = alloca i32, align 4
|
|
||||||
%13 = alloca [256 x i8], align 1
|
|
||||||
%14 = alloca [40 x i8], align 1
|
|
||||||
%15 = alloca i32, align 4
|
|
||||||
%16 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @str, i32 0, i32 0))
|
|
||||||
%17 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%18 = add i32 %0, -1
|
|
||||||
%19 = mul i32 %18, 7
|
|
||||||
%20 = getelementptr inbounds i32, i32* %17, i32 %19
|
|
||||||
store i32 2011168768, i32* %20, align 4, !tbaa !9
|
|
||||||
%21 = getelementptr inbounds i32, i32* %20, i32 1
|
|
||||||
store i32 2011168768, i32* %21, align 4, !tbaa !9
|
|
||||||
%22 = getelementptr inbounds i32, i32* %20, i32 2
|
|
||||||
%23 = getelementptr inbounds [25 x i8], [25 x i8]* %2, i32 0, i32 0
|
|
||||||
%24 = bitcast i32* %22 to i8*
|
|
||||||
tail call void @llvm.memset.p0i8.i64(i8* nonnull align 4 dereferenceable(20) %24, i8 0, i64 20, i1 false)
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 25, i8* nonnull %23) #11
|
|
||||||
%25 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 20, i8* nonnull %25) #11
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(20) %25, i8* nonnull align 1 dereferenceable(20) getelementptr inbounds ([20 x i8], [20 x i8]* @__const.configureCGRA.directoryPath, i32 0, i32 0), i32 20, i1 false)
|
|
||||||
%26 = call i32 (i8*, i8*, ...) @sprintf(i8* nonnull %23, i8* nonnull dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i32 0, i32 0), i32 %0) #11
|
|
||||||
%27 = call i8* @strcat(i8* nonnull %25, i8* nonnull %23) #11
|
|
||||||
%28 = getelementptr inbounds [40 x i8], [40 x i8]* %4, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %28) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %28, i8 0, i32 40, i1 false)
|
|
||||||
%29 = getelementptr inbounds [40 x i8], [40 x i8]* %5, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %29) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %29, i8 0, i32 40, i1 false)
|
|
||||||
%30 = getelementptr inbounds [40 x i8], [40 x i8]* %6, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %30) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %30, i8 0, i32 40, i1 false)
|
|
||||||
%31 = getelementptr inbounds [40 x i8], [40 x i8]* %7, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %31) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %31, i8 0, i32 40, i1 false)
|
|
||||||
%32 = getelementptr inbounds [40 x i8], [40 x i8]* %8, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %32) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %32, i8 0, i32 40, i1 false)
|
|
||||||
%33 = call i8* @strcat(i8* nonnull %28, i8* nonnull %25) #11
|
|
||||||
%34 = call i32 @strlen(i8* nonnull %28)
|
|
||||||
%35 = getelementptr [40 x i8], [40 x i8]* %4, i32 0, i32 %34
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(16) %35, i8* nonnull align 1 dereferenceable(16) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i32 0, i32 0), i32 16, i1 false)
|
|
||||||
%36 = call i8* @strcat(i8* nonnull %29, i8* nonnull %25) #11
|
|
||||||
%37 = call i32 @strlen(i8* nonnull %29)
|
|
||||||
%38 = getelementptr [40 x i8], [40 x i8]* %5, i32 0, i32 %37
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(16) %38, i8* nonnull align 1 dereferenceable(16) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.3, i32 0, i32 0), i32 16, i1 false)
|
|
||||||
%39 = call i8* @strcat(i8* nonnull %30, i8* nonnull %25) #11
|
|
||||||
%40 = call i32 @strlen(i8* nonnull %30)
|
|
||||||
%41 = getelementptr [40 x i8], [40 x i8]* %6, i32 0, i32 %40
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(16) %41, i8* nonnull align 1 dereferenceable(16) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.4, i32 0, i32 0), i32 16, i1 false)
|
|
||||||
%42 = call i8* @strcat(i8* nonnull %32, i8* nonnull %25) #11
|
|
||||||
%43 = call i32 @strlen(i8* nonnull %32)
|
|
||||||
%44 = getelementptr [40 x i8], [40 x i8]* %8, i32 0, i32 %43
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(17) %44, i8* nonnull align 1 dereferenceable(17) getelementptr inbounds ([17 x i8], [17 x i8]* @.str.5, i32 0, i32 0), i32 17, i1 false)
|
|
||||||
%45 = call %struct._IO_FILE* @fopen(i8* nonnull %28, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.6, i32 0, i32 0))
|
|
||||||
%46 = call %struct._IO_FILE* @fopen(i8* nonnull %29, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.6, i32 0, i32 0))
|
|
||||||
%47 = call %struct._IO_FILE* @fopen(i8* nonnull %30, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.6, i32 0, i32 0))
|
|
||||||
%48 = call %struct._IO_FILE* @fopen(i8* nonnull %32, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.7, i32 0, i32 0))
|
|
||||||
%49 = bitcast i32* %9 to i8*
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %49) #11
|
|
||||||
%50 = bitcast i32* %10 to i8*
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %50) #11
|
|
||||||
%51 = bitcast i32* %11 to i8*
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %51) #11
|
|
||||||
%52 = bitcast i32* %12 to i8*
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %52) #11
|
|
||||||
%53 = call i32 @fread(i8* nonnull %49, i32 4, i32 1, %struct._IO_FILE* %45)
|
|
||||||
%54 = call i32 @fread(i8* nonnull %50, i32 4, i32 1, %struct._IO_FILE* %46)
|
|
||||||
%55 = call i32 @fread(i8* nonnull %51, i32 4, i32 1, %struct._IO_FILE* %47)
|
|
||||||
%56 = load i32, i32* %9, align 4, !tbaa !9
|
|
||||||
%57 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @.str.8, i32 0, i32 0), i32 %56)
|
|
||||||
%58 = load i32, i32* %10, align 4, !tbaa !9
|
|
||||||
%59 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @.str.9, i32 0, i32 0), i32 %58)
|
|
||||||
%60 = load i32, i32* %11, align 4, !tbaa !9
|
|
||||||
%61 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @.str.10, i32 0, i32 0), i32 %60)
|
|
||||||
%62 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @.str.11, i32 0, i32 0), i32 4)
|
|
||||||
%63 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @.str.12, i32 0, i32 0), i32 8)
|
|
||||||
%64 = shl i32 %56, 3
|
|
||||||
%65 = call noalias i8* @malloc(i32 %64) #11
|
|
||||||
store i8* %65, i8** bitcast (i32** @epilog to i8**), align 4, !tbaa !5
|
|
||||||
%66 = shl i32 %58, 3
|
|
||||||
%67 = call noalias i8* @malloc(i32 %66) #11
|
|
||||||
store i8* %67, i8** bitcast (i32** @prolog to i8**), align 4, !tbaa !5
|
|
||||||
%68 = shl i32 %60, 3
|
|
||||||
%69 = call noalias i8* @malloc(i32 %68) #11
|
|
||||||
store i8* %69, i8** bitcast (i32** @kernel to i8**), align 4, !tbaa !5
|
|
||||||
%70 = call i32 @fread(i8* %65, i32 8, i32 %56, %struct._IO_FILE* %45)
|
|
||||||
%71 = load i8*, i8** bitcast (i32** @prolog to i8**), align 4, !tbaa !5
|
|
||||||
%72 = call i32 @fread(i8* %71, i32 8, i32 %58, %struct._IO_FILE* %46)
|
|
||||||
%73 = load i8*, i8** bitcast (i32** @kernel to i8**), align 4, !tbaa !5
|
|
||||||
%74 = call i32 @fread(i8* %73, i32 8, i32 %60, %struct._IO_FILE* %47)
|
|
||||||
%75 = call i8* @strcat(i8* nonnull %31, i8* nonnull %25) #11
|
|
||||||
%76 = call i32 @strlen(i8* nonnull %31)
|
|
||||||
%77 = getelementptr [40 x i8], [40 x i8]* %7, i32 0, i32 %76
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(26) %77, i8* nonnull align 1 dereferenceable(26) getelementptr inbounds ([26 x i8], [26 x i8]* @.str.13, i32 0, i32 0), i32 26, i1 false)
|
|
||||||
%78 = call %struct._IO_FILE* @fopen(i8* nonnull %31, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.7, i32 0, i32 0))
|
|
||||||
%79 = call i32 (%struct._IO_FILE*, i8*, ...) @__isoc99_fscanf(%struct._IO_FILE* %78, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i32 0, i32 0), i32* nonnull %12) #11
|
|
||||||
%80 = getelementptr inbounds [256 x i8], [256 x i8]* %13, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 256, i8* nonnull %80) #11
|
|
||||||
%81 = call i8* @fgets(i8* nonnull %80, i32 256, %struct._IO_FILE* %48)
|
|
||||||
%82 = icmp eq i8* %81, null
|
|
||||||
br i1 %82, label %.loopexit, label %.preheader.preheader
|
|
||||||
|
|
||||||
.preheader.preheader: ; preds = %1
|
|
||||||
br label %.preheader
|
|
||||||
|
|
||||||
.preheader: ; preds = %94, %.preheader.preheader
|
|
||||||
%83 = phi i32 [ %96, %94 ], [ 0, %.preheader.preheader ]
|
|
||||||
%84 = phi i32 [ %95, %94 ], [ 0, %.preheader.preheader ]
|
|
||||||
%85 = phi i32 [ %86, %94 ], [ 0, %.preheader.preheader ]
|
|
||||||
%86 = add nuw nsw i32 %85, 1
|
|
||||||
%87 = icmp eq i32 %85, 0
|
|
||||||
br i1 %87, label %88, label %90
|
|
||||||
|
|
||||||
88: ; preds = %.preheader
|
|
||||||
%89 = call i32 @strtol(i8* nocapture nonnull %80, i8** null, i32 10) #11
|
|
||||||
br label %94
|
|
||||||
|
|
||||||
90: ; preds = %.preheader
|
|
||||||
%91 = icmp eq i32 %86, 2
|
|
||||||
br i1 %91, label %92, label %.loopexit.loopexit
|
|
||||||
|
|
||||||
92: ; preds = %90
|
|
||||||
%93 = call i32 @strtol(i8* nocapture nonnull %80, i8** null, i32 10) #11
|
|
||||||
br label %94
|
|
||||||
|
|
||||||
94: ; preds = %92, %88
|
|
||||||
%95 = phi i32 [ %84, %88 ], [ %93, %92 ]
|
|
||||||
%96 = phi i32 [ %89, %88 ], [ %83, %92 ]
|
|
||||||
%97 = call i8* @fgets(i8* nonnull %80, i32 256, %struct._IO_FILE* %48)
|
|
||||||
%98 = icmp eq i8* %97, null
|
|
||||||
br i1 %98, label %.loopexit.loopexit, label %.preheader, !llvm.loop !11
|
|
||||||
|
|
||||||
.loopexit.loopexit: ; preds = %94, %90
|
|
||||||
%.ph = phi i32 [ %95, %94 ], [ %84, %90 ]
|
|
||||||
%.ph6 = phi i32 [ %96, %94 ], [ %83, %90 ]
|
|
||||||
br label %.loopexit
|
|
||||||
|
|
||||||
.loopexit: ; preds = %.loopexit.loopexit, %1
|
|
||||||
%99 = phi i32 [ 0, %1 ], [ %.ph, %.loopexit.loopexit ]
|
|
||||||
%100 = phi i32 [ 0, %1 ], [ %.ph6, %.loopexit.loopexit ]
|
|
||||||
%101 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @.str.14, i32 0, i32 0), i32 %100, i32 %99)
|
|
||||||
%102 = mul nsw i32 %100, %99
|
|
||||||
%103 = sdiv i32 %60, %102
|
|
||||||
%104 = sdiv i32 %56, %102
|
|
||||||
%105 = sdiv i32 %58, %102
|
|
||||||
%106 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%107 = getelementptr inbounds i32, i32* %106, i32 %19
|
|
||||||
%108 = getelementptr inbounds i32, i32* %107, i32 2
|
|
||||||
store i32 %103, i32* %108, align 4, !tbaa !9
|
|
||||||
%109 = getelementptr inbounds i32, i32* %107, i32 3
|
|
||||||
store i32 %104, i32* %109, align 4, !tbaa !9
|
|
||||||
%110 = getelementptr inbounds i32, i32* %107, i32 4
|
|
||||||
store i32 %105, i32* %110, align 4, !tbaa !9
|
|
||||||
%111 = load i32, i32* %12, align 4, !tbaa !9
|
|
||||||
%112 = sdiv i32 %111, %102
|
|
||||||
%113 = getelementptr inbounds i32, i32* %107, i32 6
|
|
||||||
store i32 %112, i32* %113, align 4, !tbaa !9
|
|
||||||
%114 = call i32 @fclose(%struct._IO_FILE* %45)
|
|
||||||
%115 = call i32 @fclose(%struct._IO_FILE* %46)
|
|
||||||
%116 = call i32 @fclose(%struct._IO_FILE* %47)
|
|
||||||
%117 = call i32 @fclose(%struct._IO_FILE* %78)
|
|
||||||
%118 = call i32 @fclose(%struct._IO_FILE* %48)
|
|
||||||
%119 = getelementptr inbounds [40 x i8], [40 x i8]* %14, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %119) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %119, i8 0, i32 40, i1 false)
|
|
||||||
%120 = call i8* @strcat(i8* nonnull %119, i8* nonnull %25) #11
|
|
||||||
%121 = call i32 @strlen(i8* nonnull %119)
|
|
||||||
%122 = getelementptr [40 x i8], [40 x i8]* %14, i32 0, i32 %121
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(18) %122, i8* nonnull align 1 dereferenceable(18) getelementptr inbounds ([18 x i8], [18 x i8]* @.str.15, i32 0, i32 0), i32 18, i1 false)
|
|
||||||
%123 = bitcast i32* %15 to i8*
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %123) #11
|
|
||||||
store i32 0, i32* %15, align 4, !tbaa !9
|
|
||||||
%124 = call %struct._IO_FILE* @fopen(i8* nonnull %119, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.7, i32 0, i32 0))
|
|
||||||
%125 = call i32 (%struct._IO_FILE*, i8*, ...) @__isoc99_fscanf(%struct._IO_FILE* %124, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i32 0, i32 0), i32* nonnull %15) #11
|
|
||||||
%126 = call i32 @fclose(%struct._IO_FILE* %124)
|
|
||||||
%127 = load i32, i32* %15, align 4, !tbaa !9
|
|
||||||
%128 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.16, i32 0, i32 0), i32 %127)
|
|
||||||
%129 = load i32, i32* %15, align 4, !tbaa !9
|
|
||||||
%130 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%131 = getelementptr inbounds i32, i32* %130, i32 %19
|
|
||||||
%132 = getelementptr inbounds i32, i32* %131, i32 5
|
|
||||||
store i32 %129, i32* %132, align 4, !tbaa !9
|
|
||||||
%133 = load i32*, i32** @prolog, align 4, !tbaa !5
|
|
||||||
%134 = ptrtoint i32* %133 to i32
|
|
||||||
%135 = load i32*, i32** @epilog, align 4, !tbaa !5
|
|
||||||
%136 = ptrtoint i32* %135 to i32
|
|
||||||
%137 = load i32*, i32** @kernel, align 4, !tbaa !5
|
|
||||||
%138 = ptrtoint i32* %137 to i32
|
|
||||||
%139 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([55 x i8], [55 x i8]* @.str.17, i32 0, i32 0), i32 %134, i32 %136, i32 %138)
|
|
||||||
%140 = load i32*, i32** @prolog, align 4, !tbaa !5
|
|
||||||
%141 = ptrtoint i32* %140 to i32
|
|
||||||
%142 = load i32*, i32** @prologPtr, align 4, !tbaa !5
|
|
||||||
%143 = getelementptr inbounds i32, i32* %142, i32 %18
|
|
||||||
store i32 %141, i32* %143, align 4, !tbaa !14
|
|
||||||
%144 = load i32*, i32** @epilog, align 4, !tbaa !5
|
|
||||||
%145 = ptrtoint i32* %144 to i32
|
|
||||||
%146 = load i32*, i32** @epilogPtr, align 4, !tbaa !5
|
|
||||||
%147 = getelementptr inbounds i32, i32* %146, i32 %18
|
|
||||||
store i32 %145, i32* %147, align 4, !tbaa !14
|
|
||||||
%148 = load i32*, i32** @kernel, align 4, !tbaa !5
|
|
||||||
%149 = ptrtoint i32* %148 to i32
|
|
||||||
%150 = load i32*, i32** @kernelPtr, align 4, !tbaa !5
|
|
||||||
%151 = getelementptr inbounds i32, i32* %150, i32 %18
|
|
||||||
store i32 %149, i32* %151, align 4, !tbaa !14
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %123) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %119) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 256, i8* nonnull %80) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %52) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %51) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %50) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %49) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %32) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %31) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %30) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %29) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %28) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 20, i8* nonnull %25) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 25, i8* nonnull %23) #11
|
|
||||||
ret i32 0
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare noundef i32 @puts(i8* nocapture noundef readonly) local_unnamed_addr #4
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
|
|
||||||
declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1 immarg) #5
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nosync nounwind willreturn
|
|
||||||
declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #6
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nosync nounwind willreturn
|
|
||||||
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture writeonly, i8* noalias nocapture readonly, i32, i1 immarg) #6
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @sprintf(i8* noalias nocapture noundef writeonly, i8* nocapture noundef readonly, ...) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nounwind willreturn
|
|
||||||
declare dso_local i8* @strcat(i8* noalias returned writeonly, i8* noalias nocapture readonly) local_unnamed_addr #7
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
|
|
||||||
declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i1 immarg) #5
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nounwind readonly willreturn
|
|
||||||
declare i32 @strlen(i8* nocapture) local_unnamed_addr #8
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noalias noundef %struct._IO_FILE* @fopen(i8* nocapture noundef readonly, i8* nocapture noundef readonly) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @fread(i8* nocapture noundef, i32 noundef, i32 noundef, %struct._IO_FILE* nocapture noundef) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: inaccessiblememonly nofree nounwind willreturn
|
|
||||||
declare dso_local noalias noundef i8* @malloc(i32) local_unnamed_addr #9
|
|
||||||
|
|
||||||
declare dso_local i32 @__isoc99_fscanf(%struct._IO_FILE*, i8*, ...) local_unnamed_addr #10
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i8* @fgets(i8* noundef, i32 noundef, %struct._IO_FILE* nocapture noundef) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @fclose(%struct._IO_FILE* nocapture noundef) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nosync nounwind willreturn
|
|
||||||
declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #6
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
define dso_local i32 @configureCGRA(i32 %0) local_unnamed_addr #0 {
|
|
||||||
%2 = alloca [25 x i8], align 1
|
|
||||||
%3 = alloca [20 x i8], align 1
|
|
||||||
%4 = alloca [40 x i8], align 1
|
|
||||||
%5 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str.34, i32 0, i32 0))
|
|
||||||
%6 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%7 = add i32 %0, -1
|
|
||||||
%8 = mul i32 %7, 7
|
|
||||||
%9 = getelementptr inbounds i32, i32* %6, i32 %8
|
|
||||||
%10 = getelementptr inbounds i32, i32* %9, i32 5
|
|
||||||
%11 = load i32, i32* %10, align 4, !tbaa !9
|
|
||||||
%12 = getelementptr inbounds [25 x i8], [25 x i8]* %2, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 25, i8* nonnull %12) #11
|
|
||||||
%13 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 20, i8* nonnull %13) #11
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(20) %13, i8* nonnull align 1 dereferenceable(20) getelementptr inbounds ([20 x i8], [20 x i8]* @__const.configureCGRA.directoryPath, i32 0, i32 0), i32 20, i1 false)
|
|
||||||
%14 = call i32 (i8*, i8*, ...) @sprintf(i8* nonnull %12, i8* nonnull dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i32 0, i32 0), i32 %0) #11
|
|
||||||
%15 = call i8* @strcat(i8* nonnull %13, i8* nonnull %12) #11
|
|
||||||
%16 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str.19, i32 0, i32 0), i8* nonnull %12)
|
|
||||||
%17 = icmp slt i32 %11, 1
|
|
||||||
br i1 %17, label %18, label %25
|
|
||||||
|
|
||||||
18: ; preds = %1
|
|
||||||
%19 = load i32, i32* @dynamicTCVal, align 4, !tbaa !9
|
|
||||||
%20 = add nsw i32 %19, %11
|
|
||||||
%21 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @.str.20, i32 0, i32 0), i32 %11, i32 %19)
|
|
||||||
%22 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%23 = getelementptr inbounds i32, i32* %22, i32 %8
|
|
||||||
%24 = getelementptr inbounds i32, i32* %23, i32 5
|
|
||||||
store i32 %20, i32* %24, align 4, !tbaa !9
|
|
||||||
br label %25
|
|
||||||
|
|
||||||
25: ; preds = %18, %1
|
|
||||||
%26 = getelementptr inbounds [40 x i8], [40 x i8]* %4, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %26) #11
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %26, i8* nonnull align 1 dereferenceable(40) getelementptr inbounds ([40 x i8], [40 x i8]* @__const.configureCGRA.initCGRAfile, i32 0, i32 0), i32 40, i1 false)
|
|
||||||
%27 = call i32 @strlen(i8* nonnull %26)
|
|
||||||
%28 = getelementptr [40 x i8], [40 x i8]* %4, i32 0, i32 %27
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(14) %28, i8* nonnull align 1 dereferenceable(14) getelementptr inbounds ([14 x i8], [14 x i8]* @.str.21, i32 0, i32 0), i32 14, i1 false)
|
|
||||||
%29 = call %struct._IO_FILE* @fopen(i8* nonnull %26, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.22, i32 0, i32 0))
|
|
||||||
br label %30
|
|
||||||
|
|
||||||
30: ; preds = %30, %25
|
|
||||||
%31 = phi i32 [ 0, %25 ], [ %37, %30 ]
|
|
||||||
%32 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%33 = getelementptr inbounds i32, i32* %32, i32 %8
|
|
||||||
%34 = getelementptr inbounds i32, i32* %33, i32 %31
|
|
||||||
%35 = load i32, i32* %34, align 4, !tbaa !9
|
|
||||||
%36 = call i32 (%struct._IO_FILE*, i8*, ...) @fprintf(%struct._IO_FILE* %29, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.23, i32 0, i32 0), i32 %35)
|
|
||||||
%37 = add nuw nsw i32 %31, 1
|
|
||||||
%38 = icmp eq i32 %37, 7
|
|
||||||
br i1 %38, label %39, label %30, !llvm.loop !16
|
|
||||||
|
|
||||||
39: ; preds = %30
|
|
||||||
%40 = load i32*, i32** @epilogPtr, align 4, !tbaa !5
|
|
||||||
%41 = getelementptr inbounds i32, i32* %40, i32 %7
|
|
||||||
%42 = load i32, i32* %41, align 4, !tbaa !14
|
|
||||||
%43 = zext i32 %42 to i64
|
|
||||||
%44 = call i32 (%struct._IO_FILE*, i8*, ...) @fprintf(%struct._IO_FILE* %29, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.24, i32 0, i32 0), i64 %43)
|
|
||||||
%45 = load i32*, i32** @prologPtr, align 4, !tbaa !5
|
|
||||||
%46 = getelementptr inbounds i32, i32* %45, i32 %7
|
|
||||||
%47 = load i32, i32* %46, align 4, !tbaa !14
|
|
||||||
%48 = zext i32 %47 to i64
|
|
||||||
%49 = call i32 (%struct._IO_FILE*, i8*, ...) @fprintf(%struct._IO_FILE* %29, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.24, i32 0, i32 0), i64 %48)
|
|
||||||
%50 = load i32*, i32** @kernelPtr, align 4, !tbaa !5
|
|
||||||
%51 = getelementptr inbounds i32, i32* %50, i32 %7
|
|
||||||
%52 = load i32, i32* %51, align 4, !tbaa !14
|
|
||||||
%53 = zext i32 %52 to i64
|
|
||||||
%54 = call i32 (%struct._IO_FILE*, i8*, ...) @fprintf(%struct._IO_FILE* %29, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.24, i32 0, i32 0), i64 %53)
|
|
||||||
%55 = call i32 @fclose(%struct._IO_FILE* %29)
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %26) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 20, i8* nonnull %13) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 25, i8* nonnull %12) #11
|
|
||||||
ret i32 0
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @fprintf(%struct._IO_FILE* nocapture noundef, i8* nocapture noundef readonly, ...) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: nounwind
|
|
||||||
define dso_local void @checkTotalLoops() local_unnamed_addr #3 {
|
|
||||||
%1 = alloca [40 x i8], align 1
|
|
||||||
%2 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str.35, i32 0, i32 0))
|
|
||||||
%3 = getelementptr inbounds [40 x i8], [40 x i8]* %1, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %3) #11
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %3, i8* nonnull align 1 dereferenceable(40) getelementptr inbounds ([40 x i8], [40 x i8]* @__const.checkTotalLoops.myfile, i32 0, i32 0), i32 40, i1 false)
|
|
||||||
%4 = call %struct._IO_FILE* @fopen(i8* nonnull %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.7, i32 0, i32 0))
|
|
||||||
%5 = tail call i32 (%struct._IO_FILE*, i8*, ...) @__isoc99_fscanf(%struct._IO_FILE* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.26, i32 0, i32 0), i32* nonnull @totalLoops) #11
|
|
||||||
%6 = tail call i32 @fclose(%struct._IO_FILE* %4)
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %3) #11
|
|
||||||
ret void
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nounwind
|
|
||||||
define dso_local i8* @runOnCGRA() local_unnamed_addr #3 {
|
|
||||||
%1 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str.36, i32 0, i32 0))
|
|
||||||
tail call void asm sideeffect "mov r11,$0", "r"(i32 15) #11, !srcloc !17
|
|
||||||
ret i8* null
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nounwind
|
|
||||||
define dso_local void @accelerateOnCGRA(i32 %0) local_unnamed_addr #3 {
|
|
||||||
%2 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str.37, i32 0, i32 0))
|
|
||||||
%3 = tail call i32 @configureCGRA(i32 %0)
|
|
||||||
%4 = tail call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @.str.30, i32 0, i32 0), i32 %0)
|
|
||||||
%5 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str.36, i32 0, i32 0)) #11
|
|
||||||
tail call void asm sideeffect "mov r11,$0", "r"(i32 15) #11, !srcloc !17
|
|
||||||
ret void
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
define dso_local void @deleteCGRA() local_unnamed_addr #0 {
|
|
||||||
%1 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str.38, i32 0, i32 0))
|
|
||||||
ret void
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nounwind
|
|
||||||
define dso_local void @createCGRA() local_unnamed_addr #3 {
|
|
||||||
%1 = alloca [40 x i8], align 1
|
|
||||||
%2 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str.39, i32 0, i32 0))
|
|
||||||
%3 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str.35, i32 0, i32 0)) #11
|
|
||||||
%4 = getelementptr inbounds [40 x i8], [40 x i8]* %1, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %4) #11
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %4, i8* nonnull align 1 dereferenceable(40) getelementptr inbounds ([40 x i8], [40 x i8]* @__const.checkTotalLoops.myfile, i32 0, i32 0), i32 40, i1 false) #11
|
|
||||||
%5 = call %struct._IO_FILE* @fopen(i8* nonnull %4, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.7, i32 0, i32 0)) #11
|
|
||||||
%6 = tail call i32 (%struct._IO_FILE*, i8*, ...) @__isoc99_fscanf(%struct._IO_FILE* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.26, i32 0, i32 0), i32* nonnull @totalLoops) #11
|
|
||||||
%7 = tail call i32 @fclose(%struct._IO_FILE* %5) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %4) #11
|
|
||||||
%8 = load i32, i32* @totalLoops, align 4, !tbaa !9
|
|
||||||
%9 = mul i32 %8, 28
|
|
||||||
%10 = tail call noalias i8* @malloc(i32 %9) #11
|
|
||||||
store i8* %10, i8** bitcast (i32** @initCGRA to i8**), align 4, !tbaa !5
|
|
||||||
%11 = shl i32 %8, 2
|
|
||||||
%12 = tail call noalias i8* @malloc(i32 %11) #11
|
|
||||||
store i8* %12, i8** bitcast (i32** @prologPtr to i8**), align 4, !tbaa !5
|
|
||||||
%13 = tail call noalias i8* @malloc(i32 %11) #11
|
|
||||||
store i8* %13, i8** bitcast (i32** @kernelPtr to i8**), align 4, !tbaa !5
|
|
||||||
%14 = tail call noalias i8* @malloc(i32 %11) #11
|
|
||||||
store i8* %14, i8** bitcast (i32** @epilogPtr to i8**), align 4, !tbaa !5
|
|
||||||
%15 = icmp eq i32 %8, 0
|
|
||||||
br i1 %15, label %.loopexit, label %.preheader.preheader
|
|
||||||
|
|
||||||
.preheader.preheader: ; preds = %0
|
|
||||||
br label %.preheader
|
|
||||||
|
|
||||||
.preheader: ; preds = %.preheader, %.preheader.preheader
|
|
||||||
%16 = phi i32 [ %18, %.preheader ], [ 1, %.preheader.preheader ]
|
|
||||||
%17 = tail call i32 @initializeParameters(i32 %16)
|
|
||||||
%18 = add i32 %16, 1
|
|
||||||
%19 = load i32, i32* @totalLoops, align 4, !tbaa !9
|
|
||||||
%20 = icmp ugt i32 %18, %19
|
|
||||||
br i1 %20, label %.loopexit.loopexit, label %.preheader, !llvm.loop !18
|
|
||||||
|
|
||||||
.loopexit.loopexit: ; preds = %.preheader
|
|
||||||
br label %.loopexit
|
|
||||||
|
|
||||||
.loopexit: ; preds = %.loopexit.loopexit, %0
|
|
||||||
%21 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str.40, i32 0, i32 0))
|
|
||||||
ret void
|
|
||||||
}
|
|
||||||
|
|
||||||
attributes #0 = { nofree nounwind "disable-tail-calls"="false" "frame-pointer"="none" "min-legal-vector-width"="0" "no-jump-tables"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #1 = { nofree nounwind willreturn "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #2 = { nofree nounwind "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #3 = { nounwind "disable-tail-calls"="false" "frame-pointer"="none" "min-legal-vector-width"="0" "no-jump-tables"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #4 = { nofree nounwind }
|
|
||||||
attributes #5 = { argmemonly nofree nosync nounwind willreturn writeonly }
|
|
||||||
attributes #6 = { argmemonly nofree nosync nounwind willreturn }
|
|
||||||
attributes #7 = { argmemonly nofree nounwind willreturn "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #8 = { argmemonly nofree nounwind readonly willreturn }
|
|
||||||
attributes #9 = { inaccessiblememonly nofree nounwind willreturn "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #10 = { "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #11 = { nounwind }
|
|
||||||
|
|
||||||
!llvm.ident = !{!0, !0}
|
|
||||||
!llvm.module.flags = !{!1, !2, !3, !4}
|
|
||||||
|
|
||||||
!0 = !{!"clang version 13.0.0 (https://github.com/MPSLab-ASU/CCF-20.04/ 05285de7579f417a4d73ad832b8f4cc497f25235)"}
|
|
||||||
!1 = !{i32 7, !"Dwarf Version", i32 4}
|
|
||||||
!2 = !{i32 2, !"Debug Info Version", i32 3}
|
|
||||||
!3 = !{i32 1, !"wchar_size", i32 4}
|
|
||||||
!4 = !{i32 1, !"min_enum_size", i32 4}
|
|
||||||
!5 = !{!6, !6, i64 0}
|
|
||||||
!6 = !{!"any pointer", !7, i64 0}
|
|
||||||
!7 = !{!"omnipotent char", !8, i64 0}
|
|
||||||
!8 = !{!"Simple C/C++ TBAA"}
|
|
||||||
!9 = !{!10, !10, i64 0}
|
|
||||||
!10 = !{!"int", !7, i64 0}
|
|
||||||
!11 = distinct !{!11, !12, !13}
|
|
||||||
!12 = !{!"llvm.loop.mustprogress"}
|
|
||||||
!13 = !{!"llvm.loop.unroll.disable"}
|
|
||||||
!14 = !{!15, !15, i64 0}
|
|
||||||
!15 = !{!"long", !7, i64 0}
|
|
||||||
!16 = distinct !{!16, !12, !13}
|
|
||||||
!17 = !{i32 5341}
|
|
||||||
!18 = distinct !{!18, !12, !13}
|
|
||||||
|
|
@ -1,11 +1,13 @@
|
||||||
FILE1 = pow.c
|
FILE1 = pow.c
|
||||||
|
|
||||||
all: pow
|
all: pow pow_arm
|
||||||
|
|
||||||
CC = cgracc
|
CC = cgracc
|
||||||
ARMCC = arm-linux-gnueabi-gcc
|
ARMCC = arm-linux-gnueabi-gcc
|
||||||
LIB = -lm
|
LIB = -lm
|
||||||
pow: ${FILE1} Makefile
|
pow: ${FILE1} Makefile
|
||||||
$(CC) -static -O3 ${FILE1} -o pow
|
$(CC) -static -O3 ${FILE1} -o pow
|
||||||
|
pow_arm: ${FILE1} Makefile
|
||||||
|
$(ARMCC) -static -O3 ${FILE1} -o pow_cpu
|
||||||
clean:
|
clean:
|
||||||
rm -rf pow CGRAExec m5out *.bc *.ll
|
rm -rf pow CGRAExec m5out *.bc *.ll out pow_cpu CPU
|
||||||
|
|
|
||||||
|
|
@ -1,569 +0,0 @@
|
||||||
; ModuleID = 'temp.bc'
|
|
||||||
source_filename = "llvm-link"
|
|
||||||
target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
|
|
||||||
target triple = "armv7-none-linux-eabi"
|
|
||||||
|
|
||||||
%struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, %struct._IO_codecvt*, %struct._IO_wide_data*, %struct._IO_FILE*, i8*, i32, i32, [40 x i8] }
|
|
||||||
%struct._IO_marker = type opaque
|
|
||||||
%struct._IO_codecvt = type opaque
|
|
||||||
%struct._IO_wide_data = type opaque
|
|
||||||
|
|
||||||
@.str = private unnamed_addr constant [24 x i8] c"***** %d^%d = %d *****\0A\00", align 1
|
|
||||||
@totalLoops = dso_local global i32 0, align 4
|
|
||||||
@dynamicTCVal = dso_local local_unnamed_addr global i32 0, align 4
|
|
||||||
@initCGRA = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@epilog = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@prolog = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@kernel = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@prologPtr = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@epilogPtr = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@kernelPtr = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@ArrPtr = dso_local local_unnamed_addr global i32* null, align 4
|
|
||||||
@pth = dso_local local_unnamed_addr global i32 0, align 4
|
|
||||||
@str = private unnamed_addr constant [34 x i8] c"from cgra.c Initialize Parameters\00", align 1
|
|
||||||
@__const.configureCGRA.directoryPath = private unnamed_addr constant [20 x i8] c"./CGRAExec/L\00\00\00\00\00\00\00\00", align 1
|
|
||||||
@.str.1 = private unnamed_addr constant [3 x i8] c"%d\00", align 1
|
|
||||||
@.str.2 = private unnamed_addr constant [16 x i8] c"/epilog_ins.bin\00", align 1
|
|
||||||
@.str.3 = private unnamed_addr constant [16 x i8] c"/prolog_ins.bin\00", align 1
|
|
||||||
@.str.4 = private unnamed_addr constant [16 x i8] c"/kernel_ins.bin\00", align 1
|
|
||||||
@.str.5 = private unnamed_addr constant [17 x i8] c"/CGRA_config.txt\00", align 1
|
|
||||||
@.str.6 = private unnamed_addr constant [3 x i8] c"rb\00", align 1
|
|
||||||
@.str.7 = private unnamed_addr constant [2 x i8] c"r\00", align 1
|
|
||||||
@.str.8 = private unnamed_addr constant [32 x i8] c"\0A**********EPISIZE %d*********\0A\00", align 1
|
|
||||||
@.str.9 = private unnamed_addr constant [32 x i8] c"\0A**********PROSIZE %d*********\0A\00", align 1
|
|
||||||
@.str.10 = private unnamed_addr constant [33 x i8] c"\0A**********KERNSIZE %d*********\0A\00", align 1
|
|
||||||
@.str.11 = private unnamed_addr constant [37 x i8] c"\0A******SIZE OF UNSIGNED LONG%d*****\0A\00", align 1
|
|
||||||
@.str.12 = private unnamed_addr constant [42 x i8] c"\0A******SIZE OF UNSIGNED LONG LONG%d*****\0A\00", align 1
|
|
||||||
@.str.13 = private unnamed_addr constant [26 x i8] c"/livevar_st_ins_count.txt\00", align 1
|
|
||||||
@.str.14 = private unnamed_addr constant [39 x i8] c"\0A************XDIM and YDim are %d, %d\0A\00", align 1
|
|
||||||
@.str.15 = private unnamed_addr constant [18 x i8] c"/kernel_count.txt\00", align 1
|
|
||||||
@.str.16 = private unnamed_addr constant [16 x i8] c"Loop Count: %d\0A\00", align 1
|
|
||||||
@.str.17 = private unnamed_addr constant [55 x i8] c"From FILE: PROLOGPC= %lx, EPILOGPC=%lx, KernelPC=%lx\0A\00", align 1
|
|
||||||
@str.34 = private unnamed_addr constant [14 x i8] c"configureCGRA\00", align 1
|
|
||||||
@.str.19 = private unnamed_addr constant [14 x i8] c"\0Aloopno = %s\0A\00", align 1
|
|
||||||
@.str.20 = private unnamed_addr constant [17 x i8] c"newTC = %d + %d\0A\00", align 1
|
|
||||||
@__const.configureCGRA.initCGRAfile = private unnamed_addr constant [40 x i8] c"./CGRAExec/L1\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 1
|
|
||||||
@.str.21 = private unnamed_addr constant [14 x i8] c"/initCGRA.txt\00", align 1
|
|
||||||
@.str.22 = private unnamed_addr constant [3 x i8] c"wb\00", align 1
|
|
||||||
@.str.23 = private unnamed_addr constant [4 x i8] c"%d\0A\00", align 1
|
|
||||||
@.str.24 = private unnamed_addr constant [5 x i8] c"%ld\0A\00", align 1
|
|
||||||
@str.35 = private unnamed_addr constant [16 x i8] c"checkTotalLoops\00", align 1
|
|
||||||
@__const.checkTotalLoops.myfile = private unnamed_addr constant [40 x i8] c"./CGRAExec/total_loops.txt\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 1
|
|
||||||
@.str.26 = private unnamed_addr constant [3 x i8] c"%u\00", align 1
|
|
||||||
@str.36 = private unnamed_addr constant [12 x i8] c"\0A\0ArunOnCGRA\00", align 1
|
|
||||||
@str.37 = private unnamed_addr constant [19 x i8] c"\0A\0AaccelerateOnCGRA\00", align 1
|
|
||||||
@.str.30 = private unnamed_addr constant [35 x i8] c"Core will execute loop %u on CGRA\0A\00", align 1
|
|
||||||
@str.38 = private unnamed_addr constant [15 x i8] c"\0Adeleting cgra\00", align 1
|
|
||||||
@str.39 = private unnamed_addr constant [11 x i8] c"createCGRA\00", align 1
|
|
||||||
@str.40 = private unnamed_addr constant [35 x i8] c"Main thread calling CGRA thread...\00", align 1
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
define dso_local i32 @main(i32 %0, i8** nocapture readonly %1) local_unnamed_addr #0 {
|
|
||||||
%3 = getelementptr inbounds i8*, i8** %1, i32 1
|
|
||||||
%4 = load i8*, i8** %3, align 4, !tbaa !5
|
|
||||||
%5 = tail call i32 @strtol(i8* nocapture nonnull %4, i8** null, i32 10) #11
|
|
||||||
%6 = icmp sgt i32 %5, 1
|
|
||||||
br i1 %6, label %.preheader.preheader, label %.loopexit
|
|
||||||
|
|
||||||
.preheader.preheader: ; preds = %2
|
|
||||||
br label %.preheader
|
|
||||||
|
|
||||||
.loopexit.loopexit: ; preds = %.preheader
|
|
||||||
br label %.loopexit
|
|
||||||
|
|
||||||
.loopexit: ; preds = %.loopexit.loopexit, %2
|
|
||||||
%7 = phi i32 [ 1, %2 ], [ %11, %.loopexit.loopexit ]
|
|
||||||
%8 = tail call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i32 0, i32 0), i32 2, i32 %5, i32 %7)
|
|
||||||
ret i32 0
|
|
||||||
|
|
||||||
.preheader: ; preds = %.preheader.preheader, %.preheader
|
|
||||||
%9 = phi i32 [ %12, %.preheader ], [ 1, %.preheader.preheader ]
|
|
||||||
%10 = phi i32 [ %11, %.preheader ], [ 1, %.preheader.preheader ]
|
|
||||||
%11 = shl nsw i32 %10, 1
|
|
||||||
%12 = add nuw nsw i32 %9, 1
|
|
||||||
%13 = icmp eq i32 %12, %5
|
|
||||||
br i1 %13, label %.loopexit.loopexit, label %.preheader, !llvm.loop !9
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind willreturn
|
|
||||||
declare dso_local i32 @strtol(i8* readonly, i8** nocapture, i32) local_unnamed_addr #1
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @printf(i8* nocapture noundef readonly, ...) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: nounwind
|
|
||||||
define dso_local i32 @initializeParameters(i32 %0) local_unnamed_addr #3 {
|
|
||||||
%2 = alloca [25 x i8], align 1
|
|
||||||
%3 = alloca [20 x i8], align 1
|
|
||||||
%4 = alloca [40 x i8], align 1
|
|
||||||
%5 = alloca [40 x i8], align 1
|
|
||||||
%6 = alloca [40 x i8], align 1
|
|
||||||
%7 = alloca [40 x i8], align 1
|
|
||||||
%8 = alloca [40 x i8], align 1
|
|
||||||
%9 = alloca i32, align 4
|
|
||||||
%10 = alloca i32, align 4
|
|
||||||
%11 = alloca i32, align 4
|
|
||||||
%12 = alloca i32, align 4
|
|
||||||
%13 = alloca [256 x i8], align 1
|
|
||||||
%14 = alloca [40 x i8], align 1
|
|
||||||
%15 = alloca i32, align 4
|
|
||||||
%16 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @str, i32 0, i32 0))
|
|
||||||
%17 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%18 = add i32 %0, -1
|
|
||||||
%19 = mul i32 %18, 7
|
|
||||||
%20 = getelementptr inbounds i32, i32* %17, i32 %19
|
|
||||||
store i32 2011168768, i32* %20, align 4, !tbaa !13
|
|
||||||
%21 = getelementptr inbounds i32, i32* %20, i32 1
|
|
||||||
store i32 2011168768, i32* %21, align 4, !tbaa !13
|
|
||||||
%22 = getelementptr inbounds i32, i32* %20, i32 2
|
|
||||||
%23 = getelementptr inbounds [25 x i8], [25 x i8]* %2, i32 0, i32 0
|
|
||||||
%24 = bitcast i32* %22 to i8*
|
|
||||||
tail call void @llvm.memset.p0i8.i64(i8* nonnull align 4 dereferenceable(20) %24, i8 0, i64 20, i1 false)
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 25, i8* nonnull %23) #11
|
|
||||||
%25 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 20, i8* nonnull %25) #11
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(20) %25, i8* nonnull align 1 dereferenceable(20) getelementptr inbounds ([20 x i8], [20 x i8]* @__const.configureCGRA.directoryPath, i32 0, i32 0), i32 20, i1 false)
|
|
||||||
%26 = call i32 (i8*, i8*, ...) @sprintf(i8* nonnull %23, i8* nonnull dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i32 0, i32 0), i32 %0) #11
|
|
||||||
%27 = call i8* @strcat(i8* nonnull %25, i8* nonnull %23) #11
|
|
||||||
%28 = getelementptr inbounds [40 x i8], [40 x i8]* %4, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %28) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %28, i8 0, i32 40, i1 false)
|
|
||||||
%29 = getelementptr inbounds [40 x i8], [40 x i8]* %5, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %29) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %29, i8 0, i32 40, i1 false)
|
|
||||||
%30 = getelementptr inbounds [40 x i8], [40 x i8]* %6, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %30) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %30, i8 0, i32 40, i1 false)
|
|
||||||
%31 = getelementptr inbounds [40 x i8], [40 x i8]* %7, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %31) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %31, i8 0, i32 40, i1 false)
|
|
||||||
%32 = getelementptr inbounds [40 x i8], [40 x i8]* %8, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %32) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %32, i8 0, i32 40, i1 false)
|
|
||||||
%33 = call i8* @strcat(i8* nonnull %28, i8* nonnull %25) #11
|
|
||||||
%34 = call i32 @strlen(i8* nonnull %28)
|
|
||||||
%35 = getelementptr [40 x i8], [40 x i8]* %4, i32 0, i32 %34
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(16) %35, i8* nonnull align 1 dereferenceable(16) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.2, i32 0, i32 0), i32 16, i1 false)
|
|
||||||
%36 = call i8* @strcat(i8* nonnull %29, i8* nonnull %25) #11
|
|
||||||
%37 = call i32 @strlen(i8* nonnull %29)
|
|
||||||
%38 = getelementptr [40 x i8], [40 x i8]* %5, i32 0, i32 %37
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(16) %38, i8* nonnull align 1 dereferenceable(16) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.3, i32 0, i32 0), i32 16, i1 false)
|
|
||||||
%39 = call i8* @strcat(i8* nonnull %30, i8* nonnull %25) #11
|
|
||||||
%40 = call i32 @strlen(i8* nonnull %30)
|
|
||||||
%41 = getelementptr [40 x i8], [40 x i8]* %6, i32 0, i32 %40
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(16) %41, i8* nonnull align 1 dereferenceable(16) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.4, i32 0, i32 0), i32 16, i1 false)
|
|
||||||
%42 = call i8* @strcat(i8* nonnull %32, i8* nonnull %25) #11
|
|
||||||
%43 = call i32 @strlen(i8* nonnull %32)
|
|
||||||
%44 = getelementptr [40 x i8], [40 x i8]* %8, i32 0, i32 %43
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(17) %44, i8* nonnull align 1 dereferenceable(17) getelementptr inbounds ([17 x i8], [17 x i8]* @.str.5, i32 0, i32 0), i32 17, i1 false)
|
|
||||||
%45 = call %struct._IO_FILE* @fopen(i8* nonnull %28, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.6, i32 0, i32 0))
|
|
||||||
%46 = call %struct._IO_FILE* @fopen(i8* nonnull %29, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.6, i32 0, i32 0))
|
|
||||||
%47 = call %struct._IO_FILE* @fopen(i8* nonnull %30, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.6, i32 0, i32 0))
|
|
||||||
%48 = call %struct._IO_FILE* @fopen(i8* nonnull %32, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.7, i32 0, i32 0))
|
|
||||||
%49 = bitcast i32* %9 to i8*
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %49) #11
|
|
||||||
%50 = bitcast i32* %10 to i8*
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %50) #11
|
|
||||||
%51 = bitcast i32* %11 to i8*
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %51) #11
|
|
||||||
%52 = bitcast i32* %12 to i8*
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %52) #11
|
|
||||||
%53 = call i32 @fread(i8* nonnull %49, i32 4, i32 1, %struct._IO_FILE* %45)
|
|
||||||
%54 = call i32 @fread(i8* nonnull %50, i32 4, i32 1, %struct._IO_FILE* %46)
|
|
||||||
%55 = call i32 @fread(i8* nonnull %51, i32 4, i32 1, %struct._IO_FILE* %47)
|
|
||||||
%56 = load i32, i32* %9, align 4, !tbaa !13
|
|
||||||
%57 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @.str.8, i32 0, i32 0), i32 %56)
|
|
||||||
%58 = load i32, i32* %10, align 4, !tbaa !13
|
|
||||||
%59 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @.str.9, i32 0, i32 0), i32 %58)
|
|
||||||
%60 = load i32, i32* %11, align 4, !tbaa !13
|
|
||||||
%61 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @.str.10, i32 0, i32 0), i32 %60)
|
|
||||||
%62 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @.str.11, i32 0, i32 0), i32 4)
|
|
||||||
%63 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @.str.12, i32 0, i32 0), i32 8)
|
|
||||||
%64 = shl i32 %56, 3
|
|
||||||
%65 = call noalias i8* @malloc(i32 %64) #11
|
|
||||||
store i8* %65, i8** bitcast (i32** @epilog to i8**), align 4, !tbaa !5
|
|
||||||
%66 = shl i32 %58, 3
|
|
||||||
%67 = call noalias i8* @malloc(i32 %66) #11
|
|
||||||
store i8* %67, i8** bitcast (i32** @prolog to i8**), align 4, !tbaa !5
|
|
||||||
%68 = shl i32 %60, 3
|
|
||||||
%69 = call noalias i8* @malloc(i32 %68) #11
|
|
||||||
store i8* %69, i8** bitcast (i32** @kernel to i8**), align 4, !tbaa !5
|
|
||||||
%70 = call i32 @fread(i8* %65, i32 8, i32 %56, %struct._IO_FILE* %45)
|
|
||||||
%71 = load i8*, i8** bitcast (i32** @prolog to i8**), align 4, !tbaa !5
|
|
||||||
%72 = call i32 @fread(i8* %71, i32 8, i32 %58, %struct._IO_FILE* %46)
|
|
||||||
%73 = load i8*, i8** bitcast (i32** @kernel to i8**), align 4, !tbaa !5
|
|
||||||
%74 = call i32 @fread(i8* %73, i32 8, i32 %60, %struct._IO_FILE* %47)
|
|
||||||
%75 = call i8* @strcat(i8* nonnull %31, i8* nonnull %25) #11
|
|
||||||
%76 = call i32 @strlen(i8* nonnull %31)
|
|
||||||
%77 = getelementptr [40 x i8], [40 x i8]* %7, i32 0, i32 %76
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(26) %77, i8* nonnull align 1 dereferenceable(26) getelementptr inbounds ([26 x i8], [26 x i8]* @.str.13, i32 0, i32 0), i32 26, i1 false)
|
|
||||||
%78 = call %struct._IO_FILE* @fopen(i8* nonnull %31, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.7, i32 0, i32 0))
|
|
||||||
%79 = call i32 (%struct._IO_FILE*, i8*, ...) @__isoc99_fscanf(%struct._IO_FILE* %78, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i32 0, i32 0), i32* nonnull %12) #11
|
|
||||||
%80 = getelementptr inbounds [256 x i8], [256 x i8]* %13, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 256, i8* nonnull %80) #11
|
|
||||||
%81 = call i8* @fgets(i8* nonnull %80, i32 256, %struct._IO_FILE* %48)
|
|
||||||
%82 = icmp eq i8* %81, null
|
|
||||||
br i1 %82, label %.loopexit, label %.preheader.preheader
|
|
||||||
|
|
||||||
.preheader.preheader: ; preds = %1
|
|
||||||
br label %.preheader
|
|
||||||
|
|
||||||
.preheader: ; preds = %.preheader.preheader, %94
|
|
||||||
%83 = phi i32 [ %96, %94 ], [ 0, %.preheader.preheader ]
|
|
||||||
%84 = phi i32 [ %95, %94 ], [ 0, %.preheader.preheader ]
|
|
||||||
%85 = phi i32 [ %86, %94 ], [ 0, %.preheader.preheader ]
|
|
||||||
%86 = add nuw nsw i32 %85, 1
|
|
||||||
%87 = icmp eq i32 %85, 0
|
|
||||||
br i1 %87, label %88, label %90
|
|
||||||
|
|
||||||
88: ; preds = %.preheader
|
|
||||||
%89 = call i32 @strtol(i8* nocapture nonnull %80, i8** null, i32 10) #11
|
|
||||||
br label %94
|
|
||||||
|
|
||||||
90: ; preds = %.preheader
|
|
||||||
%91 = icmp eq i32 %86, 2
|
|
||||||
br i1 %91, label %92, label %.loopexit.loopexit
|
|
||||||
|
|
||||||
92: ; preds = %90
|
|
||||||
%93 = call i32 @strtol(i8* nocapture nonnull %80, i8** null, i32 10) #11
|
|
||||||
br label %94
|
|
||||||
|
|
||||||
94: ; preds = %92, %88
|
|
||||||
%95 = phi i32 [ %84, %88 ], [ %93, %92 ]
|
|
||||||
%96 = phi i32 [ %89, %88 ], [ %83, %92 ]
|
|
||||||
%97 = call i8* @fgets(i8* nonnull %80, i32 256, %struct._IO_FILE* %48)
|
|
||||||
%98 = icmp eq i8* %97, null
|
|
||||||
br i1 %98, label %.loopexit.loopexit, label %.preheader, !llvm.loop !15
|
|
||||||
|
|
||||||
.loopexit.loopexit: ; preds = %94, %90
|
|
||||||
%.ph = phi i32 [ %95, %94 ], [ %84, %90 ]
|
|
||||||
%.ph6 = phi i32 [ %96, %94 ], [ %83, %90 ]
|
|
||||||
br label %.loopexit
|
|
||||||
|
|
||||||
.loopexit: ; preds = %.loopexit.loopexit, %1
|
|
||||||
%99 = phi i32 [ 0, %1 ], [ %.ph, %.loopexit.loopexit ]
|
|
||||||
%100 = phi i32 [ 0, %1 ], [ %.ph6, %.loopexit.loopexit ]
|
|
||||||
%101 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @.str.14, i32 0, i32 0), i32 %100, i32 %99)
|
|
||||||
%102 = mul nsw i32 %100, %99
|
|
||||||
%103 = sdiv i32 %60, %102
|
|
||||||
%104 = sdiv i32 %56, %102
|
|
||||||
%105 = sdiv i32 %58, %102
|
|
||||||
%106 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%107 = getelementptr inbounds i32, i32* %106, i32 %19
|
|
||||||
%108 = getelementptr inbounds i32, i32* %107, i32 2
|
|
||||||
store i32 %103, i32* %108, align 4, !tbaa !13
|
|
||||||
%109 = getelementptr inbounds i32, i32* %107, i32 3
|
|
||||||
store i32 %104, i32* %109, align 4, !tbaa !13
|
|
||||||
%110 = getelementptr inbounds i32, i32* %107, i32 4
|
|
||||||
store i32 %105, i32* %110, align 4, !tbaa !13
|
|
||||||
%111 = load i32, i32* %12, align 4, !tbaa !13
|
|
||||||
%112 = sdiv i32 %111, %102
|
|
||||||
%113 = getelementptr inbounds i32, i32* %107, i32 6
|
|
||||||
store i32 %112, i32* %113, align 4, !tbaa !13
|
|
||||||
%114 = call i32 @fclose(%struct._IO_FILE* %45)
|
|
||||||
%115 = call i32 @fclose(%struct._IO_FILE* %46)
|
|
||||||
%116 = call i32 @fclose(%struct._IO_FILE* %47)
|
|
||||||
%117 = call i32 @fclose(%struct._IO_FILE* %78)
|
|
||||||
%118 = call i32 @fclose(%struct._IO_FILE* %48)
|
|
||||||
%119 = getelementptr inbounds [40 x i8], [40 x i8]* %14, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %119) #11
|
|
||||||
call void @llvm.memset.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %119, i8 0, i32 40, i1 false)
|
|
||||||
%120 = call i8* @strcat(i8* nonnull %119, i8* nonnull %25) #11
|
|
||||||
%121 = call i32 @strlen(i8* nonnull %119)
|
|
||||||
%122 = getelementptr [40 x i8], [40 x i8]* %14, i32 0, i32 %121
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(18) %122, i8* nonnull align 1 dereferenceable(18) getelementptr inbounds ([18 x i8], [18 x i8]* @.str.15, i32 0, i32 0), i32 18, i1 false)
|
|
||||||
%123 = bitcast i32* %15 to i8*
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %123) #11
|
|
||||||
store i32 0, i32* %15, align 4, !tbaa !13
|
|
||||||
%124 = call %struct._IO_FILE* @fopen(i8* nonnull %119, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.7, i32 0, i32 0))
|
|
||||||
%125 = call i32 (%struct._IO_FILE*, i8*, ...) @__isoc99_fscanf(%struct._IO_FILE* %124, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i32 0, i32 0), i32* nonnull %15) #11
|
|
||||||
%126 = call i32 @fclose(%struct._IO_FILE* %124)
|
|
||||||
%127 = load i32, i32* %15, align 4, !tbaa !13
|
|
||||||
%128 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.16, i32 0, i32 0), i32 %127)
|
|
||||||
%129 = load i32, i32* %15, align 4, !tbaa !13
|
|
||||||
%130 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%131 = getelementptr inbounds i32, i32* %130, i32 %19
|
|
||||||
%132 = getelementptr inbounds i32, i32* %131, i32 5
|
|
||||||
store i32 %129, i32* %132, align 4, !tbaa !13
|
|
||||||
%133 = load i32*, i32** @prolog, align 4, !tbaa !5
|
|
||||||
%134 = ptrtoint i32* %133 to i32
|
|
||||||
%135 = load i32*, i32** @epilog, align 4, !tbaa !5
|
|
||||||
%136 = ptrtoint i32* %135 to i32
|
|
||||||
%137 = load i32*, i32** @kernel, align 4, !tbaa !5
|
|
||||||
%138 = ptrtoint i32* %137 to i32
|
|
||||||
%139 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([55 x i8], [55 x i8]* @.str.17, i32 0, i32 0), i32 %134, i32 %136, i32 %138)
|
|
||||||
%140 = load i32*, i32** @prolog, align 4, !tbaa !5
|
|
||||||
%141 = ptrtoint i32* %140 to i32
|
|
||||||
%142 = load i32*, i32** @prologPtr, align 4, !tbaa !5
|
|
||||||
%143 = getelementptr inbounds i32, i32* %142, i32 %18
|
|
||||||
store i32 %141, i32* %143, align 4, !tbaa !16
|
|
||||||
%144 = load i32*, i32** @epilog, align 4, !tbaa !5
|
|
||||||
%145 = ptrtoint i32* %144 to i32
|
|
||||||
%146 = load i32*, i32** @epilogPtr, align 4, !tbaa !5
|
|
||||||
%147 = getelementptr inbounds i32, i32* %146, i32 %18
|
|
||||||
store i32 %145, i32* %147, align 4, !tbaa !16
|
|
||||||
%148 = load i32*, i32** @kernel, align 4, !tbaa !5
|
|
||||||
%149 = ptrtoint i32* %148 to i32
|
|
||||||
%150 = load i32*, i32** @kernelPtr, align 4, !tbaa !5
|
|
||||||
%151 = getelementptr inbounds i32, i32* %150, i32 %18
|
|
||||||
store i32 %149, i32* %151, align 4, !tbaa !16
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %123) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %119) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 256, i8* nonnull %80) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %52) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %51) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %50) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %49) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %32) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %31) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %30) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %29) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %28) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 20, i8* nonnull %25) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 25, i8* nonnull %23) #11
|
|
||||||
ret i32 0
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare noundef i32 @puts(i8* nocapture noundef readonly) local_unnamed_addr #4
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
|
|
||||||
declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1 immarg) #5
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nosync nounwind willreturn
|
|
||||||
declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #6
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nosync nounwind willreturn
|
|
||||||
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture writeonly, i8* noalias nocapture readonly, i32, i1 immarg) #6
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @sprintf(i8* noalias nocapture noundef writeonly, i8* nocapture noundef readonly, ...) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nounwind willreturn
|
|
||||||
declare dso_local i8* @strcat(i8* noalias returned writeonly, i8* noalias nocapture readonly) local_unnamed_addr #7
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
|
|
||||||
declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i1 immarg) #5
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nounwind readonly willreturn
|
|
||||||
declare i32 @strlen(i8* nocapture) local_unnamed_addr #8
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noalias noundef %struct._IO_FILE* @fopen(i8* nocapture noundef readonly, i8* nocapture noundef readonly) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @fread(i8* nocapture noundef, i32 noundef, i32 noundef, %struct._IO_FILE* nocapture noundef) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: inaccessiblememonly nofree nounwind willreturn
|
|
||||||
declare dso_local noalias noundef i8* @malloc(i32) local_unnamed_addr #9
|
|
||||||
|
|
||||||
declare dso_local i32 @__isoc99_fscanf(%struct._IO_FILE*, i8*, ...) local_unnamed_addr #10
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i8* @fgets(i8* noundef, i32 noundef, %struct._IO_FILE* nocapture noundef) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @fclose(%struct._IO_FILE* nocapture noundef) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: argmemonly nofree nosync nounwind willreturn
|
|
||||||
declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #6
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
define dso_local i32 @configureCGRA(i32 %0) local_unnamed_addr #0 {
|
|
||||||
%2 = alloca [25 x i8], align 1
|
|
||||||
%3 = alloca [20 x i8], align 1
|
|
||||||
%4 = alloca [40 x i8], align 1
|
|
||||||
%5 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str.34, i32 0, i32 0))
|
|
||||||
%6 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%7 = add i32 %0, -1
|
|
||||||
%8 = mul i32 %7, 7
|
|
||||||
%9 = getelementptr inbounds i32, i32* %6, i32 %8
|
|
||||||
%10 = getelementptr inbounds i32, i32* %9, i32 5
|
|
||||||
%11 = load i32, i32* %10, align 4, !tbaa !13
|
|
||||||
%12 = getelementptr inbounds [25 x i8], [25 x i8]* %2, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 25, i8* nonnull %12) #11
|
|
||||||
%13 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 20, i8* nonnull %13) #11
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(20) %13, i8* nonnull align 1 dereferenceable(20) getelementptr inbounds ([20 x i8], [20 x i8]* @__const.configureCGRA.directoryPath, i32 0, i32 0), i32 20, i1 false)
|
|
||||||
%14 = call i32 (i8*, i8*, ...) @sprintf(i8* nonnull %12, i8* nonnull dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i32 0, i32 0), i32 %0) #11
|
|
||||||
%15 = call i8* @strcat(i8* nonnull %13, i8* nonnull %12) #11
|
|
||||||
%16 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str.19, i32 0, i32 0), i8* nonnull %12)
|
|
||||||
%17 = icmp slt i32 %11, 1
|
|
||||||
br i1 %17, label %18, label %25
|
|
||||||
|
|
||||||
18: ; preds = %1
|
|
||||||
%19 = load i32, i32* @dynamicTCVal, align 4, !tbaa !13
|
|
||||||
%20 = add nsw i32 %19, %11
|
|
||||||
%21 = call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @.str.20, i32 0, i32 0), i32 %11, i32 %19)
|
|
||||||
%22 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%23 = getelementptr inbounds i32, i32* %22, i32 %8
|
|
||||||
%24 = getelementptr inbounds i32, i32* %23, i32 5
|
|
||||||
store i32 %20, i32* %24, align 4, !tbaa !13
|
|
||||||
br label %25
|
|
||||||
|
|
||||||
25: ; preds = %18, %1
|
|
||||||
%26 = getelementptr inbounds [40 x i8], [40 x i8]* %4, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %26) #11
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %26, i8* nonnull align 1 dereferenceable(40) getelementptr inbounds ([40 x i8], [40 x i8]* @__const.configureCGRA.initCGRAfile, i32 0, i32 0), i32 40, i1 false)
|
|
||||||
%27 = call i32 @strlen(i8* nonnull %26)
|
|
||||||
%28 = getelementptr [40 x i8], [40 x i8]* %4, i32 0, i32 %27
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(14) %28, i8* nonnull align 1 dereferenceable(14) getelementptr inbounds ([14 x i8], [14 x i8]* @.str.21, i32 0, i32 0), i32 14, i1 false)
|
|
||||||
%29 = call %struct._IO_FILE* @fopen(i8* nonnull %26, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.22, i32 0, i32 0))
|
|
||||||
br label %30
|
|
||||||
|
|
||||||
30: ; preds = %30, %25
|
|
||||||
%31 = phi i32 [ 0, %25 ], [ %37, %30 ]
|
|
||||||
%32 = load i32*, i32** @initCGRA, align 4, !tbaa !5
|
|
||||||
%33 = getelementptr inbounds i32, i32* %32, i32 %8
|
|
||||||
%34 = getelementptr inbounds i32, i32* %33, i32 %31
|
|
||||||
%35 = load i32, i32* %34, align 4, !tbaa !13
|
|
||||||
%36 = call i32 (%struct._IO_FILE*, i8*, ...) @fprintf(%struct._IO_FILE* %29, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.23, i32 0, i32 0), i32 %35)
|
|
||||||
%37 = add nuw nsw i32 %31, 1
|
|
||||||
%38 = icmp eq i32 %37, 7
|
|
||||||
br i1 %38, label %39, label %30, !llvm.loop !18
|
|
||||||
|
|
||||||
39: ; preds = %30
|
|
||||||
%40 = load i32*, i32** @epilogPtr, align 4, !tbaa !5
|
|
||||||
%41 = getelementptr inbounds i32, i32* %40, i32 %7
|
|
||||||
%42 = load i32, i32* %41, align 4, !tbaa !16
|
|
||||||
%43 = zext i32 %42 to i64
|
|
||||||
%44 = call i32 (%struct._IO_FILE*, i8*, ...) @fprintf(%struct._IO_FILE* %29, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.24, i32 0, i32 0), i64 %43)
|
|
||||||
%45 = load i32*, i32** @prologPtr, align 4, !tbaa !5
|
|
||||||
%46 = getelementptr inbounds i32, i32* %45, i32 %7
|
|
||||||
%47 = load i32, i32* %46, align 4, !tbaa !16
|
|
||||||
%48 = zext i32 %47 to i64
|
|
||||||
%49 = call i32 (%struct._IO_FILE*, i8*, ...) @fprintf(%struct._IO_FILE* %29, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.24, i32 0, i32 0), i64 %48)
|
|
||||||
%50 = load i32*, i32** @kernelPtr, align 4, !tbaa !5
|
|
||||||
%51 = getelementptr inbounds i32, i32* %50, i32 %7
|
|
||||||
%52 = load i32, i32* %51, align 4, !tbaa !16
|
|
||||||
%53 = zext i32 %52 to i64
|
|
||||||
%54 = call i32 (%struct._IO_FILE*, i8*, ...) @fprintf(%struct._IO_FILE* %29, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.24, i32 0, i32 0), i64 %53)
|
|
||||||
%55 = call i32 @fclose(%struct._IO_FILE* %29)
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %26) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 20, i8* nonnull %13) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 25, i8* nonnull %12) #11
|
|
||||||
ret i32 0
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @fprintf(%struct._IO_FILE* nocapture noundef, i8* nocapture noundef readonly, ...) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: nounwind
|
|
||||||
define dso_local void @checkTotalLoops() local_unnamed_addr #3 {
|
|
||||||
%1 = alloca [40 x i8], align 1
|
|
||||||
%2 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str.35, i32 0, i32 0))
|
|
||||||
%3 = getelementptr inbounds [40 x i8], [40 x i8]* %1, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %3) #11
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %3, i8* nonnull align 1 dereferenceable(40) getelementptr inbounds ([40 x i8], [40 x i8]* @__const.checkTotalLoops.myfile, i32 0, i32 0), i32 40, i1 false)
|
|
||||||
%4 = call %struct._IO_FILE* @fopen(i8* nonnull %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.7, i32 0, i32 0))
|
|
||||||
%5 = tail call i32 (%struct._IO_FILE*, i8*, ...) @__isoc99_fscanf(%struct._IO_FILE* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.26, i32 0, i32 0), i32* nonnull @totalLoops) #11
|
|
||||||
%6 = tail call i32 @fclose(%struct._IO_FILE* %4)
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %3) #11
|
|
||||||
ret void
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nounwind
|
|
||||||
define dso_local i8* @runOnCGRA() local_unnamed_addr #3 {
|
|
||||||
%1 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str.36, i32 0, i32 0))
|
|
||||||
tail call void asm sideeffect "mov r11,$0", "r"(i32 15) #11, !srcloc !19
|
|
||||||
ret i8* null
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nounwind
|
|
||||||
define dso_local void @accelerateOnCGRA(i32 %0) local_unnamed_addr #3 {
|
|
||||||
%2 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str.37, i32 0, i32 0))
|
|
||||||
%3 = tail call i32 @configureCGRA(i32 %0)
|
|
||||||
%4 = tail call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @.str.30, i32 0, i32 0), i32 %0)
|
|
||||||
%5 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str.36, i32 0, i32 0)) #11
|
|
||||||
tail call void asm sideeffect "mov r11,$0", "r"(i32 15) #11, !srcloc !19
|
|
||||||
ret void
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
define dso_local void @deleteCGRA() local_unnamed_addr #0 {
|
|
||||||
%1 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str.38, i32 0, i32 0))
|
|
||||||
ret void
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nounwind
|
|
||||||
define dso_local void @createCGRA() local_unnamed_addr #3 {
|
|
||||||
%1 = alloca [40 x i8], align 1
|
|
||||||
%2 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str.39, i32 0, i32 0))
|
|
||||||
%3 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str.35, i32 0, i32 0)) #11
|
|
||||||
%4 = getelementptr inbounds [40 x i8], [40 x i8]* %1, i32 0, i32 0
|
|
||||||
call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %4) #11
|
|
||||||
call void @llvm.memcpy.p0i8.p0i8.i32(i8* nonnull align 1 dereferenceable(40) %4, i8* nonnull align 1 dereferenceable(40) getelementptr inbounds ([40 x i8], [40 x i8]* @__const.checkTotalLoops.myfile, i32 0, i32 0), i32 40, i1 false) #11
|
|
||||||
%5 = call %struct._IO_FILE* @fopen(i8* nonnull %4, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.7, i32 0, i32 0)) #11
|
|
||||||
%6 = tail call i32 (%struct._IO_FILE*, i8*, ...) @__isoc99_fscanf(%struct._IO_FILE* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.26, i32 0, i32 0), i32* nonnull @totalLoops) #11
|
|
||||||
%7 = tail call i32 @fclose(%struct._IO_FILE* %5) #11
|
|
||||||
call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %4) #11
|
|
||||||
%8 = load i32, i32* @totalLoops, align 4, !tbaa !13
|
|
||||||
%9 = mul i32 %8, 28
|
|
||||||
%10 = tail call noalias i8* @malloc(i32 %9) #11
|
|
||||||
store i8* %10, i8** bitcast (i32** @initCGRA to i8**), align 4, !tbaa !5
|
|
||||||
%11 = shl i32 %8, 2
|
|
||||||
%12 = tail call noalias i8* @malloc(i32 %11) #11
|
|
||||||
store i8* %12, i8** bitcast (i32** @prologPtr to i8**), align 4, !tbaa !5
|
|
||||||
%13 = tail call noalias i8* @malloc(i32 %11) #11
|
|
||||||
store i8* %13, i8** bitcast (i32** @kernelPtr to i8**), align 4, !tbaa !5
|
|
||||||
%14 = tail call noalias i8* @malloc(i32 %11) #11
|
|
||||||
store i8* %14, i8** bitcast (i32** @epilogPtr to i8**), align 4, !tbaa !5
|
|
||||||
%15 = icmp eq i32 %8, 0
|
|
||||||
br i1 %15, label %.loopexit, label %.preheader.preheader
|
|
||||||
|
|
||||||
.preheader.preheader: ; preds = %0
|
|
||||||
br label %.preheader
|
|
||||||
|
|
||||||
.preheader: ; preds = %.preheader.preheader, %.preheader
|
|
||||||
%16 = phi i32 [ %18, %.preheader ], [ 1, %.preheader.preheader ]
|
|
||||||
%17 = tail call i32 @initializeParameters(i32 %16)
|
|
||||||
%18 = add i32 %16, 1
|
|
||||||
%19 = load i32, i32* @totalLoops, align 4, !tbaa !13
|
|
||||||
%20 = icmp ugt i32 %18, %19
|
|
||||||
br i1 %20, label %.loopexit.loopexit, label %.preheader, !llvm.loop !20
|
|
||||||
|
|
||||||
.loopexit.loopexit: ; preds = %.preheader
|
|
||||||
br label %.loopexit
|
|
||||||
|
|
||||||
.loopexit: ; preds = %.loopexit.loopexit, %0
|
|
||||||
%21 = tail call i32 @puts(i8* nonnull dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str.40, i32 0, i32 0))
|
|
||||||
ret void
|
|
||||||
}
|
|
||||||
|
|
||||||
attributes #0 = { nofree nounwind "disable-tail-calls"="false" "frame-pointer"="none" "min-legal-vector-width"="0" "no-jump-tables"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #1 = { nofree nounwind willreturn "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #2 = { nofree nounwind "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #3 = { nounwind "disable-tail-calls"="false" "frame-pointer"="none" "min-legal-vector-width"="0" "no-jump-tables"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #4 = { nofree nounwind }
|
|
||||||
attributes #5 = { argmemonly nofree nosync nounwind willreturn writeonly }
|
|
||||||
attributes #6 = { argmemonly nofree nosync nounwind willreturn }
|
|
||||||
attributes #7 = { argmemonly nofree nounwind willreturn "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #8 = { argmemonly nofree nounwind readonly willreturn }
|
|
||||||
attributes #9 = { inaccessiblememonly nofree nounwind willreturn "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #10 = { "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #11 = { nounwind }
|
|
||||||
|
|
||||||
!llvm.ident = !{!0, !0}
|
|
||||||
!llvm.module.flags = !{!1, !2, !3, !4}
|
|
||||||
|
|
||||||
!0 = !{!"clang version 13.0.0 (https://github.com/MPSLab-ASU/CCF-20.04/ 05285de7579f417a4d73ad832b8f4cc497f25235)"}
|
|
||||||
!1 = !{i32 7, !"Dwarf Version", i32 4}
|
|
||||||
!2 = !{i32 2, !"Debug Info Version", i32 3}
|
|
||||||
!3 = !{i32 1, !"wchar_size", i32 4}
|
|
||||||
!4 = !{i32 1, !"min_enum_size", i32 4}
|
|
||||||
!5 = !{!6, !6, i64 0}
|
|
||||||
!6 = !{!"any pointer", !7, i64 0}
|
|
||||||
!7 = !{!"omnipotent char", !8, i64 0}
|
|
||||||
!8 = !{!"Simple C/C++ TBAA"}
|
|
||||||
!9 = distinct !{!9, !10, !11, !12}
|
|
||||||
!10 = !{!"llvm.loop.mustprogress"}
|
|
||||||
!11 = !{!"llvm.loop.CGRA.enable"}
|
|
||||||
!12 = !{!"llvm.loop.unroll.disable"}
|
|
||||||
!13 = !{!14, !14, i64 0}
|
|
||||||
!14 = !{!"int", !7, i64 0}
|
|
||||||
!15 = distinct !{!15, !10, !12}
|
|
||||||
!16 = !{!17, !17, i64 0}
|
|
||||||
!17 = !{!"long", !7, i64 0}
|
|
||||||
!18 = distinct !{!18, !10, !12}
|
|
||||||
!19 = !{i32 5341}
|
|
||||||
!20 = distinct !{!20, !10, !12}
|
|
||||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,520 +0,0 @@
|
||||||
[root]
|
|
||||||
type=Root
|
|
||||||
children=system
|
|
||||||
eventq_index=0
|
|
||||||
full_system=false
|
|
||||||
sim_quantum=0
|
|
||||||
time_sync_enable=false
|
|
||||||
time_sync_period=100000000000
|
|
||||||
time_sync_spin_threshold=100000000
|
|
||||||
|
|
||||||
[system]
|
|
||||||
type=System
|
|
||||||
children=clk_domain cpu cpu_clk_domain cpu_voltage_domain dvfs_handler mem_ctrls membus redirect_paths0 redirect_paths1 redirect_paths2 voltage_domain
|
|
||||||
byte_order=little
|
|
||||||
cache_line_size=64
|
|
||||||
eventq_index=0
|
|
||||||
exit_on_work_items=false
|
|
||||||
init_param=0
|
|
||||||
m5ops_base=0
|
|
||||||
mem_mode=atomic
|
|
||||||
mem_ranges=0:536870912
|
|
||||||
memories=system.mem_ctrls.dram
|
|
||||||
mmap_using_noreserve=false
|
|
||||||
multi_thread=false
|
|
||||||
num_work_ids=16
|
|
||||||
readfile=
|
|
||||||
redirect_paths=system.redirect_paths0 system.redirect_paths1 system.redirect_paths2
|
|
||||||
shared_backstore=
|
|
||||||
symbolfile=
|
|
||||||
thermal_components=
|
|
||||||
thermal_model=Null
|
|
||||||
work_begin_ckpt_count=0
|
|
||||||
work_begin_cpu_id_exit=-1
|
|
||||||
work_begin_exit_count=0
|
|
||||||
work_cpus_ckpt_count=0
|
|
||||||
work_end_ckpt_count=0
|
|
||||||
work_end_exit_count=0
|
|
||||||
work_item_id=-1
|
|
||||||
workload=Null
|
|
||||||
system_port=system.membus.cpu_side_ports[0]
|
|
||||||
|
|
||||||
[system.clk_domain]
|
|
||||||
type=SrcClockDomain
|
|
||||||
clock=1000
|
|
||||||
domain_id=-1
|
|
||||||
eventq_index=0
|
|
||||||
init_perf_level=0
|
|
||||||
voltage_domain=system.voltage_domain
|
|
||||||
|
|
||||||
[system.cpu]
|
|
||||||
type=AtomicCGRA
|
|
||||||
children=dtb interrupts isa itb power_state tracer workload
|
|
||||||
CGRA_cols=4
|
|
||||||
CGRA_rows=4
|
|
||||||
branchPred=Null
|
|
||||||
checker=Null
|
|
||||||
clk_domain=system.cpu_clk_domain
|
|
||||||
connection=0
|
|
||||||
cpu_id=0
|
|
||||||
do_checkpoint_insts=true
|
|
||||||
do_statistics_insts=true
|
|
||||||
dtb=system.cpu.dtb
|
|
||||||
eventq_index=0
|
|
||||||
fastmem=false
|
|
||||||
function_trace=false
|
|
||||||
function_trace_start=0
|
|
||||||
interrupts=system.cpu.interrupts
|
|
||||||
isa=system.cpu.isa
|
|
||||||
itb=system.cpu.itb
|
|
||||||
max_insts_all_threads=0
|
|
||||||
max_insts_any_thread=0
|
|
||||||
numThreads=1
|
|
||||||
power_gating_on_idle=false
|
|
||||||
power_model=
|
|
||||||
power_state=system.cpu.power_state
|
|
||||||
progress_interval=0
|
|
||||||
pwr_gating_latency=300
|
|
||||||
rfsize=4
|
|
||||||
simpoint_interval=100000000
|
|
||||||
simpoint_profile=false
|
|
||||||
simpoint_profile_file=simpoint.bb.gz
|
|
||||||
simpoint_start_insts=
|
|
||||||
simulate_data_stalls=false
|
|
||||||
simulate_inst_stalls=false
|
|
||||||
socket_id=0
|
|
||||||
switched_out=false
|
|
||||||
syscallRetryLatency=10000
|
|
||||||
system=system
|
|
||||||
tracer=system.cpu.tracer
|
|
||||||
wait_for_remote_gdb=false
|
|
||||||
width=1
|
|
||||||
workload=system.cpu.workload
|
|
||||||
dcache_port=system.membus.cpu_side_ports[2]
|
|
||||||
icache_port=system.membus.cpu_side_ports[1]
|
|
||||||
|
|
||||||
[system.cpu.dtb]
|
|
||||||
type=ArmTLB
|
|
||||||
children=stage2_mmu walker
|
|
||||||
eventq_index=0
|
|
||||||
is_stage2=false
|
|
||||||
size=64
|
|
||||||
sys=system
|
|
||||||
walker=system.cpu.dtb.walker
|
|
||||||
|
|
||||||
[system.cpu.dtb.stage2_mmu]
|
|
||||||
type=ArmStage2MMU
|
|
||||||
children=stage2_tlb
|
|
||||||
eventq_index=0
|
|
||||||
stage2_tlb=system.cpu.dtb.stage2_mmu.stage2_tlb
|
|
||||||
sys=system
|
|
||||||
tlb=system.cpu.dtb
|
|
||||||
|
|
||||||
[system.cpu.dtb.stage2_mmu.stage2_tlb]
|
|
||||||
type=ArmTLB
|
|
||||||
children=walker
|
|
||||||
eventq_index=0
|
|
||||||
is_stage2=true
|
|
||||||
size=32
|
|
||||||
sys=system
|
|
||||||
walker=system.cpu.dtb.stage2_mmu.stage2_tlb.walker
|
|
||||||
|
|
||||||
[system.cpu.dtb.stage2_mmu.stage2_tlb.walker]
|
|
||||||
type=ArmTableWalker
|
|
||||||
children=power_state
|
|
||||||
clk_domain=system.cpu_clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
is_stage2=true
|
|
||||||
num_squash_per_cycle=2
|
|
||||||
power_model=
|
|
||||||
power_state=system.cpu.dtb.stage2_mmu.stage2_tlb.walker.power_state
|
|
||||||
sys=system
|
|
||||||
|
|
||||||
[system.cpu.dtb.stage2_mmu.stage2_tlb.walker.power_state]
|
|
||||||
type=PowerState
|
|
||||||
clk_gate_bins=20
|
|
||||||
clk_gate_max=1000000000000
|
|
||||||
clk_gate_min=1000
|
|
||||||
default_state=UNDEFINED
|
|
||||||
eventq_index=0
|
|
||||||
leaders=
|
|
||||||
possible_states=
|
|
||||||
|
|
||||||
[system.cpu.dtb.walker]
|
|
||||||
type=ArmTableWalker
|
|
||||||
children=power_state
|
|
||||||
clk_domain=system.cpu_clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
is_stage2=false
|
|
||||||
num_squash_per_cycle=2
|
|
||||||
power_model=
|
|
||||||
power_state=system.cpu.dtb.walker.power_state
|
|
||||||
sys=system
|
|
||||||
port=system.membus.cpu_side_ports[4]
|
|
||||||
|
|
||||||
[system.cpu.dtb.walker.power_state]
|
|
||||||
type=PowerState
|
|
||||||
clk_gate_bins=20
|
|
||||||
clk_gate_max=1000000000000
|
|
||||||
clk_gate_min=1000
|
|
||||||
default_state=UNDEFINED
|
|
||||||
eventq_index=0
|
|
||||||
leaders=
|
|
||||||
possible_states=
|
|
||||||
|
|
||||||
[system.cpu.interrupts]
|
|
||||||
type=ArmInterrupts
|
|
||||||
eventq_index=0
|
|
||||||
|
|
||||||
[system.cpu.isa]
|
|
||||||
type=ArmISA
|
|
||||||
decoderFlavor=Generic
|
|
||||||
eventq_index=0
|
|
||||||
fpsid=1090793632
|
|
||||||
id_aa64afr0_el1=0
|
|
||||||
id_aa64afr1_el1=0
|
|
||||||
id_aa64dfr0_el1=15790086
|
|
||||||
id_aa64dfr1_el1=0
|
|
||||||
id_aa64isar0_el1=0
|
|
||||||
id_aa64isar1_el1=16846864
|
|
||||||
id_aa64mmfr0_el1=15728642
|
|
||||||
id_aa64mmfr1_el1=1052672
|
|
||||||
id_aa64mmfr2_el1=0
|
|
||||||
id_isar0=34607377
|
|
||||||
id_isar1=34677009
|
|
||||||
id_isar2=555950401
|
|
||||||
id_isar3=17899825
|
|
||||||
id_isar4=268501314
|
|
||||||
id_isar5=268435456
|
|
||||||
id_mmfr0=270536963
|
|
||||||
id_mmfr1=0
|
|
||||||
id_mmfr2=19070976
|
|
||||||
id_mmfr3=34611729
|
|
||||||
impdef_nop=false
|
|
||||||
midr=0
|
|
||||||
pmu=Null
|
|
||||||
sve_vl_se=1
|
|
||||||
system=system
|
|
||||||
|
|
||||||
[system.cpu.itb]
|
|
||||||
type=ArmTLB
|
|
||||||
children=stage2_mmu walker
|
|
||||||
eventq_index=0
|
|
||||||
is_stage2=false
|
|
||||||
size=64
|
|
||||||
sys=system
|
|
||||||
walker=system.cpu.itb.walker
|
|
||||||
|
|
||||||
[system.cpu.itb.stage2_mmu]
|
|
||||||
type=ArmStage2MMU
|
|
||||||
children=stage2_tlb
|
|
||||||
eventq_index=0
|
|
||||||
stage2_tlb=system.cpu.itb.stage2_mmu.stage2_tlb
|
|
||||||
sys=system
|
|
||||||
tlb=system.cpu.itb
|
|
||||||
|
|
||||||
[system.cpu.itb.stage2_mmu.stage2_tlb]
|
|
||||||
type=ArmTLB
|
|
||||||
children=walker
|
|
||||||
eventq_index=0
|
|
||||||
is_stage2=true
|
|
||||||
size=32
|
|
||||||
sys=system
|
|
||||||
walker=system.cpu.itb.stage2_mmu.stage2_tlb.walker
|
|
||||||
|
|
||||||
[system.cpu.itb.stage2_mmu.stage2_tlb.walker]
|
|
||||||
type=ArmTableWalker
|
|
||||||
children=power_state
|
|
||||||
clk_domain=system.cpu_clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
is_stage2=true
|
|
||||||
num_squash_per_cycle=2
|
|
||||||
power_model=
|
|
||||||
power_state=system.cpu.itb.stage2_mmu.stage2_tlb.walker.power_state
|
|
||||||
sys=system
|
|
||||||
|
|
||||||
[system.cpu.itb.stage2_mmu.stage2_tlb.walker.power_state]
|
|
||||||
type=PowerState
|
|
||||||
clk_gate_bins=20
|
|
||||||
clk_gate_max=1000000000000
|
|
||||||
clk_gate_min=1000
|
|
||||||
default_state=UNDEFINED
|
|
||||||
eventq_index=0
|
|
||||||
leaders=
|
|
||||||
possible_states=
|
|
||||||
|
|
||||||
[system.cpu.itb.walker]
|
|
||||||
type=ArmTableWalker
|
|
||||||
children=power_state
|
|
||||||
clk_domain=system.cpu_clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
is_stage2=false
|
|
||||||
num_squash_per_cycle=2
|
|
||||||
power_model=
|
|
||||||
power_state=system.cpu.itb.walker.power_state
|
|
||||||
sys=system
|
|
||||||
port=system.membus.cpu_side_ports[3]
|
|
||||||
|
|
||||||
[system.cpu.itb.walker.power_state]
|
|
||||||
type=PowerState
|
|
||||||
clk_gate_bins=20
|
|
||||||
clk_gate_max=1000000000000
|
|
||||||
clk_gate_min=1000
|
|
||||||
default_state=UNDEFINED
|
|
||||||
eventq_index=0
|
|
||||||
leaders=
|
|
||||||
possible_states=
|
|
||||||
|
|
||||||
[system.cpu.power_state]
|
|
||||||
type=PowerState
|
|
||||||
clk_gate_bins=20
|
|
||||||
clk_gate_max=1000000000000
|
|
||||||
clk_gate_min=1000
|
|
||||||
default_state=UNDEFINED
|
|
||||||
eventq_index=0
|
|
||||||
leaders=
|
|
||||||
possible_states=ON CLK_GATED OFF
|
|
||||||
|
|
||||||
[system.cpu.tracer]
|
|
||||||
type=ExeTracer
|
|
||||||
eventq_index=0
|
|
||||||
|
|
||||||
[system.cpu.workload]
|
|
||||||
type=Process
|
|
||||||
cmd=./pow 6
|
|
||||||
cwd=/home/local/ASUAD/quoclon1/publish_ccf_github/benchmarks/pow
|
|
||||||
drivers=
|
|
||||||
egid=100
|
|
||||||
env=
|
|
||||||
errout=cerr
|
|
||||||
euid=100
|
|
||||||
eventq_index=0
|
|
||||||
executable=./pow
|
|
||||||
gid=100
|
|
||||||
input=cin
|
|
||||||
kvmInSE=false
|
|
||||||
maxStackSize=67108864
|
|
||||||
output=cout
|
|
||||||
pgid=100
|
|
||||||
pid=100
|
|
||||||
ppid=0
|
|
||||||
release=5.1.0
|
|
||||||
simpoint=0
|
|
||||||
system=system
|
|
||||||
uid=100
|
|
||||||
useArchPT=false
|
|
||||||
|
|
||||||
[system.cpu_clk_domain]
|
|
||||||
type=SrcClockDomain
|
|
||||||
clock=500
|
|
||||||
domain_id=-1
|
|
||||||
eventq_index=0
|
|
||||||
init_perf_level=0
|
|
||||||
voltage_domain=system.cpu_voltage_domain
|
|
||||||
|
|
||||||
[system.cpu_voltage_domain]
|
|
||||||
type=VoltageDomain
|
|
||||||
eventq_index=0
|
|
||||||
voltage=1.0
|
|
||||||
|
|
||||||
[system.dvfs_handler]
|
|
||||||
type=DVFSHandler
|
|
||||||
domains=
|
|
||||||
enable=false
|
|
||||||
eventq_index=0
|
|
||||||
sys_clk_domain=system.clk_domain
|
|
||||||
transition_latency=100000000
|
|
||||||
|
|
||||||
[system.mem_ctrls]
|
|
||||||
type=MemCtrl
|
|
||||||
children=dram power_state
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
command_window=10000
|
|
||||||
dram=system.mem_ctrls.dram
|
|
||||||
eventq_index=0
|
|
||||||
mem_sched_policy=frfcfs
|
|
||||||
min_writes_per_switch=16
|
|
||||||
nvm=Null
|
|
||||||
power_model=
|
|
||||||
power_state=system.mem_ctrls.power_state
|
|
||||||
qos_policy=Null
|
|
||||||
qos_priorities=1
|
|
||||||
qos_priority_escalation=false
|
|
||||||
qos_q_policy=fifo
|
|
||||||
qos_requestors=
|
|
||||||
qos_syncro_scheduler=false
|
|
||||||
qos_turnaround_policy=Null
|
|
||||||
static_backend_latency=10000
|
|
||||||
static_frontend_latency=10000
|
|
||||||
system=system
|
|
||||||
write_high_thresh_perc=85
|
|
||||||
write_low_thresh_perc=50
|
|
||||||
port=system.membus.mem_side_ports[0]
|
|
||||||
|
|
||||||
[system.mem_ctrls.dram]
|
|
||||||
type=DRAMInterface
|
|
||||||
children=power_state
|
|
||||||
IDD0=0.055
|
|
||||||
IDD02=0.0
|
|
||||||
IDD2N=0.032
|
|
||||||
IDD2N2=0.0
|
|
||||||
IDD2P0=0.0
|
|
||||||
IDD2P02=0.0
|
|
||||||
IDD2P1=0.032
|
|
||||||
IDD2P12=0.0
|
|
||||||
IDD3N=0.038
|
|
||||||
IDD3N2=0.0
|
|
||||||
IDD3P0=0.0
|
|
||||||
IDD3P02=0.0
|
|
||||||
IDD3P1=0.038
|
|
||||||
IDD3P12=0.0
|
|
||||||
IDD4R=0.157
|
|
||||||
IDD4R2=0.0
|
|
||||||
IDD4W=0.125
|
|
||||||
IDD4W2=0.0
|
|
||||||
IDD5=0.23500000000000001
|
|
||||||
IDD52=0.0
|
|
||||||
IDD6=0.02
|
|
||||||
IDD62=0.0
|
|
||||||
VDD=1.5
|
|
||||||
VDD2=0.0
|
|
||||||
activation_limit=4
|
|
||||||
addr_mapping=RoRaBaCoCh
|
|
||||||
bank_groups_per_rank=0
|
|
||||||
banks_per_rank=8
|
|
||||||
beats_per_clock=2
|
|
||||||
burst_length=8
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
conf_table_reported=true
|
|
||||||
data_clock_sync=false
|
|
||||||
device_bus_width=8
|
|
||||||
device_rowbuffer_size=1024
|
|
||||||
device_size=536870912
|
|
||||||
devices_per_rank=8
|
|
||||||
dll=true
|
|
||||||
enable_dram_powerdown=false
|
|
||||||
eventq_index=0
|
|
||||||
image_file=
|
|
||||||
in_addr_map=true
|
|
||||||
kvm_map=true
|
|
||||||
max_accesses_per_row=16
|
|
||||||
null=false
|
|
||||||
page_policy=open_adaptive
|
|
||||||
power_model=
|
|
||||||
power_state=system.mem_ctrls.dram.power_state
|
|
||||||
range=0:536870912
|
|
||||||
ranks_per_channel=2
|
|
||||||
read_buffer_size=32
|
|
||||||
tAAD=1250
|
|
||||||
tBURST=5000
|
|
||||||
tBURST_MAX=5000
|
|
||||||
tBURST_MIN=5000
|
|
||||||
tCCD_L=0
|
|
||||||
tCCD_L_WR=0
|
|
||||||
tCK=1250
|
|
||||||
tCL=13750
|
|
||||||
tCS=2500
|
|
||||||
tPPD=0
|
|
||||||
tRAS=35000
|
|
||||||
tRCD=13750
|
|
||||||
tREFI=7800000
|
|
||||||
tRFC=260000
|
|
||||||
tRP=13750
|
|
||||||
tRRD=6000
|
|
||||||
tRRD_L=0
|
|
||||||
tRTP=7500
|
|
||||||
tRTW=2500
|
|
||||||
tWR=15000
|
|
||||||
tWTR=7500
|
|
||||||
tWTR_L=7500
|
|
||||||
tXAW=30000
|
|
||||||
tXP=6000
|
|
||||||
tXPDLL=0
|
|
||||||
tXS=270000
|
|
||||||
tXSDLL=0
|
|
||||||
two_cycle_activate=false
|
|
||||||
write_buffer_size=64
|
|
||||||
|
|
||||||
[system.mem_ctrls.dram.power_state]
|
|
||||||
type=PowerState
|
|
||||||
clk_gate_bins=20
|
|
||||||
clk_gate_max=1000000000000
|
|
||||||
clk_gate_min=1000
|
|
||||||
default_state=UNDEFINED
|
|
||||||
eventq_index=0
|
|
||||||
leaders=
|
|
||||||
possible_states=
|
|
||||||
|
|
||||||
[system.mem_ctrls.power_state]
|
|
||||||
type=PowerState
|
|
||||||
clk_gate_bins=20
|
|
||||||
clk_gate_max=1000000000000
|
|
||||||
clk_gate_min=1000
|
|
||||||
default_state=UNDEFINED
|
|
||||||
eventq_index=0
|
|
||||||
leaders=
|
|
||||||
possible_states=
|
|
||||||
|
|
||||||
[system.membus]
|
|
||||||
type=CoherentXBar
|
|
||||||
children=power_state snoop_filter
|
|
||||||
clk_domain=system.clk_domain
|
|
||||||
eventq_index=0
|
|
||||||
forward_latency=4
|
|
||||||
frontend_latency=3
|
|
||||||
header_latency=1
|
|
||||||
max_outstanding_snoops=512
|
|
||||||
max_routing_table_size=512
|
|
||||||
point_of_coherency=true
|
|
||||||
point_of_unification=true
|
|
||||||
power_model=
|
|
||||||
power_state=system.membus.power_state
|
|
||||||
response_latency=2
|
|
||||||
snoop_filter=system.membus.snoop_filter
|
|
||||||
snoop_response_latency=4
|
|
||||||
system=system
|
|
||||||
use_default_range=false
|
|
||||||
width=16
|
|
||||||
cpu_side_ports=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
|
|
||||||
mem_side_ports=system.mem_ctrls.port
|
|
||||||
|
|
||||||
[system.membus.power_state]
|
|
||||||
type=PowerState
|
|
||||||
clk_gate_bins=20
|
|
||||||
clk_gate_max=1000000000000
|
|
||||||
clk_gate_min=1000
|
|
||||||
default_state=UNDEFINED
|
|
||||||
eventq_index=0
|
|
||||||
leaders=
|
|
||||||
possible_states=
|
|
||||||
|
|
||||||
[system.membus.snoop_filter]
|
|
||||||
type=SnoopFilter
|
|
||||||
eventq_index=0
|
|
||||||
lookup_latency=1
|
|
||||||
max_capacity=8388608
|
|
||||||
system=system
|
|
||||||
|
|
||||||
[system.redirect_paths0]
|
|
||||||
type=RedirectPath
|
|
||||||
app_path=/proc
|
|
||||||
eventq_index=0
|
|
||||||
host_paths=m5out/fs/proc
|
|
||||||
|
|
||||||
[system.redirect_paths1]
|
|
||||||
type=RedirectPath
|
|
||||||
app_path=/sys
|
|
||||||
eventq_index=0
|
|
||||||
host_paths=m5out/fs/sys
|
|
||||||
|
|
||||||
[system.redirect_paths2]
|
|
||||||
type=RedirectPath
|
|
||||||
app_path=/tmp
|
|
||||||
eventq_index=0
|
|
||||||
host_paths=m5out/fs/tmp
|
|
||||||
|
|
||||||
[system.voltage_domain]
|
|
||||||
type=VoltageDomain
|
|
||||||
eventq_index=0
|
|
||||||
voltage=1.0
|
|
||||||
|
|
||||||
|
|
@ -1,686 +0,0 @@
|
||||||
{
|
|
||||||
"type": "Root",
|
|
||||||
"cxx_class": "Root",
|
|
||||||
"name": null,
|
|
||||||
"path": "root",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"full_system": false,
|
|
||||||
"sim_quantum": 0,
|
|
||||||
"time_sync_enable": false,
|
|
||||||
"time_sync_period": 100000000000,
|
|
||||||
"time_sync_spin_threshold": 100000000,
|
|
||||||
"system": {
|
|
||||||
"type": "System",
|
|
||||||
"cxx_class": "System",
|
|
||||||
"name": "system",
|
|
||||||
"path": "system",
|
|
||||||
"byte_order": "little",
|
|
||||||
"cache_line_size": 64,
|
|
||||||
"eventq_index": 0,
|
|
||||||
"exit_on_work_items": false,
|
|
||||||
"init_param": 0,
|
|
||||||
"m5ops_base": 0,
|
|
||||||
"mem_mode": "atomic",
|
|
||||||
"mem_ranges": [
|
|
||||||
"0:536870912"
|
|
||||||
],
|
|
||||||
"memories": [
|
|
||||||
"system.mem_ctrls.dram"
|
|
||||||
],
|
|
||||||
"mmap_using_noreserve": false,
|
|
||||||
"multi_thread": false,
|
|
||||||
"num_work_ids": 16,
|
|
||||||
"readfile": "",
|
|
||||||
"redirect_paths": [
|
|
||||||
{
|
|
||||||
"type": "RedirectPath",
|
|
||||||
"cxx_class": "RedirectPath",
|
|
||||||
"name": "redirect_paths0",
|
|
||||||
"path": "system.redirect_paths0",
|
|
||||||
"app_path": "/proc",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"host_paths": [
|
|
||||||
"m5out/fs/proc"
|
|
||||||
]
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"type": "RedirectPath",
|
|
||||||
"cxx_class": "RedirectPath",
|
|
||||||
"name": "redirect_paths1",
|
|
||||||
"path": "system.redirect_paths1",
|
|
||||||
"app_path": "/sys",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"host_paths": [
|
|
||||||
"m5out/fs/sys"
|
|
||||||
]
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"type": "RedirectPath",
|
|
||||||
"cxx_class": "RedirectPath",
|
|
||||||
"name": "redirect_paths2",
|
|
||||||
"path": "system.redirect_paths2",
|
|
||||||
"app_path": "/tmp",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"host_paths": [
|
|
||||||
"m5out/fs/tmp"
|
|
||||||
]
|
|
||||||
}
|
|
||||||
],
|
|
||||||
"shared_backstore": "",
|
|
||||||
"symbolfile": "",
|
|
||||||
"thermal_components": [],
|
|
||||||
"thermal_model": null,
|
|
||||||
"work_begin_ckpt_count": 0,
|
|
||||||
"work_begin_cpu_id_exit": -1,
|
|
||||||
"work_begin_exit_count": 0,
|
|
||||||
"work_cpus_ckpt_count": 0,
|
|
||||||
"work_end_ckpt_count": 0,
|
|
||||||
"work_end_exit_count": 0,
|
|
||||||
"work_item_id": -1,
|
|
||||||
"workload": null,
|
|
||||||
"clk_domain": {
|
|
||||||
"type": "SrcClockDomain",
|
|
||||||
"cxx_class": "SrcClockDomain",
|
|
||||||
"name": "clk_domain",
|
|
||||||
"path": "system.clk_domain",
|
|
||||||
"clock": [
|
|
||||||
1000
|
|
||||||
],
|
|
||||||
"domain_id": -1,
|
|
||||||
"eventq_index": 0,
|
|
||||||
"init_perf_level": 0,
|
|
||||||
"voltage_domain": "system.voltage_domain"
|
|
||||||
},
|
|
||||||
"cpu": [
|
|
||||||
{
|
|
||||||
"type": "AtomicCGRA",
|
|
||||||
"cxx_class": "AtomicCGRA",
|
|
||||||
"name": "cpu",
|
|
||||||
"path": "system.cpu",
|
|
||||||
"CGRA_cols": 4,
|
|
||||||
"CGRA_rows": 4,
|
|
||||||
"branchPred": null,
|
|
||||||
"checker": null,
|
|
||||||
"clk_domain": "system.cpu_clk_domain",
|
|
||||||
"connection": 0,
|
|
||||||
"cpu_id": 0,
|
|
||||||
"do_checkpoint_insts": true,
|
|
||||||
"do_statistics_insts": true,
|
|
||||||
"dtb": {
|
|
||||||
"type": "ArmTLB",
|
|
||||||
"cxx_class": "ArmISA::TLB",
|
|
||||||
"name": "dtb",
|
|
||||||
"path": "system.cpu.dtb",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"is_stage2": false,
|
|
||||||
"size": 64,
|
|
||||||
"sys": "system",
|
|
||||||
"walker": {
|
|
||||||
"type": "ArmTableWalker",
|
|
||||||
"cxx_class": "ArmISA::TableWalker",
|
|
||||||
"name": "walker",
|
|
||||||
"path": "system.cpu.dtb.walker",
|
|
||||||
"clk_domain": "system.cpu_clk_domain",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"is_stage2": false,
|
|
||||||
"num_squash_per_cycle": 2,
|
|
||||||
"power_model": [],
|
|
||||||
"power_state": {
|
|
||||||
"type": "PowerState",
|
|
||||||
"cxx_class": "PowerState",
|
|
||||||
"name": "power_state",
|
|
||||||
"path": "system.cpu.dtb.walker.power_state",
|
|
||||||
"clk_gate_bins": 20,
|
|
||||||
"clk_gate_max": 1000000000000,
|
|
||||||
"clk_gate_min": 1000,
|
|
||||||
"default_state": "UNDEFINED",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"leaders": [],
|
|
||||||
"possible_states": []
|
|
||||||
},
|
|
||||||
"sys": "system",
|
|
||||||
"port": {
|
|
||||||
"role": "GEM5 REQUESTOR",
|
|
||||||
"peer": "system.membus.cpu_side_ports[4]",
|
|
||||||
"is_source": "True"
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"stage2_mmu": {
|
|
||||||
"type": "ArmStage2MMU",
|
|
||||||
"cxx_class": "ArmISA::Stage2MMU",
|
|
||||||
"name": "stage2_mmu",
|
|
||||||
"path": "system.cpu.dtb.stage2_mmu",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"stage2_tlb": {
|
|
||||||
"type": "ArmTLB",
|
|
||||||
"cxx_class": "ArmISA::TLB",
|
|
||||||
"name": "stage2_tlb",
|
|
||||||
"path": "system.cpu.dtb.stage2_mmu.stage2_tlb",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"is_stage2": true,
|
|
||||||
"size": 32,
|
|
||||||
"sys": "system",
|
|
||||||
"walker": {
|
|
||||||
"type": "ArmTableWalker",
|
|
||||||
"cxx_class": "ArmISA::TableWalker",
|
|
||||||
"name": "walker",
|
|
||||||
"path": "system.cpu.dtb.stage2_mmu.stage2_tlb.walker",
|
|
||||||
"clk_domain": "system.cpu_clk_domain",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"is_stage2": true,
|
|
||||||
"num_squash_per_cycle": 2,
|
|
||||||
"power_model": [],
|
|
||||||
"power_state": {
|
|
||||||
"type": "PowerState",
|
|
||||||
"cxx_class": "PowerState",
|
|
||||||
"name": "power_state",
|
|
||||||
"path": "system.cpu.dtb.stage2_mmu.stage2_tlb.walker.power_state",
|
|
||||||
"clk_gate_bins": 20,
|
|
||||||
"clk_gate_max": 1000000000000,
|
|
||||||
"clk_gate_min": 1000,
|
|
||||||
"default_state": "UNDEFINED",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"leaders": [],
|
|
||||||
"possible_states": []
|
|
||||||
},
|
|
||||||
"sys": "system"
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"sys": "system",
|
|
||||||
"tlb": "system.cpu.dtb"
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"eventq_index": 0,
|
|
||||||
"fastmem": false,
|
|
||||||
"function_trace": false,
|
|
||||||
"function_trace_start": 0,
|
|
||||||
"interrupts": [
|
|
||||||
{
|
|
||||||
"type": "ArmInterrupts",
|
|
||||||
"cxx_class": "ArmISA::Interrupts",
|
|
||||||
"name": "interrupts",
|
|
||||||
"path": "system.cpu.interrupts",
|
|
||||||
"eventq_index": 0
|
|
||||||
}
|
|
||||||
],
|
|
||||||
"isa": [
|
|
||||||
{
|
|
||||||
"type": "ArmISA",
|
|
||||||
"cxx_class": "ArmISA::ISA",
|
|
||||||
"name": "isa",
|
|
||||||
"path": "system.cpu.isa",
|
|
||||||
"decoderFlavor": "Generic",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"fpsid": 1090793632,
|
|
||||||
"id_aa64afr0_el1": 0,
|
|
||||||
"id_aa64afr1_el1": 0,
|
|
||||||
"id_aa64dfr0_el1": 15790086,
|
|
||||||
"id_aa64dfr1_el1": 0,
|
|
||||||
"id_aa64isar0_el1": 0,
|
|
||||||
"id_aa64isar1_el1": 16846864,
|
|
||||||
"id_aa64mmfr0_el1": 15728642,
|
|
||||||
"id_aa64mmfr1_el1": 1052672,
|
|
||||||
"id_aa64mmfr2_el1": 0,
|
|
||||||
"id_isar0": 34607377,
|
|
||||||
"id_isar1": 34677009,
|
|
||||||
"id_isar2": 555950401,
|
|
||||||
"id_isar3": 17899825,
|
|
||||||
"id_isar4": 268501314,
|
|
||||||
"id_isar5": 268435456,
|
|
||||||
"id_mmfr0": 270536963,
|
|
||||||
"id_mmfr1": 0,
|
|
||||||
"id_mmfr2": 19070976,
|
|
||||||
"id_mmfr3": 34611729,
|
|
||||||
"impdef_nop": false,
|
|
||||||
"midr": 0,
|
|
||||||
"pmu": null,
|
|
||||||
"sve_vl_se": 1,
|
|
||||||
"system": "system"
|
|
||||||
}
|
|
||||||
],
|
|
||||||
"itb": {
|
|
||||||
"type": "ArmTLB",
|
|
||||||
"cxx_class": "ArmISA::TLB",
|
|
||||||
"name": "itb",
|
|
||||||
"path": "system.cpu.itb",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"is_stage2": false,
|
|
||||||
"size": 64,
|
|
||||||
"sys": "system",
|
|
||||||
"walker": {
|
|
||||||
"type": "ArmTableWalker",
|
|
||||||
"cxx_class": "ArmISA::TableWalker",
|
|
||||||
"name": "walker",
|
|
||||||
"path": "system.cpu.itb.walker",
|
|
||||||
"clk_domain": "system.cpu_clk_domain",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"is_stage2": false,
|
|
||||||
"num_squash_per_cycle": 2,
|
|
||||||
"power_model": [],
|
|
||||||
"power_state": {
|
|
||||||
"type": "PowerState",
|
|
||||||
"cxx_class": "PowerState",
|
|
||||||
"name": "power_state",
|
|
||||||
"path": "system.cpu.itb.walker.power_state",
|
|
||||||
"clk_gate_bins": 20,
|
|
||||||
"clk_gate_max": 1000000000000,
|
|
||||||
"clk_gate_min": 1000,
|
|
||||||
"default_state": "UNDEFINED",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"leaders": [],
|
|
||||||
"possible_states": []
|
|
||||||
},
|
|
||||||
"sys": "system",
|
|
||||||
"port": {
|
|
||||||
"role": "GEM5 REQUESTOR",
|
|
||||||
"peer": "system.membus.cpu_side_ports[3]",
|
|
||||||
"is_source": "True"
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"stage2_mmu": {
|
|
||||||
"type": "ArmStage2MMU",
|
|
||||||
"cxx_class": "ArmISA::Stage2MMU",
|
|
||||||
"name": "stage2_mmu",
|
|
||||||
"path": "system.cpu.itb.stage2_mmu",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"stage2_tlb": {
|
|
||||||
"type": "ArmTLB",
|
|
||||||
"cxx_class": "ArmISA::TLB",
|
|
||||||
"name": "stage2_tlb",
|
|
||||||
"path": "system.cpu.itb.stage2_mmu.stage2_tlb",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"is_stage2": true,
|
|
||||||
"size": 32,
|
|
||||||
"sys": "system",
|
|
||||||
"walker": {
|
|
||||||
"type": "ArmTableWalker",
|
|
||||||
"cxx_class": "ArmISA::TableWalker",
|
|
||||||
"name": "walker",
|
|
||||||
"path": "system.cpu.itb.stage2_mmu.stage2_tlb.walker",
|
|
||||||
"clk_domain": "system.cpu_clk_domain",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"is_stage2": true,
|
|
||||||
"num_squash_per_cycle": 2,
|
|
||||||
"power_model": [],
|
|
||||||
"power_state": {
|
|
||||||
"type": "PowerState",
|
|
||||||
"cxx_class": "PowerState",
|
|
||||||
"name": "power_state",
|
|
||||||
"path": "system.cpu.itb.stage2_mmu.stage2_tlb.walker.power_state",
|
|
||||||
"clk_gate_bins": 20,
|
|
||||||
"clk_gate_max": 1000000000000,
|
|
||||||
"clk_gate_min": 1000,
|
|
||||||
"default_state": "UNDEFINED",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"leaders": [],
|
|
||||||
"possible_states": []
|
|
||||||
},
|
|
||||||
"sys": "system"
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"sys": "system",
|
|
||||||
"tlb": "system.cpu.itb"
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"max_insts_all_threads": 0,
|
|
||||||
"max_insts_any_thread": 0,
|
|
||||||
"numThreads": 1,
|
|
||||||
"power_gating_on_idle": false,
|
|
||||||
"power_model": [],
|
|
||||||
"power_state": {
|
|
||||||
"type": "PowerState",
|
|
||||||
"cxx_class": "PowerState",
|
|
||||||
"name": "power_state",
|
|
||||||
"path": "system.cpu.power_state",
|
|
||||||
"clk_gate_bins": 20,
|
|
||||||
"clk_gate_max": 1000000000000,
|
|
||||||
"clk_gate_min": 1000,
|
|
||||||
"default_state": "UNDEFINED",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"leaders": [],
|
|
||||||
"possible_states": [
|
|
||||||
"ON",
|
|
||||||
"CLK_GATED",
|
|
||||||
"OFF"
|
|
||||||
]
|
|
||||||
},
|
|
||||||
"progress_interval": 0,
|
|
||||||
"pwr_gating_latency": 300,
|
|
||||||
"rfsize": 4,
|
|
||||||
"simpoint_interval": 100000000,
|
|
||||||
"simpoint_profile": false,
|
|
||||||
"simpoint_profile_file": "simpoint.bb.gz",
|
|
||||||
"simpoint_start_insts": [],
|
|
||||||
"simulate_data_stalls": false,
|
|
||||||
"simulate_inst_stalls": false,
|
|
||||||
"socket_id": 0,
|
|
||||||
"switched_out": false,
|
|
||||||
"syscallRetryLatency": 10000,
|
|
||||||
"system": "system",
|
|
||||||
"tracer": {
|
|
||||||
"type": "ExeTracer",
|
|
||||||
"cxx_class": "Trace::ExeTracer",
|
|
||||||
"name": "tracer",
|
|
||||||
"path": "system.cpu.tracer",
|
|
||||||
"eventq_index": 0
|
|
||||||
},
|
|
||||||
"wait_for_remote_gdb": false,
|
|
||||||
"width": 1,
|
|
||||||
"workload": [
|
|
||||||
{
|
|
||||||
"type": "Process",
|
|
||||||
"cxx_class": "Process",
|
|
||||||
"name": "workload",
|
|
||||||
"path": "system.cpu.workload",
|
|
||||||
"cmd": [
|
|
||||||
"./pow",
|
|
||||||
"6"
|
|
||||||
],
|
|
||||||
"cwd": "/home/local/ASUAD/quoclon1/publish_ccf_github/benchmarks/pow",
|
|
||||||
"drivers": [],
|
|
||||||
"egid": 100,
|
|
||||||
"env": [],
|
|
||||||
"errout": "cerr",
|
|
||||||
"euid": 100,
|
|
||||||
"eventq_index": 0,
|
|
||||||
"executable": "./pow",
|
|
||||||
"gid": 100,
|
|
||||||
"input": "cin",
|
|
||||||
"kvmInSE": false,
|
|
||||||
"maxStackSize": 67108864,
|
|
||||||
"output": "cout",
|
|
||||||
"pgid": 100,
|
|
||||||
"pid": 100,
|
|
||||||
"ppid": 0,
|
|
||||||
"release": "5.1.0",
|
|
||||||
"simpoint": 0,
|
|
||||||
"system": "system",
|
|
||||||
"uid": 100,
|
|
||||||
"useArchPT": false
|
|
||||||
}
|
|
||||||
],
|
|
||||||
"dcache_port": {
|
|
||||||
"role": "GEM5 REQUESTOR",
|
|
||||||
"peer": "system.membus.cpu_side_ports[2]",
|
|
||||||
"is_source": "True"
|
|
||||||
},
|
|
||||||
"icache_port": {
|
|
||||||
"role": "GEM5 REQUESTOR",
|
|
||||||
"peer": "system.membus.cpu_side_ports[1]",
|
|
||||||
"is_source": "True"
|
|
||||||
}
|
|
||||||
}
|
|
||||||
],
|
|
||||||
"cpu_clk_domain": {
|
|
||||||
"type": "SrcClockDomain",
|
|
||||||
"cxx_class": "SrcClockDomain",
|
|
||||||
"name": "cpu_clk_domain",
|
|
||||||
"path": "system.cpu_clk_domain",
|
|
||||||
"clock": [
|
|
||||||
500
|
|
||||||
],
|
|
||||||
"domain_id": -1,
|
|
||||||
"eventq_index": 0,
|
|
||||||
"init_perf_level": 0,
|
|
||||||
"voltage_domain": "system.cpu_voltage_domain"
|
|
||||||
},
|
|
||||||
"cpu_voltage_domain": {
|
|
||||||
"type": "VoltageDomain",
|
|
||||||
"cxx_class": "VoltageDomain",
|
|
||||||
"name": "cpu_voltage_domain",
|
|
||||||
"path": "system.cpu_voltage_domain",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"voltage": [
|
|
||||||
1.0
|
|
||||||
]
|
|
||||||
},
|
|
||||||
"dvfs_handler": {
|
|
||||||
"type": "DVFSHandler",
|
|
||||||
"cxx_class": "DVFSHandler",
|
|
||||||
"name": "dvfs_handler",
|
|
||||||
"path": "system.dvfs_handler",
|
|
||||||
"domains": [],
|
|
||||||
"enable": false,
|
|
||||||
"eventq_index": 0,
|
|
||||||
"sys_clk_domain": "system.clk_domain",
|
|
||||||
"transition_latency": 100000000
|
|
||||||
},
|
|
||||||
"mem_ctrls": [
|
|
||||||
{
|
|
||||||
"type": "MemCtrl",
|
|
||||||
"cxx_class": "MemCtrl",
|
|
||||||
"name": "mem_ctrls",
|
|
||||||
"path": "system.mem_ctrls",
|
|
||||||
"clk_domain": "system.clk_domain",
|
|
||||||
"command_window": 10000,
|
|
||||||
"dram": {
|
|
||||||
"type": "DRAMInterface",
|
|
||||||
"cxx_class": "DRAMInterface",
|
|
||||||
"name": "dram",
|
|
||||||
"path": "system.mem_ctrls.dram",
|
|
||||||
"IDD0": 0.055,
|
|
||||||
"IDD02": 0.0,
|
|
||||||
"IDD2N": 0.032,
|
|
||||||
"IDD2N2": 0.0,
|
|
||||||
"IDD2P0": 0.0,
|
|
||||||
"IDD2P02": 0.0,
|
|
||||||
"IDD2P1": 0.032,
|
|
||||||
"IDD2P12": 0.0,
|
|
||||||
"IDD3N": 0.038,
|
|
||||||
"IDD3N2": 0.0,
|
|
||||||
"IDD3P0": 0.0,
|
|
||||||
"IDD3P02": 0.0,
|
|
||||||
"IDD3P1": 0.038,
|
|
||||||
"IDD3P12": 0.0,
|
|
||||||
"IDD4R": 0.157,
|
|
||||||
"IDD4R2": 0.0,
|
|
||||||
"IDD4W": 0.125,
|
|
||||||
"IDD4W2": 0.0,
|
|
||||||
"IDD5": 0.23500000000000001,
|
|
||||||
"IDD52": 0.0,
|
|
||||||
"IDD6": 0.02,
|
|
||||||
"IDD62": 0.0,
|
|
||||||
"VDD": 1.5,
|
|
||||||
"VDD2": 0.0,
|
|
||||||
"activation_limit": 4,
|
|
||||||
"addr_mapping": "RoRaBaCoCh",
|
|
||||||
"bank_groups_per_rank": 0,
|
|
||||||
"banks_per_rank": 8,
|
|
||||||
"beats_per_clock": 2,
|
|
||||||
"burst_length": 8,
|
|
||||||
"clk_domain": "system.clk_domain",
|
|
||||||
"conf_table_reported": true,
|
|
||||||
"data_clock_sync": false,
|
|
||||||
"device_bus_width": 8,
|
|
||||||
"device_rowbuffer_size": 1024,
|
|
||||||
"device_size": 536870912,
|
|
||||||
"devices_per_rank": 8,
|
|
||||||
"dll": true,
|
|
||||||
"enable_dram_powerdown": false,
|
|
||||||
"eventq_index": 0,
|
|
||||||
"image_file": "",
|
|
||||||
"in_addr_map": true,
|
|
||||||
"kvm_map": true,
|
|
||||||
"max_accesses_per_row": 16,
|
|
||||||
"null": false,
|
|
||||||
"page_policy": "open_adaptive",
|
|
||||||
"power_model": [],
|
|
||||||
"power_state": {
|
|
||||||
"type": "PowerState",
|
|
||||||
"cxx_class": "PowerState",
|
|
||||||
"name": "power_state",
|
|
||||||
"path": "system.mem_ctrls.dram.power_state",
|
|
||||||
"clk_gate_bins": 20,
|
|
||||||
"clk_gate_max": 1000000000000,
|
|
||||||
"clk_gate_min": 1000,
|
|
||||||
"default_state": "UNDEFINED",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"leaders": [],
|
|
||||||
"possible_states": []
|
|
||||||
},
|
|
||||||
"range": "0:536870912",
|
|
||||||
"ranks_per_channel": 2,
|
|
||||||
"read_buffer_size": 32,
|
|
||||||
"tAAD": 1250,
|
|
||||||
"tBURST": 5000,
|
|
||||||
"tBURST_MAX": 5000,
|
|
||||||
"tBURST_MIN": 5000,
|
|
||||||
"tCCD_L": 0,
|
|
||||||
"tCCD_L_WR": 0,
|
|
||||||
"tCK": 1250,
|
|
||||||
"tCL": 13750,
|
|
||||||
"tCS": 2500,
|
|
||||||
"tPPD": 0,
|
|
||||||
"tRAS": 35000,
|
|
||||||
"tRCD": 13750,
|
|
||||||
"tREFI": 7800000,
|
|
||||||
"tRFC": 260000,
|
|
||||||
"tRP": 13750,
|
|
||||||
"tRRD": 6000,
|
|
||||||
"tRRD_L": 0,
|
|
||||||
"tRTP": 7500,
|
|
||||||
"tRTW": 2500,
|
|
||||||
"tWR": 15000,
|
|
||||||
"tWTR": 7500,
|
|
||||||
"tWTR_L": 7500,
|
|
||||||
"tXAW": 30000,
|
|
||||||
"tXP": 6000,
|
|
||||||
"tXPDLL": 0,
|
|
||||||
"tXS": 270000,
|
|
||||||
"tXSDLL": 0,
|
|
||||||
"two_cycle_activate": false,
|
|
||||||
"write_buffer_size": 64
|
|
||||||
},
|
|
||||||
"eventq_index": 0,
|
|
||||||
"mem_sched_policy": "frfcfs",
|
|
||||||
"min_writes_per_switch": 16,
|
|
||||||
"nvm": null,
|
|
||||||
"power_model": [],
|
|
||||||
"power_state": {
|
|
||||||
"type": "PowerState",
|
|
||||||
"cxx_class": "PowerState",
|
|
||||||
"name": "power_state",
|
|
||||||
"path": "system.mem_ctrls.power_state",
|
|
||||||
"clk_gate_bins": 20,
|
|
||||||
"clk_gate_max": 1000000000000,
|
|
||||||
"clk_gate_min": 1000,
|
|
||||||
"default_state": "UNDEFINED",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"leaders": [],
|
|
||||||
"possible_states": []
|
|
||||||
},
|
|
||||||
"qos_policy": null,
|
|
||||||
"qos_priorities": 1,
|
|
||||||
"qos_priority_escalation": false,
|
|
||||||
"qos_q_policy": "fifo",
|
|
||||||
"qos_requestors": [
|
|
||||||
"",
|
|
||||||
"",
|
|
||||||
"",
|
|
||||||
"",
|
|
||||||
"",
|
|
||||||
"",
|
|
||||||
"",
|
|
||||||
"",
|
|
||||||
"",
|
|
||||||
"",
|
|
||||||
"",
|
|
||||||
"",
|
|
||||||
"",
|
|
||||||
"",
|
|
||||||
"",
|
|
||||||
""
|
|
||||||
],
|
|
||||||
"qos_syncro_scheduler": false,
|
|
||||||
"qos_turnaround_policy": null,
|
|
||||||
"static_backend_latency": 10000,
|
|
||||||
"static_frontend_latency": 10000,
|
|
||||||
"system": "system",
|
|
||||||
"write_high_thresh_perc": 85,
|
|
||||||
"write_low_thresh_perc": 50,
|
|
||||||
"port": {
|
|
||||||
"role": "GEM5 RESPONDER",
|
|
||||||
"peer": "system.membus.mem_side_ports[0]",
|
|
||||||
"is_source": "False"
|
|
||||||
}
|
|
||||||
}
|
|
||||||
],
|
|
||||||
"membus": {
|
|
||||||
"type": "CoherentXBar",
|
|
||||||
"cxx_class": "CoherentXBar",
|
|
||||||
"name": "membus",
|
|
||||||
"path": "system.membus",
|
|
||||||
"clk_domain": "system.clk_domain",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"forward_latency": 4,
|
|
||||||
"frontend_latency": 3,
|
|
||||||
"header_latency": 1,
|
|
||||||
"max_outstanding_snoops": 512,
|
|
||||||
"max_routing_table_size": 512,
|
|
||||||
"point_of_coherency": true,
|
|
||||||
"point_of_unification": true,
|
|
||||||
"power_model": [],
|
|
||||||
"power_state": {
|
|
||||||
"type": "PowerState",
|
|
||||||
"cxx_class": "PowerState",
|
|
||||||
"name": "power_state",
|
|
||||||
"path": "system.membus.power_state",
|
|
||||||
"clk_gate_bins": 20,
|
|
||||||
"clk_gate_max": 1000000000000,
|
|
||||||
"clk_gate_min": 1000,
|
|
||||||
"default_state": "UNDEFINED",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"leaders": [],
|
|
||||||
"possible_states": []
|
|
||||||
},
|
|
||||||
"response_latency": 2,
|
|
||||||
"snoop_filter": {
|
|
||||||
"type": "SnoopFilter",
|
|
||||||
"cxx_class": "SnoopFilter",
|
|
||||||
"name": "snoop_filter",
|
|
||||||
"path": "system.membus.snoop_filter",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"lookup_latency": 1,
|
|
||||||
"max_capacity": 8388608,
|
|
||||||
"system": "system"
|
|
||||||
},
|
|
||||||
"snoop_response_latency": 4,
|
|
||||||
"system": "system",
|
|
||||||
"use_default_range": false,
|
|
||||||
"width": 16,
|
|
||||||
"cpu_side_ports": {
|
|
||||||
"role": "GEM5 RESPONDER",
|
|
||||||
"peer": [
|
|
||||||
"system.system_port",
|
|
||||||
"system.cpu.icache_port",
|
|
||||||
"system.cpu.dcache_port",
|
|
||||||
"system.cpu.itb.walker.port",
|
|
||||||
"system.cpu.dtb.walker.port"
|
|
||||||
],
|
|
||||||
"is_source": "False"
|
|
||||||
},
|
|
||||||
"mem_side_ports": {
|
|
||||||
"role": "GEM5 REQUESTOR",
|
|
||||||
"peer": [
|
|
||||||
"system.mem_ctrls.port"
|
|
||||||
],
|
|
||||||
"is_source": "True"
|
|
||||||
}
|
|
||||||
},
|
|
||||||
"voltage_domain": {
|
|
||||||
"type": "VoltageDomain",
|
|
||||||
"cxx_class": "VoltageDomain",
|
|
||||||
"name": "voltage_domain",
|
|
||||||
"path": "system.voltage_domain",
|
|
||||||
"eventq_index": 0,
|
|
||||||
"voltage": [
|
|
||||||
1.0
|
|
||||||
]
|
|
||||||
},
|
|
||||||
"system_port": {
|
|
||||||
"role": "GEM5 REQUESTOR",
|
|
||||||
"peer": "system.membus.cpu_side_ports[0]",
|
|
||||||
"is_source": "True"
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
@ -1,19 +0,0 @@
|
||||||
processor : 0
|
|
||||||
vendor_id : Generic
|
|
||||||
cpu family : 0
|
|
||||||
model : 0
|
|
||||||
model name : Generic
|
|
||||||
stepping : 0
|
|
||||||
cpu MHz : 2000.000
|
|
||||||
cache size: : 2048.0K
|
|
||||||
physical id : 0
|
|
||||||
siblings : 1
|
|
||||||
core id : 0
|
|
||||||
cpu cores : 1
|
|
||||||
fpu : yes
|
|
||||||
fpu exception : yes
|
|
||||||
cpuid level : 1
|
|
||||||
wp : yes
|
|
||||||
flags : fpu
|
|
||||||
cache alignment : 64
|
|
||||||
|
|
||||||
|
|
@ -1,2 +0,0 @@
|
||||||
cpu 0 0 0 0 0 0 0
|
|
||||||
cpu0 0 0 0 0 0 0 0
|
|
||||||
|
|
@ -1 +0,0 @@
|
||||||
0-0
|
|
||||||
|
|
@ -1 +0,0 @@
|
||||||
0-0
|
|
||||||
|
|
@ -1,512 +0,0 @@
|
||||||
|
|
||||||
---------- Begin Simulation Statistics ----------
|
|
||||||
final_tick 40238500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
|
||||||
host_inst_rate 253216 # Simulator instruction rate (inst/s)
|
|
||||||
host_mem_usage 649276 # Number of bytes of host memory used
|
|
||||||
host_op_rate 305944 # Simulator op (including micro ops) rate (op/s)
|
|
||||||
host_seconds 0.26 # Real time elapsed on the host
|
|
||||||
host_tick_rate 153182512 # Simulator tick rate (ticks/s)
|
|
||||||
sim_freq 1000000000000 # Frequency of simulated ticks
|
|
||||||
sim_insts 66485 # Number of instructions simulated
|
|
||||||
sim_ops 80361 # Number of ops (including micro ops) simulated
|
|
||||||
sim_seconds 0.000040 # Number of seconds simulated
|
|
||||||
sim_ticks 40238500 # Number of ticks simulated
|
|
||||||
system.cpu.Branches 15435 # Number of branches fetched
|
|
||||||
system.cpu.committedInsts 66485 # Number of instructions committed
|
|
||||||
system.cpu.committedOps 80361 # Number of ops (including micro ops) committed
|
|
||||||
system.cpu.idle_fraction 0.000000 # Percentage of idle cycles
|
|
||||||
system.cpu.not_idle_fraction 1.000000 # Percentage of non-idle cycles
|
|
||||||
system.cpu.numCycles 80478 # number of cpu cycles simulated
|
|
||||||
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
|
|
||||||
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
|
|
||||||
system.cpu.num_busy_cycles 80477.998000 # Number of busy cycles
|
|
||||||
system.cpu.num_cc_register_reads 241335 # number of times the CC registers were read
|
|
||||||
system.cpu.num_cc_register_writes 34861 # number of times the CC registers were written
|
|
||||||
system.cpu.num_conditional_control_insts 10904 # number of instructions that are conditional controls
|
|
||||||
system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
|
|
||||||
system.cpu.num_fp_insts 0 # number of float instructions
|
|
||||||
system.cpu.num_fp_register_reads 0 # number of times the floating registers were read
|
|
||||||
system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
|
|
||||||
system.cpu.num_func_calls 3485 # number of times a function call or return occured
|
|
||||||
system.cpu.num_idle_cycles 0.002000 # Number of idle cycles
|
|
||||||
system.cpu.num_int_alu_accesses 68835 # Number of integer alu accesses
|
|
||||||
system.cpu.num_int_insts 68835 # number of integer instructions
|
|
||||||
system.cpu.num_int_register_reads 112967 # number of times the integer registers were read
|
|
||||||
system.cpu.num_int_register_writes 45210 # number of times the integer registers were written
|
|
||||||
system.cpu.num_load_insts 15769 # Number of load instructions
|
|
||||||
system.cpu.num_mem_refs 28396 # number of memory refs
|
|
||||||
system.cpu.num_store_insts 12627 # Number of store instructions
|
|
||||||
system.cpu.num_vec_alu_accesses 0 # Number of vector alu accesses
|
|
||||||
system.cpu.num_vec_insts 0 # number of vector instructions
|
|
||||||
system.cpu.num_vec_register_reads 132 # number of times the vector registers were read
|
|
||||||
system.cpu.num_vec_register_writes 68 # number of times the vector registers were written
|
|
||||||
system.cpu.op_class::No_OpClass 0 0.00% 0.00% # Class of executed instruction
|
|
||||||
system.cpu.op_class::IntAlu 51942 64.57% 64.57% # Class of executed instruction
|
|
||||||
system.cpu.op_class::IntMult 106 0.13% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::IntDiv 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::FloatAdd 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::FloatCmp 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::FloatCvt 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::FloatMult 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::FloatMultAcc 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::FloatDiv 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::FloatMisc 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::FloatSqrt 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdAdd 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdAddAcc 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdAlu 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdCmp 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdCvt 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdMisc 1 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdMult 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdMultAcc 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdShift 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdShiftAcc 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdDiv 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdSqrt 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdFloatAdd 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdFloatAlu 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdFloatCmp 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdFloatCvt 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdFloatDiv 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdFloatMisc 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdFloatMult 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdFloatMultAcc 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdFloatSqrt 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdReduceAdd 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdReduceAlu 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdReduceCmp 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdFloatReduceAdd 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdFloatReduceCmp 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdAes 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdAesMix 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdSha1Hash 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdSha1Hash2 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdSha256Hash 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdSha256Hash2 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdShaSigma2 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdShaSigma3 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::SimdPredAlu 0 0.00% 64.70% # Class of executed instruction
|
|
||||||
system.cpu.op_class::MemRead 15769 19.60% 84.30% # Class of executed instruction
|
|
||||||
system.cpu.op_class::MemWrite 12627 15.70% 100.00% # Class of executed instruction
|
|
||||||
system.cpu.op_class::FloatMemRead 0 0.00% 100.00% # Class of executed instruction
|
|
||||||
system.cpu.op_class::FloatMemWrite 0 0.00% 100.00% # Class of executed instruction
|
|
||||||
system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
|
|
||||||
system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
|
|
||||||
system.cpu.op_class::total 80445 # Class of executed instruction
|
|
||||||
system.cpu.workload.numSyscalls 75 # Number of system calls
|
|
||||||
system.membus.snoop_filter.hit_multi_requests 0 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
|
|
||||||
system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
|
|
||||||
system.membus.snoop_filter.hit_single_requests 0 # Number of requests hitting in the snoop filter with a single holder of the requested data.
|
|
||||||
system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
|
|
||||||
system.membus.snoop_filter.tot_requests 0 # Total number of requests made to the snoop filter.
|
|
||||||
system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter.
|
|
||||||
system.clk_domain.clock 1000 # Clock period in ticks
|
|
||||||
system.cpu.dtb.instHits 0 # ITB inst hits
|
|
||||||
system.cpu.dtb.instMisses 0 # ITB inst misses
|
|
||||||
system.cpu.dtb.readHits 0 # DTB read hits
|
|
||||||
system.cpu.dtb.readMisses 0 # DTB read misses
|
|
||||||
system.cpu.dtb.writeHits 0 # DTB write hits
|
|
||||||
system.cpu.dtb.writeMisses 0 # DTB write misses
|
|
||||||
system.cpu.dtb.inserts 0 # Number of times an entry is inserted into the TLB
|
|
||||||
system.cpu.dtb.flushTlb 0 # Number of times complete TLB was flushed
|
|
||||||
system.cpu.dtb.flushTlbMva 0 # Number of times TLB was flushed by MVA
|
|
||||||
system.cpu.dtb.flushTlbMvaAsid 0 # Number of times TLB was flushed by MVA & ASID
|
|
||||||
system.cpu.dtb.flushTlbAsid 0 # Number of times TLB was flushed by ASID
|
|
||||||
system.cpu.dtb.flushedEntries 0 # Number of entries that have been flushed from TLB
|
|
||||||
system.cpu.dtb.alignFaults 0 # Number of TLB faults due to alignment restrictions
|
|
||||||
system.cpu.dtb.prefetchFaults 0 # Number of TLB faults due to prefetch
|
|
||||||
system.cpu.dtb.domainFaults 0 # Number of TLB faults due to domain restrictions
|
|
||||||
system.cpu.dtb.permsFaults 0 # Number of TLB faults due to permissions restrictions
|
|
||||||
system.cpu.dtb.readAccesses 0 # DTB read accesses
|
|
||||||
system.cpu.dtb.writeAccesses 0 # DTB write accesses
|
|
||||||
system.cpu.dtb.instAccesses 0 # ITB inst accesses
|
|
||||||
system.cpu.dtb.hits 0 # Total TLB (inst and data) hits
|
|
||||||
system.cpu.dtb.misses 0 # Total TLB (inst and data) misses
|
|
||||||
system.cpu.dtb.accesses 0 # Total TLB (inst and data) accesses
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.instHits 0 # ITB inst hits
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.instMisses 0 # ITB inst misses
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.readHits 0 # DTB read hits
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.readMisses 0 # DTB read misses
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.writeHits 0 # DTB write hits
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.writeMisses 0 # DTB write misses
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.inserts 0 # Number of times an entry is inserted into the TLB
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.flushTlb 0 # Number of times complete TLB was flushed
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.flushTlbMva 0 # Number of times TLB was flushed by MVA
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.flushTlbMvaAsid 0 # Number of times TLB was flushed by MVA & ASID
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.flushTlbAsid 0 # Number of times TLB was flushed by ASID
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.flushedEntries 0 # Number of entries that have been flushed from TLB
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.alignFaults 0 # Number of TLB faults due to alignment restrictions
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.prefetchFaults 0 # Number of TLB faults due to prefetch
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.domainFaults 0 # Number of TLB faults due to domain restrictions
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.permsFaults 0 # Number of TLB faults due to permissions restrictions
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.readAccesses 0 # DTB read accesses
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.writeAccesses 0 # DTB write accesses
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.instAccesses 0 # ITB inst accesses
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.hits 0 # Total TLB (inst and data) hits
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.misses 0 # Total TLB (inst and data) misses
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.accesses 0 # Total TLB (inst and data) accesses
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.walker.requestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.walker.requestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.walker.requestOrigin_Requested::total 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.walker.requestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.walker.requestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.walker.requestOrigin_Completed::total 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.walker.requestOrigin::total 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.dtb.stage2_mmu.stage2_tlb.walker.power_state.pwrStateResidencyTicks::UNDEFINED 40238500 # Cumulative time (in ticks) in various power states
|
|
||||||
system.cpu.dtb.walker.walks 0 # Table walker walks requested
|
|
||||||
system.cpu.dtb.walker.requestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.dtb.walker.requestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.dtb.walker.requestOrigin_Requested::total 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.dtb.walker.requestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.dtb.walker.requestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.dtb.walker.requestOrigin_Completed::total 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.dtb.walker.requestOrigin::total 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.dtb.walker.power_state.pwrStateResidencyTicks::UNDEFINED 40238500 # Cumulative time (in ticks) in various power states
|
|
||||||
system.cpu.itb.instHits 0 # ITB inst hits
|
|
||||||
system.cpu.itb.instMisses 0 # ITB inst misses
|
|
||||||
system.cpu.itb.readHits 0 # DTB read hits
|
|
||||||
system.cpu.itb.readMisses 0 # DTB read misses
|
|
||||||
system.cpu.itb.writeHits 0 # DTB write hits
|
|
||||||
system.cpu.itb.writeMisses 0 # DTB write misses
|
|
||||||
system.cpu.itb.inserts 0 # Number of times an entry is inserted into the TLB
|
|
||||||
system.cpu.itb.flushTlb 0 # Number of times complete TLB was flushed
|
|
||||||
system.cpu.itb.flushTlbMva 0 # Number of times TLB was flushed by MVA
|
|
||||||
system.cpu.itb.flushTlbMvaAsid 0 # Number of times TLB was flushed by MVA & ASID
|
|
||||||
system.cpu.itb.flushTlbAsid 0 # Number of times TLB was flushed by ASID
|
|
||||||
system.cpu.itb.flushedEntries 0 # Number of entries that have been flushed from TLB
|
|
||||||
system.cpu.itb.alignFaults 0 # Number of TLB faults due to alignment restrictions
|
|
||||||
system.cpu.itb.prefetchFaults 0 # Number of TLB faults due to prefetch
|
|
||||||
system.cpu.itb.domainFaults 0 # Number of TLB faults due to domain restrictions
|
|
||||||
system.cpu.itb.permsFaults 0 # Number of TLB faults due to permissions restrictions
|
|
||||||
system.cpu.itb.readAccesses 0 # DTB read accesses
|
|
||||||
system.cpu.itb.writeAccesses 0 # DTB write accesses
|
|
||||||
system.cpu.itb.instAccesses 0 # ITB inst accesses
|
|
||||||
system.cpu.itb.hits 0 # Total TLB (inst and data) hits
|
|
||||||
system.cpu.itb.misses 0 # Total TLB (inst and data) misses
|
|
||||||
system.cpu.itb.accesses 0 # Total TLB (inst and data) accesses
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.instHits 0 # ITB inst hits
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.instMisses 0 # ITB inst misses
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.readHits 0 # DTB read hits
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.readMisses 0 # DTB read misses
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.writeHits 0 # DTB write hits
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.writeMisses 0 # DTB write misses
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.inserts 0 # Number of times an entry is inserted into the TLB
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.flushTlb 0 # Number of times complete TLB was flushed
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.flushTlbMva 0 # Number of times TLB was flushed by MVA
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.flushTlbMvaAsid 0 # Number of times TLB was flushed by MVA & ASID
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.flushTlbAsid 0 # Number of times TLB was flushed by ASID
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.flushedEntries 0 # Number of entries that have been flushed from TLB
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.alignFaults 0 # Number of TLB faults due to alignment restrictions
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.prefetchFaults 0 # Number of TLB faults due to prefetch
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.domainFaults 0 # Number of TLB faults due to domain restrictions
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.permsFaults 0 # Number of TLB faults due to permissions restrictions
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.readAccesses 0 # DTB read accesses
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.writeAccesses 0 # DTB write accesses
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.instAccesses 0 # ITB inst accesses
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.hits 0 # Total TLB (inst and data) hits
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.misses 0 # Total TLB (inst and data) misses
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.accesses 0 # Total TLB (inst and data) accesses
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.walker.requestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.walker.requestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.walker.requestOrigin_Requested::total 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.walker.requestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.walker.requestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.walker.requestOrigin_Completed::total 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.walker.requestOrigin::total 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.itb.stage2_mmu.stage2_tlb.walker.power_state.pwrStateResidencyTicks::UNDEFINED 40238500 # Cumulative time (in ticks) in various power states
|
|
||||||
system.cpu.itb.walker.walks 0 # Table walker walks requested
|
|
||||||
system.cpu.itb.walker.requestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.itb.walker.requestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.itb.walker.requestOrigin_Requested::total 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.itb.walker.requestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.itb.walker.requestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.itb.walker.requestOrigin_Completed::total 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.itb.walker.requestOrigin::total 0 # Table walker requests started/completed, data/inst
|
|
||||||
system.cpu.itb.walker.power_state.pwrStateResidencyTicks::UNDEFINED 40238500 # Cumulative time (in ticks) in various power states
|
|
||||||
system.cpu.power_state.pwrStateResidencyTicks::ON 40238500 # Cumulative time (in ticks) in various power states
|
|
||||||
system.cpu.thread_0.numInsts 0 # Number of Instructions committed
|
|
||||||
system.cpu.thread_0.numOps 0 # Number of Ops committed
|
|
||||||
system.cpu.thread_0.numMemRefs 0 # Number of Memory References
|
|
||||||
system.cpu_clk_domain.clock 500 # Clock period in ticks
|
|
||||||
system.cpu_voltage_domain.voltage 1 # Voltage in Volts
|
|
||||||
system.mem_ctrls.priorityMinLatency 0.000000000000 # per QoS priority minimum request to response latency (s)
|
|
||||||
system.mem_ctrls.priorityMaxLatency 0.000000000000 # per QoS priority maximum request to response latency (s)
|
|
||||||
system.mem_ctrls.numReadWriteTurnArounds 0 # Number of turnarounds from READ to WRITE
|
|
||||||
system.mem_ctrls.numWriteReadTurnArounds 0 # Number of turnarounds from WRITE to READ
|
|
||||||
system.mem_ctrls.numStayReadState 0 # Number of times bus staying in READ state
|
|
||||||
system.mem_ctrls.numStayWriteState 0 # Number of times bus staying in WRITE state
|
|
||||||
system.mem_ctrls.readReqs 0 # Number of read requests accepted
|
|
||||||
system.mem_ctrls.writeReqs 0 # Number of write requests accepted
|
|
||||||
system.mem_ctrls.readBursts 0 # Number of controller read bursts, including those serviced by the write queue
|
|
||||||
system.mem_ctrls.writeBursts 0 # Number of controller write bursts, including those merged in the write queue
|
|
||||||
system.mem_ctrls.servicedByWrQ 0 # Number of controller read bursts serviced by the write queue
|
|
||||||
system.mem_ctrls.mergedWrBursts 0 # Number of controller write bursts merged with an existing one
|
|
||||||
system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write
|
|
||||||
system.mem_ctrls.avgRdQLen 0.00 # Average read queue length when enqueuing
|
|
||||||
system.mem_ctrls.avgWrQLen 0.00 # Average write queue length when enqueuing
|
|
||||||
system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry
|
|
||||||
system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry
|
|
||||||
system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2)
|
|
||||||
system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2)
|
|
||||||
system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2)
|
|
||||||
system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2)
|
|
||||||
system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2)
|
|
||||||
system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2)
|
|
||||||
system.mem_ctrls.readPktSize::6 0 # Read request sizes (log2)
|
|
||||||
system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2)
|
|
||||||
system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2)
|
|
||||||
system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2)
|
|
||||||
system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2)
|
|
||||||
system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2)
|
|
||||||
system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2)
|
|
||||||
system.mem_ctrls.writePktSize::6 0 # Write request sizes (log2)
|
|
||||||
system.mem_ctrls.rdQLenPdf::0 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::9 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::10 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::11 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::12 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::13 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::14 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::15 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::16 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::17 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::18 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::19 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::20 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::21 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::22 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::23 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::24 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::25 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::26 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::27 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::28 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::29 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::30 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::0 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::1 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::2 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::3 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::4 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::5 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::6 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::7 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::8 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::9 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::10 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::11 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::12 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::13 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::14 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::15 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::16 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::17 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::18 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::19 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::20 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::21 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::22 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::23 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::24 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::25 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::26 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::27 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::28 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::29 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::30 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::31 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::32 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::42 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::43 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::44 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::50 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::51 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::52 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::53 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::54 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::55 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see
|
|
||||||
system.mem_ctrls.bytesReadWrQ 0 # Total number of bytes read from write queue
|
|
||||||
system.mem_ctrls.bytesReadSys 0 # Total read bytes from the system interface side
|
|
||||||
system.mem_ctrls.bytesWrittenSys 0 # Total written bytes from the system interface side
|
|
||||||
system.mem_ctrls.avgRdBWSys 0.00 # Average system read bandwidth in MiByte/s
|
|
||||||
system.mem_ctrls.avgWrBWSys 0.00 # Average system write bandwidth in MiByte/s
|
|
||||||
system.mem_ctrls.totGap 0 # Total gap between requests
|
|
||||||
system.mem_ctrls.avgGap nan # Average gap between requests
|
|
||||||
system.mem_ctrls.dram.bytes_read::.cpu.inst 270500 # Number of bytes read from this memory
|
|
||||||
system.mem_ctrls.dram.bytes_read::.cpu.data 71059 # Number of bytes read from this memory
|
|
||||||
system.mem_ctrls.dram.bytes_read::total 341559 # Number of bytes read from this memory
|
|
||||||
system.mem_ctrls.dram.bytes_inst_read::.cpu.inst 270500 # Number of instructions bytes read from this memory
|
|
||||||
system.mem_ctrls.dram.bytes_inst_read::total 270500 # Number of instructions bytes read from this memory
|
|
||||||
system.mem_ctrls.dram.bytes_written::.cpu.data 47718 # Number of bytes written to this memory
|
|
||||||
system.mem_ctrls.dram.bytes_written::total 47718 # Number of bytes written to this memory
|
|
||||||
system.mem_ctrls.dram.num_reads::.cpu.inst 66602 # Number of read requests responded to by this memory
|
|
||||||
system.mem_ctrls.dram.num_reads::.cpu.data 15588 # Number of read requests responded to by this memory
|
|
||||||
system.mem_ctrls.dram.num_reads::total 82190 # Number of read requests responded to by this memory
|
|
||||||
system.mem_ctrls.dram.num_writes::.cpu.data 12255 # Number of write requests responded to by this memory
|
|
||||||
system.mem_ctrls.dram.num_writes::total 12255 # Number of write requests responded to by this memory
|
|
||||||
system.mem_ctrls.dram.bw_read::.cpu.inst 6722417585 # Total read bandwidth from this memory (bytes/s)
|
|
||||||
system.mem_ctrls.dram.bw_read::.cpu.data 1765945550 # Total read bandwidth from this memory (bytes/s)
|
|
||||||
system.mem_ctrls.dram.bw_read::total 8488363135 # Total read bandwidth from this memory (bytes/s)
|
|
||||||
system.mem_ctrls.dram.bw_inst_read::.cpu.inst 6722417585 # Instruction read bandwidth from this memory (bytes/s)
|
|
||||||
system.mem_ctrls.dram.bw_inst_read::total 6722417585 # Instruction read bandwidth from this memory (bytes/s)
|
|
||||||
system.mem_ctrls.dram.bw_write::.cpu.data 1185879195 # Write bandwidth from this memory (bytes/s)
|
|
||||||
system.mem_ctrls.dram.bw_write::total 1185879195 # Write bandwidth from this memory (bytes/s)
|
|
||||||
system.mem_ctrls.dram.bw_total::.cpu.inst 6722417585 # Total bandwidth to/from this memory (bytes/s)
|
|
||||||
system.mem_ctrls.dram.bw_total::.cpu.data 2951824745 # Total bandwidth to/from this memory (bytes/s)
|
|
||||||
system.mem_ctrls.dram.bw_total::total 9674242330 # Total bandwidth to/from this memory (bytes/s)
|
|
||||||
system.mem_ctrls.dram.readBursts 0 # Number of DRAM read bursts
|
|
||||||
system.mem_ctrls.dram.writeBursts 0 # Number of DRAM write bursts
|
|
||||||
system.mem_ctrls.dram.perBankRdBursts::0 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankRdBursts::1 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankRdBursts::2 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankRdBursts::3 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankRdBursts::4 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankRdBursts::5 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankRdBursts::6 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankRdBursts::7 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankRdBursts::8 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankRdBursts::9 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankRdBursts::10 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankRdBursts::11 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankRdBursts::12 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankRdBursts::13 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankRdBursts::14 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankRdBursts::15 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankWrBursts::0 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankWrBursts::1 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankWrBursts::2 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankWrBursts::3 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankWrBursts::4 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankWrBursts::5 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankWrBursts::6 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankWrBursts::7 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankWrBursts::8 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankWrBursts::9 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankWrBursts::10 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankWrBursts::11 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankWrBursts::12 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankWrBursts::13 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankWrBursts::14 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.perBankWrBursts::15 0 # Per bank write bursts
|
|
||||||
system.mem_ctrls.dram.totQLat 0 # Total ticks spent queuing
|
|
||||||
system.mem_ctrls.dram.totBusLat 0 # Total ticks spent in databus transfers
|
|
||||||
system.mem_ctrls.dram.totMemAccLat 0 # Total ticks spent from burst creation until serviced by the DRAM
|
|
||||||
system.mem_ctrls.dram.avgQLat nan # Average queueing delay per DRAM burst
|
|
||||||
system.mem_ctrls.dram.avgBusLat nan # Average bus latency per DRAM burst
|
|
||||||
system.mem_ctrls.dram.avgMemAccLat nan # Average memory access latency per DRAM burst
|
|
||||||
system.mem_ctrls.dram.readRowHits 0 # Number of row buffer hits during reads
|
|
||||||
system.mem_ctrls.dram.writeRowHits 0 # Number of row buffer hits during writes
|
|
||||||
system.mem_ctrls.dram.readRowHitRate nan # Row buffer hit rate for reads
|
|
||||||
system.mem_ctrls.dram.writeRowHitRate nan # Row buffer hit rate for writes
|
|
||||||
system.mem_ctrls.dram.bytesRead 0 # Total number of bytes read from DRAM
|
|
||||||
system.mem_ctrls.dram.bytesWritten 0 # Total number of bytes written to DRAM
|
|
||||||
system.mem_ctrls.dram.avgRdBW 0 # Average DRAM read bandwidth in MiBytes/s
|
|
||||||
system.mem_ctrls.dram.avgWrBW 0 # Average DRAM write bandwidth in MiBytes/s
|
|
||||||
system.mem_ctrls.dram.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
|
|
||||||
system.mem_ctrls.dram.busUtil 0.00 # Data bus utilization in percentage
|
|
||||||
system.mem_ctrls.dram.busUtilRead 0.00 # Data bus utilization in percentage for reads
|
|
||||||
system.mem_ctrls.dram.busUtilWrite 0.00 # Data bus utilization in percentage for writes
|
|
||||||
system.mem_ctrls.dram.pageHitRate nan # Row buffer hit rate, read and write combined
|
|
||||||
system.mem_ctrls.dram.power_state.pwrStateResidencyTicks::UNDEFINED 40238500 # Cumulative time (in ticks) in various power states
|
|
||||||
system.mem_ctrls.dram.rank0.actEnergy 0 # Energy for activate commands per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank0.preEnergy 0 # Energy for precharge commands per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank0.readEnergy 0 # Energy for read commands per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank0.writeEnergy 0 # Energy for write commands per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank0.refreshEnergy 0 # Energy for refresh commands per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank0.actBackEnergy 0 # Energy for active background per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank0.preBackEnergy 15451680 # Energy for precharge background per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank0.actPowerDownEnergy 0 # Energy for active power-down per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank0.prePowerDownEnergy 0 # Energy for precharge power-down per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank0.selfRefreshEnergy 0 # Energy for self refresh per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank0.totalEnergy 15451680 # Total energy per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank0.averagePower 384.002386 # Core power per rank (mW)
|
|
||||||
system.mem_ctrls.dram.rank0.totalIdleTime 0 # Total Idle time Per DRAM Rank
|
|
||||||
system.mem_ctrls.dram.rank0.pwrStateTime::IDLE 40238500 # Time in different power states
|
|
||||||
system.mem_ctrls.dram.rank0.pwrStateTime::REF 0 # Time in different power states
|
|
||||||
system.mem_ctrls.dram.rank0.pwrStateTime::SREF 0 # Time in different power states
|
|
||||||
system.mem_ctrls.dram.rank0.pwrStateTime::PRE_PDN 0 # Time in different power states
|
|
||||||
system.mem_ctrls.dram.rank0.pwrStateTime::ACT 0 # Time in different power states
|
|
||||||
system.mem_ctrls.dram.rank0.pwrStateTime::ACT_PDN 0 # Time in different power states
|
|
||||||
system.mem_ctrls.dram.rank1.actEnergy 0 # Energy for activate commands per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank1.preEnergy 0 # Energy for precharge commands per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank1.readEnergy 0 # Energy for read commands per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank1.writeEnergy 0 # Energy for write commands per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank1.refreshEnergy 0 # Energy for refresh commands per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank1.actBackEnergy 0 # Energy for active background per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank1.preBackEnergy 15451680 # Energy for precharge background per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank1.actPowerDownEnergy 0 # Energy for active power-down per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank1.prePowerDownEnergy 0 # Energy for precharge power-down per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank1.selfRefreshEnergy 0 # Energy for self refresh per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank1.totalEnergy 15451680 # Total energy per rank (pJ)
|
|
||||||
system.mem_ctrls.dram.rank1.averagePower 384.002386 # Core power per rank (mW)
|
|
||||||
system.mem_ctrls.dram.rank1.totalIdleTime 0 # Total Idle time Per DRAM Rank
|
|
||||||
system.mem_ctrls.dram.rank1.pwrStateTime::IDLE 40238500 # Time in different power states
|
|
||||||
system.mem_ctrls.dram.rank1.pwrStateTime::REF 0 # Time in different power states
|
|
||||||
system.mem_ctrls.dram.rank1.pwrStateTime::SREF 0 # Time in different power states
|
|
||||||
system.mem_ctrls.dram.rank1.pwrStateTime::PRE_PDN 0 # Time in different power states
|
|
||||||
system.mem_ctrls.dram.rank1.pwrStateTime::ACT 0 # Time in different power states
|
|
||||||
system.mem_ctrls.dram.rank1.pwrStateTime::ACT_PDN 0 # Time in different power states
|
|
||||||
system.mem_ctrls.power_state.pwrStateResidencyTicks::UNDEFINED 40238500 # Cumulative time (in ticks) in various power states
|
|
||||||
system.membus.trans_dist::ReadReq 82010 # Transaction distribution
|
|
||||||
system.membus.trans_dist::ReadResp 82190 # Transaction distribution
|
|
||||||
system.membus.trans_dist::WriteReq 12075 # Transaction distribution
|
|
||||||
system.membus.trans_dist::WriteResp 12075 # Transaction distribution
|
|
||||||
system.membus.trans_dist::LoadLockedReq 180 # Transaction distribution
|
|
||||||
system.membus.trans_dist::StoreCondReq 180 # Transaction distribution
|
|
||||||
system.membus.trans_dist::StoreCondResp 180 # Transaction distribution
|
|
||||||
system.membus.pkt_count_system.cpu.icache_port::system.mem_ctrls.port 133204 # Packet count per connected requestor and responder (bytes)
|
|
||||||
system.membus.pkt_count_system.cpu.dcache_port::system.mem_ctrls.port 55686 # Packet count per connected requestor and responder (bytes)
|
|
||||||
system.membus.pkt_count::total 188890 # Packet count per connected requestor and responder (bytes)
|
|
||||||
system.membus.pkt_size_system.cpu.icache_port::system.mem_ctrls.port 270500 # Cumulative packet size per connected requestor and responder (bytes)
|
|
||||||
system.membus.pkt_size_system.cpu.dcache_port::system.mem_ctrls.port 118777 # Cumulative packet size per connected requestor and responder (bytes)
|
|
||||||
system.membus.pkt_size::total 389277 # Cumulative packet size per connected requestor and responder (bytes)
|
|
||||||
system.membus.snoops 0 # Total snoops (count)
|
|
||||||
system.membus.snoopTraffic 0 # Total snoop traffic (bytes)
|
|
||||||
system.membus.snoop_fanout::samples 94445 # Request fanout histogram
|
|
||||||
system.membus.snoop_fanout::mean 0 # Request fanout histogram
|
|
||||||
system.membus.snoop_fanout::stdev 0 # Request fanout histogram
|
|
||||||
system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
|
|
||||||
system.membus.snoop_fanout::0 94445 100.00% 100.00% # Request fanout histogram
|
|
||||||
system.membus.snoop_fanout::1 0 0.00% 100.00% # Request fanout histogram
|
|
||||||
system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
|
|
||||||
system.membus.snoop_fanout::min_value 0 # Request fanout histogram
|
|
||||||
system.membus.snoop_fanout::max_value 0 # Request fanout histogram
|
|
||||||
system.membus.snoop_fanout::total 94445 # Request fanout histogram
|
|
||||||
system.membus.power_state.pwrStateResidencyTicks::UNDEFINED 40238500 # Cumulative time (in ticks) in various power states
|
|
||||||
system.voltage_domain.voltage 1 # Voltage in Volts
|
|
||||||
|
|
||||||
---------- End Simulation Statistics ----------
|
|
||||||
4412
benchmarks/pow/out
4412
benchmarks/pow/out
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,14 @@
|
||||||
|
Global frequency set at 1000000000000 ticks per second
|
||||||
|
gem5 Simulator System. http://gem5.org
|
||||||
|
gem5 is copyrighted software; use the --copyright option for details.
|
||||||
|
|
||||||
|
gem5 version 20.1.0.4
|
||||||
|
gem5 compiled Sep 23 2021 18:19:24
|
||||||
|
gem5 started Sep 23 2021 18:31:43
|
||||||
|
gem5 executing on en4181851l, pid 3135753
|
||||||
|
command line: ../../gem5/build/ARM/gem5.opt -d CPU/ ../../gem5/configs/example/se.py -c pow_cpu -o 5
|
||||||
|
|
||||||
|
**** REAL SIMULATION ****
|
||||||
|
Base = 2 - Pow = 5
|
||||||
|
***** 2^5 = 32 *****
|
||||||
|
Exiting @ tick 6420000 because exiting with last active thread context
|
||||||
Binary file not shown.
|
|
@ -1,20 +1,49 @@
|
||||||
#include <stdio.h>
|
#include <stdio.h>
|
||||||
#include <stdlib.h>
|
#include <stdlib.h>
|
||||||
|
|
||||||
|
<<<<<<< HEAD
|
||||||
|
=======
|
||||||
|
/*int sum(int count){
|
||||||
|
int ret=0;
|
||||||
|
//int vec[10] = {1,2,3,4,5,6,7,8,9,10};
|
||||||
|
|
||||||
|
#pragma CGRA
|
||||||
|
for(int i=0; i<count; i++)
|
||||||
|
ret += i;
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}*/
|
||||||
|
|
||||||
|
>>>>>>> 5f2c8bc0fcd0b4b59a263992775796f8c7c9371d
|
||||||
/*int power(int base, int pow){
|
/*int power(int base, int pow){
|
||||||
if(pow == 0) return 1;
|
if(pow == 0) return 1;
|
||||||
printf("Base = %d - Pow = %d\n", base, pow);
|
printf("Base = %d - Pow = %d\n", base, pow);
|
||||||
int ret = base;
|
int ret = base;
|
||||||
#pragma CGRA
|
#pragma CGRA
|
||||||
for(int i = 1; i < pow - 1; i++)
|
for(int i = 1; i < pow; i++)
|
||||||
ret *= base;
|
ret *= base;
|
||||||
|
<<<<<<< HEAD
|
||||||
return ret;
|
return ret;
|
||||||
}*/
|
}*/
|
||||||
|
=======
|
||||||
|
return ret;
|
||||||
|
}*/
|
||||||
|
>>>>>>> 5f2c8bc0fcd0b4b59a263992775796f8c7c9371d
|
||||||
|
|
||||||
int main(int argc, char *argv[])
|
int main(int argc, char *argv[])
|
||||||
{
|
{
|
||||||
int pow = atoi(argv[1]);
|
int pow = atoi(argv[1]);
|
||||||
|
<<<<<<< HEAD
|
||||||
int ret = 1;
|
int ret = 1;
|
||||||
|
=======
|
||||||
|
int base = 2;
|
||||||
|
if(pow == 0) return 1;
|
||||||
|
printf("Base = %d - Pow = %d\n", base, pow);
|
||||||
|
int ret = base;
|
||||||
|
#pragma CGRA
|
||||||
|
for(int i = 1; i < pow; i++)
|
||||||
|
ret *= base;
|
||||||
|
>>>>>>> 5f2c8bc0fcd0b4b59a263992775796f8c7c9371d
|
||||||
//int ret = sum(pow);
|
//int ret = sum(pow);
|
||||||
|
|
||||||
#pragma CGRA
|
#pragma CGRA
|
||||||
|
|
|
||||||
|
|
@ -1,112 +0,0 @@
|
||||||
; ModuleID = 'pow.c'
|
|
||||||
source_filename = "pow.c"
|
|
||||||
target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
|
|
||||||
target triple = "armv7-none-linux-eabi"
|
|
||||||
|
|
||||||
@.str = private unnamed_addr constant [24 x i8] c"***** %d^%d = %d *****\0A\00", align 1
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
define dso_local i32 @main(i32 %0, i8** nocapture readonly %1) local_unnamed_addr #0 !dbg !14 {
|
|
||||||
call void @llvm.dbg.value(metadata i32 %0, metadata !18, metadata !DIExpression()), !dbg !24
|
|
||||||
call void @llvm.dbg.value(metadata i8** %1, metadata !19, metadata !DIExpression()), !dbg !24
|
|
||||||
%3 = getelementptr inbounds i8*, i8** %1, i32 1, !dbg !25
|
|
||||||
%4 = load i8*, i8** %3, align 4, !dbg !25, !tbaa !26
|
|
||||||
call void @llvm.dbg.value(metadata i8* %4, metadata !30, metadata !DIExpression()) #4, !dbg !38
|
|
||||||
%5 = tail call i32 @strtol(i8* nocapture nonnull %4, i8** null, i32 10) #4, !dbg !40
|
|
||||||
call void @llvm.dbg.value(metadata i32 %5, metadata !20, metadata !DIExpression()), !dbg !24
|
|
||||||
call void @llvm.dbg.value(metadata i32 1, metadata !21, metadata !DIExpression()), !dbg !24
|
|
||||||
call void @llvm.dbg.value(metadata i32 1, metadata !22, metadata !DIExpression()), !dbg !41
|
|
||||||
%6 = icmp sgt i32 %5, 1, !dbg !42
|
|
||||||
br i1 %6, label %10, label %7, !dbg !44
|
|
||||||
|
|
||||||
7: ; preds = %10, %2
|
|
||||||
%8 = phi i32 [ 1, %2 ], [ %13, %10 ], !dbg !24
|
|
||||||
%9 = tail call i32 (i8*, ...) @printf(i8* nonnull dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i32 0, i32 0), i32 2, i32 %5, i32 %8), !dbg !45
|
|
||||||
ret i32 0, !dbg !46
|
|
||||||
|
|
||||||
10: ; preds = %2, %10
|
|
||||||
%11 = phi i32 [ %14, %10 ], [ 1, %2 ]
|
|
||||||
%12 = phi i32 [ %13, %10 ], [ 1, %2 ]
|
|
||||||
call void @llvm.dbg.value(metadata i32 %11, metadata !22, metadata !DIExpression()), !dbg !41
|
|
||||||
call void @llvm.dbg.value(metadata i32 %12, metadata !21, metadata !DIExpression()), !dbg !24
|
|
||||||
%13 = shl nsw i32 %12, 1, !dbg !47
|
|
||||||
call void @llvm.dbg.value(metadata i32 %13, metadata !21, metadata !DIExpression()), !dbg !24
|
|
||||||
%14 = add nuw nsw i32 %11, 1, !dbg !48
|
|
||||||
call void @llvm.dbg.value(metadata i32 %14, metadata !22, metadata !DIExpression()), !dbg !41
|
|
||||||
%15 = icmp eq i32 %14, %5, !dbg !42
|
|
||||||
br i1 %15, label %7, label %10, !dbg !44, !llvm.loop !49
|
|
||||||
}
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind
|
|
||||||
declare dso_local noundef i32 @printf(i8* nocapture noundef readonly, ...) local_unnamed_addr #1
|
|
||||||
|
|
||||||
; Function Attrs: nofree nounwind willreturn
|
|
||||||
declare dso_local i32 @strtol(i8* readonly, i8** nocapture, i32) local_unnamed_addr #2
|
|
||||||
|
|
||||||
; Function Attrs: nofree nosync nounwind readnone speculatable willreturn
|
|
||||||
declare void @llvm.dbg.value(metadata, metadata, metadata) #3
|
|
||||||
|
|
||||||
attributes #0 = { nofree nounwind "disable-tail-calls"="false" "frame-pointer"="none" "min-legal-vector-width"="0" "no-jump-tables"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #1 = { nofree nounwind "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #2 = { nofree nounwind willreturn "disable-tail-calls"="false" "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+neon,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp,-thumb-mode" }
|
|
||||||
attributes #3 = { nofree nosync nounwind readnone speculatable willreturn }
|
|
||||||
attributes #4 = { nounwind }
|
|
||||||
|
|
||||||
!llvm.dbg.cu = !{!0}
|
|
||||||
!llvm.module.flags = !{!9, !10, !11, !12}
|
|
||||||
!llvm.ident = !{!13}
|
|
||||||
|
|
||||||
!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 13.0.0 (https://github.com/MPSLab-ASU/CCF-20.04/ 05285de7579f417a4d73ad832b8f4cc497f25235)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !3, splitDebugInlining: false, nameTableKind: None)
|
|
||||||
!1 = !DIFile(filename: "pow.c", directory: "/home/local/ASUAD/quoclon1/publish_ccf_github/benchmarks/pow")
|
|
||||||
!2 = !{}
|
|
||||||
!3 = !{!4, !5, !8}
|
|
||||||
!4 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
|
|
||||||
!5 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !6, size: 32)
|
|
||||||
!6 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !7, size: 32)
|
|
||||||
!7 = !DIBasicType(name: "char", size: 8, encoding: DW_ATE_unsigned_char)
|
|
||||||
!8 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: null, size: 32)
|
|
||||||
!9 = !{i32 7, !"Dwarf Version", i32 4}
|
|
||||||
!10 = !{i32 2, !"Debug Info Version", i32 3}
|
|
||||||
!11 = !{i32 1, !"wchar_size", i32 4}
|
|
||||||
!12 = !{i32 1, !"min_enum_size", i32 4}
|
|
||||||
!13 = !{!"clang version 13.0.0 (https://github.com/MPSLab-ASU/CCF-20.04/ 05285de7579f417a4d73ad832b8f4cc497f25235)"}
|
|
||||||
!14 = distinct !DISubprogram(name: "main", scope: !1, file: !1, line: 14, type: !15, scopeLine: 15, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !17)
|
|
||||||
!15 = !DISubroutineType(types: !16)
|
|
||||||
!16 = !{!4, !4, !5}
|
|
||||||
!17 = !{!18, !19, !20, !21, !22}
|
|
||||||
!18 = !DILocalVariable(name: "argc", arg: 1, scope: !14, file: !1, line: 14, type: !4)
|
|
||||||
!19 = !DILocalVariable(name: "argv", arg: 2, scope: !14, file: !1, line: 14, type: !5)
|
|
||||||
!20 = !DILocalVariable(name: "pow", scope: !14, file: !1, line: 16, type: !4)
|
|
||||||
!21 = !DILocalVariable(name: "ret", scope: !14, file: !1, line: 17, type: !4)
|
|
||||||
!22 = !DILocalVariable(name: "i", scope: !23, file: !1, line: 21, type: !4)
|
|
||||||
!23 = distinct !DILexicalBlock(scope: !14, file: !1, line: 21, column: 3)
|
|
||||||
!24 = !DILocation(line: 0, scope: !14)
|
|
||||||
!25 = !DILocation(line: 16, column: 18, scope: !14)
|
|
||||||
!26 = !{!27, !27, i64 0}
|
|
||||||
!27 = !{!"any pointer", !28, i64 0}
|
|
||||||
!28 = !{!"omnipotent char", !29, i64 0}
|
|
||||||
!29 = !{!"Simple C/C++ TBAA"}
|
|
||||||
!30 = !DILocalVariable(name: "__nptr", arg: 1, scope: !31, file: !32, line: 361, type: !35)
|
|
||||||
!31 = distinct !DISubprogram(name: "atoi", scope: !32, file: !32, line: 361, type: !33, scopeLine: 362, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !37)
|
|
||||||
!32 = !DIFile(filename: "/usr/arm-linux-gnueabi/include/stdlib.h", directory: "")
|
|
||||||
!33 = !DISubroutineType(types: !34)
|
|
||||||
!34 = !{!4, !35}
|
|
||||||
!35 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !36, size: 32)
|
|
||||||
!36 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !7)
|
|
||||||
!37 = !{!30}
|
|
||||||
!38 = !DILocation(line: 0, scope: !31, inlinedAt: !39)
|
|
||||||
!39 = distinct !DILocation(line: 16, column: 13, scope: !14)
|
|
||||||
!40 = !DILocation(line: 363, column: 16, scope: !31, inlinedAt: !39)
|
|
||||||
!41 = !DILocation(line: 0, scope: !23)
|
|
||||||
!42 = !DILocation(line: 21, column: 20, scope: !43)
|
|
||||||
!43 = distinct !DILexicalBlock(scope: !23, file: !1, line: 21, column: 3)
|
|
||||||
!44 = !DILocation(line: 21, column: 3, scope: !23)
|
|
||||||
!45 = !DILocation(line: 24, column: 3, scope: !14)
|
|
||||||
!46 = !DILocation(line: 26, column: 1, scope: !14)
|
|
||||||
!47 = !DILocation(line: 22, column: 9, scope: !43)
|
|
||||||
!48 = !DILocation(line: 21, column: 28, scope: !43)
|
|
||||||
!49 = distinct !{!49, !44, !50, !51, !52, !53}
|
|
||||||
!50 = !DILocation(line: 22, column: 12, scope: !23)
|
|
||||||
!51 = !{!"llvm.loop.mustprogress"}
|
|
||||||
!52 = !{!"llvm.loop.CGRA.enable"}
|
|
||||||
!53 = !{!"llvm.loop.unroll.disable"}
|
|
||||||
|
|
@ -1,14 +0,0 @@
|
||||||
X,4
|
|
||||||
Y,4
|
|
||||||
R,4
|
|
||||||
IC,0
|
|
||||||
Cclock,0.7
|
|
||||||
CPUclock,2
|
|
||||||
Mem,8GB
|
|
||||||
MODE,0
|
|
||||||
ALGO,FalconCrimson
|
|
||||||
MSA,10
|
|
||||||
MAPII,10
|
|
||||||
MAX_MAP,1000
|
|
||||||
MAX_II,50
|
|
||||||
LAMBDA,0.02
|
|
||||||
|
|
|
@ -1,14 +0,0 @@
|
||||||
4
|
|
||||||
4
|
|
||||||
4
|
|
||||||
0
|
|
||||||
0.7
|
|
||||||
2
|
|
||||||
8GB
|
|
||||||
0
|
|
||||||
FalconCrimson
|
|
||||||
10
|
|
||||||
10
|
|
||||||
1000
|
|
||||||
50
|
|
||||||
0.02
|
|
||||||
|
|
@ -1,5 +0,0 @@
|
||||||
3 0 1 TRU 0
|
|
||||||
2 1 1 TRU 0
|
|
||||||
1 2 0 TRU 0
|
|
||||||
0 3 0 TRU 0
|
|
||||||
3 4 0 TRU 0
|
|
||||||
|
|
@ -1,5 +0,0 @@
|
||||||
0 29 1
|
|
||||||
1 29 1
|
|
||||||
2 2 1
|
|
||||||
3 0 1
|
|
||||||
4 10 1
|
|
||||||
|
|
@ -1,33 +0,0 @@
|
||||||
digraph Success_MS_ {
|
|
||||||
{
|
|
||||||
0 [color=red ];
|
|
||||||
|
|
||||||
1 [color=red ];
|
|
||||||
|
|
||||||
2 [color=red ];
|
|
||||||
|
|
||||||
3 [color=red ];
|
|
||||||
|
|
||||||
4 [color=red ];
|
|
||||||
3 -> 0 [style=bold, color=red, label=1]
|
|
||||||
2 -> 1 [style=bold, color=red, label=1]
|
|
||||||
1 -> 2
|
|
||||||
0 -> 3
|
|
||||||
3 -> 4
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
{
|
|
||||||
node [shape=plaintext];
|
|
||||||
T0 -> T1;
|
|
||||||
}{ rank = same;
|
|
||||||
0; 1; 4; T0;
|
|
||||||
};
|
|
||||||
{ rank = same;
|
|
||||||
2; 3; T1;
|
|
||||||
};
|
|
||||||
{ rank = same;
|
|
||||||
|
|
||||||
};
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
@ -1,788 +0,0 @@
|
||||||
|
|
||||||
UPDATING EDGES 3:0
|
|
||||||
|
|
||||||
UPDATING DEPENDENCY EDGES FOR NODE 0:1
|
|
||||||
|
|
||||||
UPDATING EDGES 2:1
|
|
||||||
|
|
||||||
UPDATING DEPENDENCY EDGES FOR NODE 1:1
|
|
||||||
|
|
||||||
UPDATING EDGES 1:2
|
|
||||||
|
|
||||||
UPDATING EDGES 0:3
|
|
||||||
|
|
||||||
UPDATING EDGES 3:4
|
|
||||||
|
|
||||||
UPDATING EDGES 5:0
|
|
||||||
|
|
||||||
UPDATING EDGES 8:1
|
|
||||||
|
|
||||||
UPDATING EDGES 11:2
|
|
||||||
|
|
||||||
UPDATING EDGES 14:3
|
|
||||||
|
|
||||||
UPDATING EDGES 15:4
|
|
||||||
|
|
||||||
UPDATING EDGES 119:120
|
|
||||||
|
|
||||||
UPDATING EDGES 2:120
|
|
||||||
|
|
||||||
UPDATING EDGES 118:120
|
|
||||||
file ptr:0 open:1 prolog_size:64
|
|
||||||
|
|
||||||
|
|
||||||
64
|
|
||||||
32
|
|
||||||
16
|
|
||||||
*********KERNEL*****************
|
|
||||||
*********EPILOG*****************
|
|
||||||
LiveOut_data_pe: 8 liveOut_data: 2
|
|
||||||
LiveOut_add_pe: 10 liveOut_add: 119
|
|
||||||
PE: 0 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 1 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 2 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 3 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 4 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 5 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 6 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 7 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 8 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 9 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 10 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 11 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 12 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 13 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 14 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 15 Configuration Boundary: 0 10e004000
|
|
||||||
reg_num: 0
|
|
||||||
Generating Instructions To Store Address (Hex) 9a640
|
|
||||||
gVar1
|
|
||||||
Loading dynamic constant value. LDA and LDD are 168c02004: 105c04000 in pe 9
|
|
||||||
Load Dyn Cons 168c02004 105c04000
|
|
||||||
reg_num: 0
|
|
||||||
Generating Instructions To Store Address (Hex) 9a650
|
|
||||||
gVar2
|
|
||||||
Loading dynamic constant value. LDA and LDD are 168c02004: 105c04000 in pe 8
|
|
||||||
Load Dyn Cons 168c02004 105c04000
|
|
||||||
reg_num: 1
|
|
||||||
Generating Instructions To Store Address (Hex) 9a658
|
|
||||||
gVar3
|
|
||||||
Loading dynamic constant value. LDA and LDD are 168c82004: 105c0c000 in pe 8
|
|
||||||
Load Dyn Cons 168c82004 105c0c000
|
|
||||||
reg_num: 0
|
|
||||||
Generating Instructions To Store Address (Hex) 9a64c
|
|
||||||
gVar4
|
|
||||||
Loading dynamic constant value. LDA and LDD are 168c02004: 105c04000 in pe 13
|
|
||||||
Load Dyn Cons 168c02004 105c04000
|
|
||||||
reg_num: 1
|
|
||||||
reg_num: 2
|
|
||||||
reg_num: 3
|
|
||||||
reg_num: 2
|
|
||||||
reg_num: 1
|
|
||||||
reg_num: 3
|
|
||||||
Generating Instructions To Store Address (Hex) 9a640
|
|
||||||
gVar1
|
|
||||||
Loading dynamic constant value. LDA and LDD are 168d82004: 105c1c000 in pe 9
|
|
||||||
Load Dyn Cons 168d82004 105c1c000
|
|
||||||
reg_num: 4
|
|
||||||
Generating Instructions To Store Address (Hex) 9a650
|
|
||||||
gVar2
|
|
||||||
Loading dynamic constant value. LDA and LDD are 168c02004: 105c04000 in pe 8
|
|
||||||
Load Dyn Cons 168c02004 105c04000
|
|
||||||
reg_num: 5
|
|
||||||
Generating Instructions To Store Address (Hex) 9a658
|
|
||||||
gVar3
|
|
||||||
Loading dynamic constant value. LDA and LDD are 168c82004: 105c0c000 in pe 8
|
|
||||||
Load Dyn Cons 168c82004 105c0c000
|
|
||||||
reg_num: 0
|
|
||||||
Large Constant (Hex): 1 Constant (Decimal): 1
|
|
||||||
reg_num: 2
|
|
||||||
Generating Instructions To Store Address (Hex) 9a64c
|
|
||||||
gVar4
|
|
||||||
Loading dynamic constant value. LDA and LDD are 168d02004: 105c14000 in pe 13
|
|
||||||
Load Dyn Cons 168d02004 105c14000
|
|
||||||
reg_num: 4
|
|
||||||
Generating Instructions To Store Address (Hex) 9a644
|
|
||||||
gVar5
|
|
||||||
reg_num: 0
|
|
||||||
|
|
||||||
Variable Address (Hex): 9a644 Node: 119 PE: 10 Address (Decimal): 632388 RegNum: 0
|
|
||||||
reg_num: 6
|
|
||||||
pe mem op
|
|
||||||
0 3
|
|
||||||
1 0
|
|
||||||
2 0
|
|
||||||
3 0
|
|
||||||
4 0
|
|
||||||
5 0
|
|
||||||
6 0
|
|
||||||
7 0
|
|
||||||
8 28
|
|
||||||
9 19
|
|
||||||
10 3
|
|
||||||
11 0
|
|
||||||
12 0
|
|
||||||
13 13
|
|
||||||
14 0
|
|
||||||
15 0
|
|
||||||
|
|
||||||
****** Generatina Instructions For Non-Phi Nodes *****
|
|
||||||
|
|
||||||
NODES SCHEDULED AT 0
|
|
||||||
4
|
|
||||||
|
|
||||||
FOR NODE 4: Datatype:1 opcode:12 lmux:3 rmux:0 reg1:0 reg2:2 we:0 wreg:0 imm:0 ab:0 db:0
|
|
||||||
Decoded 1c3040000
|
|
||||||
|
|
||||||
NODES SCHEDULED AT 1
|
|
||||||
2 3
|
|
||||||
|
|
||||||
FOR NODE 2: Datatype:1 opcode:2 lmux:7 rmux:0 reg1:0 reg2:5 we:0 wreg:0 imm:0 ab:0 db:0
|
|
||||||
Decoded 127020000
|
|
||||||
|
|
||||||
FOR NODE 3: Datatype:1 opcode:0 lmux:7 rmux:6 reg1:0 reg2:0 we:0 wreg:0 imm:1 ab:0 db:0
|
|
||||||
Decoded 107c00001
|
|
||||||
|
|
||||||
****** Generating Instructions For Phi Nodes *****
|
|
||||||
|
|
||||||
NODES SCHEDULED AT 0
|
|
||||||
0 1
|
|
||||||
Phi Instructions
|
|
||||||
|
|
||||||
Phi! Prolog! FOR NODE 0: Datatype:1 opcode:1 lmux:0 rmux:0 reg1:3 reg2:0 we:0 wreg:0 imm:1 ab:0 db:0
|
|
||||||
Decoded 118180001
|
|
||||||
|
|
||||||
Phi! Prolog! FOR NODE 1: Datatype:1 opcode:1 lmux:0 rmux:0 reg1:4 reg2:0 we:0 wreg:0 imm:2 ab:0 db:0
|
|
||||||
Decoded 118000002
|
|
||||||
|
|
||||||
Kernel Instructions
|
|
||||||
|
|
||||||
FOR NODE 0: Datatype:1 opcode:1 lmux:7 rmux:6 reg1:0 reg2:0 we:0 wreg:0 imm:0 ab:0 db:0
|
|
||||||
Decoded 11fc00000
|
|
||||||
|
|
||||||
FOR NODE 1: Datatype:1 opcode:1 lmux:7 rmux:6 reg1:0 reg2:0 we:0 wreg:0 imm:0 ab:0 db:0
|
|
||||||
Decoded 11fc00000
|
|
||||||
|
|
||||||
****** Generating Instructions For Store Nodes For Live Variables*****
|
|
||||||
|
|
||||||
NODES SCHEDULED AT 2
|
|
||||||
|
|
||||||
NODES SCHEDULED AT STORE CYCLE 0
|
|
||||||
119 120
|
|
||||||
|
|
||||||
FOR NODE 119: Datatype:1 opcode:6 lmux:0 rmux:6 reg1:0 reg2:0 we:0 wreg:0 imm:4 ab:1 db:0
|
|
||||||
Decoded 168c02004
|
|
||||||
|
|
||||||
FOR NODE 120: Datatype:1 opcode:0 lmux:7 rmux:6 reg1:0 reg2:0 we:0 wreg:0 imm:0 ab:0 db:1
|
|
||||||
Decoded 107c01000
|
|
||||||
*******PROLOG*********
|
|
||||||
0: 10e004000
|
|
||||||
1: 10e004000
|
|
||||||
2: 10e004000
|
|
||||||
3: 10e004000
|
|
||||||
4: 10e004000
|
|
||||||
5: 10e004000
|
|
||||||
6: 10e004000
|
|
||||||
7: 10e004000
|
|
||||||
8: 10e004000
|
|
||||||
9: 10e004000
|
|
||||||
10: 10e004000
|
|
||||||
11: 10e004000
|
|
||||||
12: 10e004000
|
|
||||||
13: 10e004000
|
|
||||||
14: 10e004000
|
|
||||||
15: 10e004000
|
|
||||||
16: 11e004001
|
|
||||||
17: 177e00000
|
|
||||||
18: 177e00000
|
|
||||||
19: 177e00000
|
|
||||||
20: 177e00000
|
|
||||||
21: 177e00000
|
|
||||||
22: 177e00000
|
|
||||||
23: 177e00000
|
|
||||||
24: 11e004650
|
|
||||||
25: 11e004640
|
|
||||||
26: 11e004644
|
|
||||||
27: 177e00000
|
|
||||||
28: 177e00000
|
|
||||||
29: 11e00464c
|
|
||||||
30: 177e00000
|
|
||||||
31: 177e00000
|
|
||||||
32: 12e004000
|
|
||||||
33: 177e00000
|
|
||||||
34: 177e00000
|
|
||||||
35: 177e00000
|
|
||||||
36: 177e00000
|
|
||||||
37: 177e00000
|
|
||||||
38: 177e00000
|
|
||||||
39: 177e00000
|
|
||||||
40: 12e00409a
|
|
||||||
41: 12e00409a
|
|
||||||
42: 12e00409a
|
|
||||||
43: 177e00000
|
|
||||||
44: 177e00000
|
|
||||||
45: 12e00409a
|
|
||||||
46: 177e00000
|
|
||||||
47: 177e00000
|
|
||||||
48: 13e004000
|
|
||||||
49: 177e00000
|
|
||||||
50: 177e00000
|
|
||||||
51: 177e00000
|
|
||||||
52: 177e00000
|
|
||||||
53: 177e00000
|
|
||||||
54: 177e00000
|
|
||||||
55: 177e00000
|
|
||||||
56: 13e004000
|
|
||||||
57: 13e004000
|
|
||||||
58: 13e004000
|
|
||||||
59: 177e00000
|
|
||||||
60: 177e00000
|
|
||||||
61: 13e004000
|
|
||||||
62: 177e00000
|
|
||||||
63: 177e00000
|
|
||||||
64: 177e00000
|
|
||||||
65: 177e00000
|
|
||||||
66: 177e00000
|
|
||||||
67: 177e00000
|
|
||||||
68: 177e00000
|
|
||||||
69: 177e00000
|
|
||||||
70: 177e00000
|
|
||||||
71: 177e00000
|
|
||||||
72: 167e00000
|
|
||||||
73: 168c02004
|
|
||||||
74: 177e00000
|
|
||||||
75: 177e00000
|
|
||||||
76: 177e00000
|
|
||||||
77: 168c02004
|
|
||||||
78: 177e00000
|
|
||||||
79: 177e00000
|
|
||||||
80: 177e00000
|
|
||||||
81: 177e00000
|
|
||||||
82: 177e00000
|
|
||||||
83: 177e00000
|
|
||||||
84: 177e00000
|
|
||||||
85: 177e00000
|
|
||||||
86: 177e00000
|
|
||||||
87: 177e00000
|
|
||||||
88: 167e00000
|
|
||||||
89: 105c04000
|
|
||||||
90: 177e00000
|
|
||||||
91: 177e00000
|
|
||||||
92: 177e00000
|
|
||||||
93: 105c04000
|
|
||||||
94: 177e00000
|
|
||||||
95: 177e00000
|
|
||||||
96: 177e00000
|
|
||||||
97: 177e00000
|
|
||||||
98: 177e00000
|
|
||||||
99: 177e00000
|
|
||||||
100: 177e00000
|
|
||||||
101: 177e00000
|
|
||||||
102: 177e00000
|
|
||||||
103: 177e00000
|
|
||||||
104: 168c02004
|
|
||||||
105: 11e01c640
|
|
||||||
106: 177e00000
|
|
||||||
107: 177e00000
|
|
||||||
108: 177e00000
|
|
||||||
109: 11e01464c
|
|
||||||
110: 177e00000
|
|
||||||
111: 177e00000
|
|
||||||
112: 177e00000
|
|
||||||
113: 177e00000
|
|
||||||
114: 177e00000
|
|
||||||
115: 177e00000
|
|
||||||
116: 177e00000
|
|
||||||
117: 177e00000
|
|
||||||
118: 177e00000
|
|
||||||
119: 177e00000
|
|
||||||
120: 105c04000
|
|
||||||
121: 12e01c09a
|
|
||||||
122: 177e00000
|
|
||||||
123: 177e00000
|
|
||||||
124: 177e00000
|
|
||||||
125: 12e01409a
|
|
||||||
126: 177e00000
|
|
||||||
127: 177e00000
|
|
||||||
128: 177e00000
|
|
||||||
129: 177e00000
|
|
||||||
130: 177e00000
|
|
||||||
131: 177e00000
|
|
||||||
132: 177e00000
|
|
||||||
133: 177e00000
|
|
||||||
134: 177e00000
|
|
||||||
135: 177e00000
|
|
||||||
136: 11e00c658
|
|
||||||
137: 13e01c000
|
|
||||||
138: 177e00000
|
|
||||||
139: 177e00000
|
|
||||||
140: 177e00000
|
|
||||||
141: 13e014000
|
|
||||||
142: 177e00000
|
|
||||||
143: 177e00000
|
|
||||||
144: 177e00000
|
|
||||||
145: 177e00000
|
|
||||||
146: 177e00000
|
|
||||||
147: 177e00000
|
|
||||||
148: 177e00000
|
|
||||||
149: 177e00000
|
|
||||||
150: 177e00000
|
|
||||||
151: 177e00000
|
|
||||||
152: 12e00c09a
|
|
||||||
153: 168d82004
|
|
||||||
154: 177e00000
|
|
||||||
155: 177e00000
|
|
||||||
156: 177e00000
|
|
||||||
157: 168d02004
|
|
||||||
158: 177e00000
|
|
||||||
159: 177e00000
|
|
||||||
160: 177e00000
|
|
||||||
161: 177e00000
|
|
||||||
162: 177e00000
|
|
||||||
163: 177e00000
|
|
||||||
164: 177e00000
|
|
||||||
165: 177e00000
|
|
||||||
166: 177e00000
|
|
||||||
167: 177e00000
|
|
||||||
168: 13e00c000
|
|
||||||
169: 105c1c000
|
|
||||||
170: 177e00000
|
|
||||||
171: 177e00000
|
|
||||||
172: 177e00000
|
|
||||||
173: 105c14000
|
|
||||||
174: 177e00000
|
|
||||||
175: 177e00000
|
|
||||||
176: 177e00000
|
|
||||||
177: 177e00000
|
|
||||||
178: 177e00000
|
|
||||||
179: 177e00000
|
|
||||||
180: 177e00000
|
|
||||||
181: 177e00000
|
|
||||||
182: 177e00000
|
|
||||||
183: 177e00000
|
|
||||||
184: 168c82004
|
|
||||||
185: 11e004644
|
|
||||||
186: 177e00000
|
|
||||||
187: 177e00000
|
|
||||||
188: 177e00000
|
|
||||||
189: 177e00000
|
|
||||||
190: 177e00000
|
|
||||||
191: 177e00000
|
|
||||||
192: 177e00000
|
|
||||||
193: 177e00000
|
|
||||||
194: 177e00000
|
|
||||||
195: 177e00000
|
|
||||||
196: 177e00000
|
|
||||||
197: 177e00000
|
|
||||||
198: 177e00000
|
|
||||||
199: 177e00000
|
|
||||||
200: 105c0c000
|
|
||||||
201: 12e00409a
|
|
||||||
202: 177e00000
|
|
||||||
203: 177e00000
|
|
||||||
204: 177e00000
|
|
||||||
205: 177e00000
|
|
||||||
206: 177e00000
|
|
||||||
207: 177e00000
|
|
||||||
208: 177e00000
|
|
||||||
209: 177e00000
|
|
||||||
210: 177e00000
|
|
||||||
211: 177e00000
|
|
||||||
212: 177e00000
|
|
||||||
213: 177e00000
|
|
||||||
214: 177e00000
|
|
||||||
215: 177e00000
|
|
||||||
216: 11e004650
|
|
||||||
217: 13e004000
|
|
||||||
218: 177e00000
|
|
||||||
219: 177e00000
|
|
||||||
220: 177e00000
|
|
||||||
221: 177e00000
|
|
||||||
222: 177e00000
|
|
||||||
223: 177e00000
|
|
||||||
224: 177e00000
|
|
||||||
225: 177e00000
|
|
||||||
226: 177e00000
|
|
||||||
227: 177e00000
|
|
||||||
228: 177e00000
|
|
||||||
229: 177e00000
|
|
||||||
230: 177e00000
|
|
||||||
231: 177e00000
|
|
||||||
232: 12e00409a
|
|
||||||
233: 177e00000
|
|
||||||
234: 177e00000
|
|
||||||
235: 177e00000
|
|
||||||
236: 177e00000
|
|
||||||
237: 177e00000
|
|
||||||
238: 177e00000
|
|
||||||
239: 177e00000
|
|
||||||
240: 177e00000
|
|
||||||
241: 177e00000
|
|
||||||
242: 177e00000
|
|
||||||
243: 177e00000
|
|
||||||
244: 177e00000
|
|
||||||
245: 177e00000
|
|
||||||
246: 177e00000
|
|
||||||
247: 177e00000
|
|
||||||
248: 13e004000
|
|
||||||
249: 177e00000
|
|
||||||
250: 177e00000
|
|
||||||
251: 177e00000
|
|
||||||
252: 177e00000
|
|
||||||
253: 177e00000
|
|
||||||
254: 177e00000
|
|
||||||
255: 177e00000
|
|
||||||
256: 177e00000
|
|
||||||
257: 177e00000
|
|
||||||
258: 177e00000
|
|
||||||
259: 177e00000
|
|
||||||
260: 177e00000
|
|
||||||
261: 177e00000
|
|
||||||
262: 177e00000
|
|
||||||
263: 177e00000
|
|
||||||
264: 168c02004
|
|
||||||
265: 177e00000
|
|
||||||
266: 177e00000
|
|
||||||
267: 177e00000
|
|
||||||
268: 177e00000
|
|
||||||
269: 177e00000
|
|
||||||
270: 177e00000
|
|
||||||
271: 177e00000
|
|
||||||
272: 177e00000
|
|
||||||
273: 177e00000
|
|
||||||
274: 177e00000
|
|
||||||
275: 177e00000
|
|
||||||
276: 177e00000
|
|
||||||
277: 177e00000
|
|
||||||
278: 177e00000
|
|
||||||
279: 177e00000
|
|
||||||
280: 105c04000
|
|
||||||
281: 177e00000
|
|
||||||
282: 177e00000
|
|
||||||
283: 177e00000
|
|
||||||
284: 177e00000
|
|
||||||
285: 177e00000
|
|
||||||
286: 177e00000
|
|
||||||
287: 177e00000
|
|
||||||
288: 177e00000
|
|
||||||
289: 177e00000
|
|
||||||
290: 177e00000
|
|
||||||
291: 177e00000
|
|
||||||
292: 177e00000
|
|
||||||
293: 177e00000
|
|
||||||
294: 177e00000
|
|
||||||
295: 177e00000
|
|
||||||
296: 11e00c658
|
|
||||||
297: 177e00000
|
|
||||||
298: 177e00000
|
|
||||||
299: 177e00000
|
|
||||||
300: 177e00000
|
|
||||||
301: 177e00000
|
|
||||||
302: 177e00000
|
|
||||||
303: 177e00000
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312: 12e00c09a
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327: 177e00000
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328: 13e00c000
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341: 177e00000
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342: 177e00000
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343: 177e00000
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344: 168c82004
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||||||
345: 177e00000
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346: 177e00000
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359: 177e00000
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||||||
360: 105c0c000
|
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361: 177e00000
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362: 177e00000
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363: 177e00000
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365: 177e00000
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366: 177e00000
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367: 177e00000
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368: 177e00000
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369: 177e00000
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370: 177e00000
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371: 177e00000
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372: 177e00000
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373: 177e00000
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374: 177e00000
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||||||
375: 177e00000
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||||||
376: 177e00000
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377: 177e00000
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||||||
378: 177e00000
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||||||
379: 177e00000
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380: 177e00000
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||||||
381: 177e00000
|
|
||||||
382: 177e00000
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383: 177e00000
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384: 177e00000
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||||||
385: 177e00000
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||||||
386: 177e00000
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||||||
387: 177e00000
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||||||
388: 177e00000
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||||||
389: 177e00000
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||||||
390: 177e00000
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||||||
391: 177e00000
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||||||
392: 177e00000
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||||||
393: 177e00000
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||||||
394: 177e00000
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||||||
395: 177e00000
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396: 177e00000
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397: 177e00000
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398: 177e00000
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399: 177e00000
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400: 177e00000
|
|
||||||
401: 177e00000
|
|
||||||
402: 177e00000
|
|
||||||
403: 177e00000
|
|
||||||
404: 177e00000
|
|
||||||
405: 177e00000
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|
||||||
406: 177e00000
|
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||||||
407: 177e00000
|
|
||||||
408: 177e00000
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|
||||||
409: 177e00000
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||||||
410: 177e00000
|
|
||||||
411: 177e00000
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|
||||||
412: 177e00000
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||||||
413: 177e00000
|
|
||||||
414: 177e00000
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|
||||||
415: 177e00000
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||||||
416: 177e00000
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|
||||||
417: 177e00000
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||||||
418: 177e00000
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||||||
419: 177e00000
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|
||||||
420: 177e00000
|
|
||||||
421: 177e00000
|
|
||||||
422: 177e00000
|
|
||||||
423: 177e00000
|
|
||||||
424: 177e00000
|
|
||||||
425: 177e00000
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|
||||||
426: 177e00000
|
|
||||||
427: 177e00000
|
|
||||||
428: 177e00000
|
|
||||||
429: 177e00000
|
|
||||||
430: 177e00000
|
|
||||||
431: 177e00000
|
|
||||||
432: 177e00000
|
|
||||||
433: 177e00000
|
|
||||||
434: 177e00000
|
|
||||||
435: 177e00000
|
|
||||||
436: 177e00000
|
|
||||||
437: 177e00000
|
|
||||||
438: 177e00000
|
|
||||||
439: 177e00000
|
|
||||||
440: 177e00000
|
|
||||||
441: 177e00000
|
|
||||||
442: 177e00000
|
|
||||||
443: 177e00000
|
|
||||||
444: 177e00000
|
|
||||||
445: 177e00000
|
|
||||||
446: 177e00000
|
|
||||||
447: 177e00000
|
|
||||||
448: 177e00000
|
|
||||||
449: 177e00000
|
|
||||||
450: 177e00000
|
|
||||||
451: 177e00000
|
|
||||||
452: 177e00000
|
|
||||||
453: 177e00000
|
|
||||||
454: 177e00000
|
|
||||||
455: 177e00000
|
|
||||||
456: 177e00000
|
|
||||||
457: 177e00000
|
|
||||||
458: 177e00000
|
|
||||||
459: 177e00000
|
|
||||||
460: 177e00000
|
|
||||||
461: 177e00000
|
|
||||||
462: 177e00000
|
|
||||||
463: 177e00000
|
|
||||||
464: 177e00000
|
|
||||||
465: 177e00000
|
|
||||||
466: 177e00000
|
|
||||||
467: 177e00000
|
|
||||||
468: 177e00000
|
|
||||||
469: 177e00000
|
|
||||||
470: 177e00000
|
|
||||||
471: 177e00000
|
|
||||||
472: 177e00000
|
|
||||||
473: 177e00000
|
|
||||||
474: 177e00000
|
|
||||||
475: 177e00000
|
|
||||||
476: 177e00000
|
|
||||||
477: 177e00000
|
|
||||||
478: 177e00000
|
|
||||||
479: 177e00000
|
|
||||||
480: 177e00000
|
|
||||||
481: 177e00000
|
|
||||||
482: 177e00000
|
|
||||||
483: 177e00000
|
|
||||||
484: 177e00000
|
|
||||||
485: 177e00000
|
|
||||||
486: 177e00000
|
|
||||||
487: 177e00000
|
|
||||||
488: 118000002
|
|
||||||
489: 118180001
|
|
||||||
490: 177e00000
|
|
||||||
491: 177e00000
|
|
||||||
492: 177e00000
|
|
||||||
493: 177e00000
|
|
||||||
494: 177e00000
|
|
||||||
495: 177e00000
|
|
||||||
496: 177e00000
|
|
||||||
497: 177e00000
|
|
||||||
498: 177e00000
|
|
||||||
499: 177e00000
|
|
||||||
500: 177e00000
|
|
||||||
501: 177e00000
|
|
||||||
502: 177e00000
|
|
||||||
503: 177e00000
|
|
||||||
504: 127020000
|
|
||||||
505: 107c00001
|
|
||||||
506: 177e00000
|
|
||||||
507: 177e00000
|
|
||||||
508: 177e00000
|
|
||||||
509: 177e00000
|
|
||||||
510: 177e00000
|
|
||||||
511: 177e00000
|
|
||||||
512: 177e00000
|
|
||||||
513: 177e00000
|
|
||||||
514: 177e00000
|
|
||||||
515: 177e00000
|
|
||||||
516: 177e00000
|
|
||||||
517: 177e00000
|
|
||||||
518: 177e00000
|
|
||||||
519: 177e00000
|
|
||||||
520: 11fc00000
|
|
||||||
521: 11fc00000
|
|
||||||
522: 177e00000
|
|
||||||
523: 177e00000
|
|
||||||
524: 177e00000
|
|
||||||
525: 1c3040000
|
|
||||||
526: 177e00000
|
|
||||||
527: 177e00000
|
|
||||||
528: 177e00000
|
|
||||||
529: 177e00000
|
|
||||||
530: 177e00000
|
|
||||||
531: 177e00000
|
|
||||||
532: 177e00000
|
|
||||||
533: 177e00000
|
|
||||||
534: 177e00000
|
|
||||||
535: 177e00000
|
|
||||||
536: 127020000
|
|
||||||
537: 107c00001
|
|
||||||
538: 177e00000
|
|
||||||
539: 177e00000
|
|
||||||
540: 177e00000
|
|
||||||
541: 177e00000
|
|
||||||
542: 177e00000
|
|
||||||
543: 177e00000
|
|
||||||
*******KERNEl*********
|
|
||||||
0: 177e00000
|
|
||||||
1: 177e00000
|
|
||||||
2: 177e00000
|
|
||||||
3: 177e00000
|
|
||||||
4: 177e00000
|
|
||||||
5: 177e00000
|
|
||||||
6: 177e00000
|
|
||||||
7: 177e00000
|
|
||||||
8: 11fc00000
|
|
||||||
9: 11fc00000
|
|
||||||
10: 177e00000
|
|
||||||
11: 177e00000
|
|
||||||
12: 177e00000
|
|
||||||
13: 1c3040000
|
|
||||||
14: 177e00000
|
|
||||||
15: 177e00000
|
|
||||||
16: 177e00000
|
|
||||||
17: 177e00000
|
|
||||||
18: 177e00000
|
|
||||||
19: 177e00000
|
|
||||||
20: 177e00000
|
|
||||||
21: 177e00000
|
|
||||||
22: 177e00000
|
|
||||||
23: 177e00000
|
|
||||||
24: 127020000
|
|
||||||
25: 107c00001
|
|
||||||
26: 177e00000
|
|
||||||
27: 177e00000
|
|
||||||
28: 177e00000
|
|
||||||
29: 177e00000
|
|
||||||
30: 177e00000
|
|
||||||
31: 177e00000
|
|
||||||
*******EPILOG*********
|
|
||||||
0: 177e00000
|
|
||||||
1: 177e00000
|
|
||||||
2: 177e00000
|
|
||||||
3: 177e00000
|
|
||||||
4: 177e00000
|
|
||||||
5: 177e00000
|
|
||||||
6: 177e00000
|
|
||||||
7: 177e00000
|
|
||||||
8: 177e00000
|
|
||||||
9: 177e00000
|
|
||||||
10: 177e00000
|
|
||||||
11: 177e00000
|
|
||||||
12: 177e00000
|
|
||||||
13: 1c3040000
|
|
||||||
14: 177e00000
|
|
||||||
15: 177e00000
|
|
||||||
16: 177e00000
|
|
||||||
17: 177e00000
|
|
||||||
18: 177e00000
|
|
||||||
19: 177e00000
|
|
||||||
20: 177e00000
|
|
||||||
21: 177e00000
|
|
||||||
22: 177e00000
|
|
||||||
23: 177e00000
|
|
||||||
24: 107c01000
|
|
||||||
25: 177e00000
|
|
||||||
26: 168c02004
|
|
||||||
27: 177e00000
|
|
||||||
28: 177e00000
|
|
||||||
29: 177e00000
|
|
||||||
30: 177e00000
|
|
||||||
31: 177e00000
|
|
||||||
|
|
@ -1,41 +0,0 @@
|
||||||
Mapping has started
|
|
||||||
Operating mode:3
|
|
||||||
Starting II: 2 rec_MII: 2
|
|
||||||
node_set size: 5
|
|
||||||
Node: 2
|
|
||||||
|
|
||||||
Node: 2 type:2 ASAP: 1 ALAP:2 random try_time: 1
|
|
||||||
Node: 1
|
|
||||||
|
|
||||||
Node: 1 type:29 ASAP: 0 ALAP:0 random try_time: 0
|
|
||||||
Node: 4
|
|
||||||
|
|
||||||
Node: 4 type:10 ASAP: 2 ALAP:3 random try_time: 2
|
|
||||||
Node: 3
|
|
||||||
|
|
||||||
Node: 3 type:0 ASAP: 1 ALAP:1 random try_time: 1
|
|
||||||
Node: 0
|
|
||||||
|
|
||||||
Node: 0 type:29 ASAP: 0 ALAP:0 random try_time: 0
|
|
||||||
Feasible II is 2 Schedule Len is 4
|
|
||||||
Node: 0 ASAP: 0 ALAP: 0 is init: 1 sched @ 0 mod: 0
|
|
||||||
Node: 1 ASAP: 0 ALAP: 0 is init: 1 sched @ 0 mod: 0
|
|
||||||
Node: 2 ASAP: 1 ALAP: 2 is init: 1 sched @ 1 mod: 1
|
|
||||||
Node: 3 ASAP: 1 ALAP: 1 is init: 1 sched @ 1 mod: 1
|
|
||||||
Node: 4 ASAP: 2 ALAP: 3 is init: 1 sched @ 2 mod: 0
|
|
||||||
Left Nodes Are: 0
|
|
||||||
Left Nodes Are: 1
|
|
||||||
Left Nodes Are: 2
|
|
||||||
K : 1
|
|
||||||
distance: 1
|
|
||||||
adding nodes between: 2-->1
|
|
||||||
Left Nodes Are: 3
|
|
||||||
K : 1
|
|
||||||
distance: 1
|
|
||||||
adding nodes between: 3-->0
|
|
||||||
Successfully inserted routing nodes to the scheduled DFG.
|
|
||||||
attempt=0
|
|
||||||
rec_MII=0 resMII=1 II:2
|
|
||||||
Start Placement for II = 2
|
|
||||||
MII = 2 Current II=2
|
|
||||||
Mapping is completed and successfull
|
|
||||||
|
|
@ -1,17 +0,0 @@
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
4
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
16
|
|
||||||
Binary file not shown.
|
|
@ -1,10 +0,0 @@
|
||||||
0 29 1
|
|
||||||
1 29 1
|
|
||||||
2 2 1
|
|
||||||
3 0 1
|
|
||||||
4 10 1
|
|
||||||
5 30 1
|
|
||||||
8 30 1
|
|
||||||
11 30 1
|
|
||||||
14 30 1
|
|
||||||
15 30 1
|
|
||||||
|
|
@ -1,10 +0,0 @@
|
||||||
2011168768
|
|
||||||
2011168768
|
|
||||||
2
|
|
||||||
2
|
|
||||||
18
|
|
||||||
7
|
|
||||||
1
|
|
||||||
678624
|
|
||||||
678888
|
|
||||||
681200
|
|
||||||
|
|
@ -1,20 +0,0 @@
|
||||||
digraph iso_graph {
|
|
||||||
{
|
|
||||||
0 [color=red ];
|
|
||||||
|
|
||||||
1 [color=red ];
|
|
||||||
|
|
||||||
2 [color=red ];
|
|
||||||
|
|
||||||
3 [color=red ];
|
|
||||||
|
|
||||||
4 [color=red ];
|
|
||||||
3 -> 0 [style=bold, color=red, label=1]
|
|
||||||
2 -> 1 [style=bold, color=red, label=1]
|
|
||||||
1 -> 2
|
|
||||||
0 -> 3
|
|
||||||
3 -> 4
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
@ -1,33 +0,0 @@
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
1 0 0
|
|
||||||
0 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
4 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
2 0 1
|
|
||||||
3 0 1
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
32
|
|
||||||
|
|
@ -1 +0,0 @@
|
||||||
-3
|
|
||||||
Binary file not shown.
|
|
@ -1,12 +0,0 @@
|
||||||
106 107 0 LRE 0
|
|
||||||
107 0 0 TRU 1
|
|
||||||
5 106 0 TRU 0
|
|
||||||
109 110 0 LRE 0
|
|
||||||
110 1 0 TRU 1
|
|
||||||
8 109 0 TRU 0
|
|
||||||
112 113 0 LRE 0
|
|
||||||
113 2 0 TRU 1
|
|
||||||
11 112 0 TRU 0
|
|
||||||
116 117 0 LRE 0
|
|
||||||
117 4 0 TRU 1
|
|
||||||
15 116 0 TRU 0
|
|
||||||
|
|
@ -1,16 +0,0 @@
|
||||||
0 29 0 1
|
|
||||||
5 30 gVar1 1
|
|
||||||
106 19 ld_add_gVar1 1
|
|
||||||
107 20 ld_data_gVar1 1
|
|
||||||
1 29 1 1
|
|
||||||
8 30 gVar2 1
|
|
||||||
109 19 ld_add_gVar2 1
|
|
||||||
110 20 ld_data_gVar2 1
|
|
||||||
2 2 2 1
|
|
||||||
11 30 gVar3 1
|
|
||||||
112 19 ld_add_gVar3 1
|
|
||||||
113 20 ld_data_gVar3 1
|
|
||||||
4 10 4 1
|
|
||||||
15 30 gVar4 1
|
|
||||||
116 19 ld_add_gVar4 1
|
|
||||||
117 20 ld_data_gVar4 1
|
|
||||||
|
|
@ -1,3 +0,0 @@
|
||||||
119 120 0 SRE 0
|
|
||||||
2 120 0 TRU 0
|
|
||||||
118 120 0 TRU 1
|
|
||||||
|
|
@ -1,4 +0,0 @@
|
||||||
2 2 2 0 1
|
|
||||||
118 30 gVar5 0 1
|
|
||||||
119 21 st_add_gVar5 4 1
|
|
||||||
120 22 st_data_gVar5 0 1
|
|
||||||
|
|
@ -1 +0,0 @@
|
||||||
16
|
|
||||||
|
|
@ -1,10 +0,0 @@
|
||||||
3 0 1 TRU 0
|
|
||||||
5 0 0 LIE 1
|
|
||||||
2 1 1 TRU 0
|
|
||||||
8 1 0 LIE 1
|
|
||||||
1 2 0 TRU 0
|
|
||||||
11 2 0 LIE 1
|
|
||||||
0 3 0 TRU 0
|
|
||||||
14 3 0 TRU 1
|
|
||||||
3 4 0 TRU 0
|
|
||||||
15 4 0 LIE 1
|
|
||||||
|
|
@ -1,10 +0,0 @@
|
||||||
0 29 0 0 1
|
|
||||||
1 29 1 0 1
|
|
||||||
2 2 2 0 1
|
|
||||||
3 0 3 0 1
|
|
||||||
4 10 4 0 1
|
|
||||||
5 30 gVar1 4 1
|
|
||||||
8 30 gVar2 4 1
|
|
||||||
11 30 gVar3 4 1
|
|
||||||
14 30 ConstInt1 0 1
|
|
||||||
15 30 gVar4 4 1
|
|
||||||
|
|
@ -1,38 +0,0 @@
|
||||||
digraph loop_21 {
|
|
||||||
{
|
|
||||||
0 [shape=box, color=red, label="0\nPHI"];
|
|
||||||
|
|
||||||
1 [shape=box, color=red, label="1\nPHI"];
|
|
||||||
|
|
||||||
2 [shape=house, color=purple, label="2\nMultiply"];
|
|
||||||
|
|
||||||
3 [shape=polygon, color=purple, label="3\nAdd"];
|
|
||||||
|
|
||||||
4 [shape=trapezium, color=orange, label="4\nCMPEQ"];
|
|
||||||
|
|
||||||
5 [color=black, label="gVar1\n"];
|
|
||||||
|
|
||||||
8 [color=black, label="gVar2\n"];
|
|
||||||
|
|
||||||
11 [color=black, label="gVar3\n"];
|
|
||||||
|
|
||||||
14 [color=black, label="ConstInt1\n"];
|
|
||||||
|
|
||||||
15 [color=black, label="gVar4\n"];
|
|
||||||
|
|
||||||
118 [color=black, label="gVar5\n"];
|
|
||||||
3 -> 0 [style=bold, color=red, label=1]
|
|
||||||
5 -> 0 [color=orange, label=4]
|
|
||||||
2 -> 1 [style=bold, color=red, label=1]
|
|
||||||
8 -> 1 [color=orange, label=4]
|
|
||||||
1 -> 2
|
|
||||||
11 -> 2 [color=orange, label=4]
|
|
||||||
0 -> 3
|
|
||||||
14 -> 3 [color=gray]
|
|
||||||
3 -> 4
|
|
||||||
15 -> 4 [color=orange, label=4]
|
|
||||||
2 -> 118 [color=orange, label=4]
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
@ -1 +0,0 @@
|
||||||
0
|
|
||||||
|
|
@ -1,5 +0,0 @@
|
||||||
0 1
|
|
||||||
1 1
|
|
||||||
2 1
|
|
||||||
3 1
|
|
||||||
4 1
|
|
||||||
|
|
@ -1,65 +0,0 @@
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
1
|
|
||||||
0
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
2
|
|
||||||
3
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
1
|
|
||||||
0
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
4
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
2
|
|
||||||
3
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
64
|
|
||||||
Binary file not shown.
|
|
@ -1,16 +0,0 @@
|
||||||
0 0
|
|
||||||
1 0
|
|
||||||
2 0
|
|
||||||
3 0
|
|
||||||
4 0
|
|
||||||
5 0
|
|
||||||
6 0
|
|
||||||
7 0
|
|
||||||
8 0
|
|
||||||
9 0
|
|
||||||
10 0
|
|
||||||
11 0
|
|
||||||
12 0
|
|
||||||
13 0
|
|
||||||
14 0
|
|
||||||
15 0
|
|
||||||
|
|
@ -1,112 +0,0 @@
|
||||||
#!/bin/bash
|
|
||||||
|
|
||||||
############################################
|
|
||||||
############################################
|
|
||||||
## Author : Shail Dave ##
|
|
||||||
## Arizona State University ##
|
|
||||||
## ##
|
|
||||||
## Notes : Script File To Compile A Loop ##
|
|
||||||
## for its Execution on CGRA ##
|
|
||||||
## ##
|
|
||||||
############################################
|
|
||||||
############################################
|
|
||||||
|
|
||||||
#Set Architecture Parameters
|
|
||||||
#X=4
|
|
||||||
#Y=4
|
|
||||||
#R=4
|
|
||||||
|
|
||||||
X=0
|
|
||||||
Y=0
|
|
||||||
R=0
|
|
||||||
IC=0
|
|
||||||
CGRAclock=0
|
|
||||||
CPUClock=0
|
|
||||||
ALGO=""
|
|
||||||
MSA=10
|
|
||||||
MAPII=10
|
|
||||||
MAX_MAP=1000
|
|
||||||
MAX_II=50
|
|
||||||
LAMBDA=0.02
|
|
||||||
|
|
||||||
if [ -f "CGRA_config.csv" ]; then
|
|
||||||
INPUTFILE="CGRA_config.csv"
|
|
||||||
X=$(grep -w X $INPUTFILE | cut -d, -f2)
|
|
||||||
Y=$(grep -w Y $INPUTFILE | cut -d, -f2)
|
|
||||||
R=$(grep -w R $INPUTFILE | cut -d, -f2)
|
|
||||||
ALGO=$(grep -w ALGO $INPUTFILE | cut -d, -f2)
|
|
||||||
MSA=$(grep -w MSA $INPUTFILE | cut -d, -f2)
|
|
||||||
MAPII=$(grep -w MAPII $INPUTFILE | cut -d, -f2)
|
|
||||||
MAX_MAP=$(grep -w MAX_MAP $INPUTFILE | cut -d, -f2)
|
|
||||||
MAX_II=$(grep -w MAX_II $INPUTFILE | cut -d, -f2)
|
|
||||||
LAMBDA=$(grep -w LAMBDA $INPUTFILE | cut -d, -f2)
|
|
||||||
|
|
||||||
|
|
||||||
else
|
|
||||||
echo "Please include CGRA architecture file"
|
|
||||||
exit 1
|
|
||||||
fi
|
|
||||||
|
|
||||||
obj="$1"
|
|
||||||
|
|
||||||
#Setting Paths
|
|
||||||
LEVEL=../..
|
|
||||||
#toolchain="/home/shail/ccf-init"
|
|
||||||
ccf_root="$2"
|
|
||||||
script="$ccf_root/scripts"
|
|
||||||
opcodegen="$ccf_root/InstructionGenerator/insgen"
|
|
||||||
opcodegen1="$ccf_root/InstructionGenerator/falcon_insgen"
|
|
||||||
|
|
||||||
#Detect node and edge file
|
|
||||||
llvmedge="$(find . -name "*.txt" | grep -i loop | grep -i edge)"
|
|
||||||
llvmnode="$(find . -name "*.txt" | grep -i loop | grep -i node)"
|
|
||||||
|
|
||||||
echo $llvmnode
|
|
||||||
|
|
||||||
#RAMP - Scheduling and Mapping
|
|
||||||
#if [ $ALGO -eq 0 ]; then
|
|
||||||
# $script/map.sh $llvmnode $llvmedge -X $X -Y $Y -R $R
|
|
||||||
#elif [ $ALGO -eq 1 ]; then
|
|
||||||
# $script/map1.sh $llvmnode $llvmedge $X $Y $R $MODE
|
|
||||||
#elif [ $ALGO -eq 2 ]; then
|
|
||||||
# $script/map2.sh $llvmnode $llvmedge $X $Y $R $MODE
|
|
||||||
#elif [ $ALGO -eq 3 ]; then
|
|
||||||
# $script/map3.sh $llvmnode $llvmedge $X $Y $R $MODE
|
|
||||||
#else
|
|
||||||
# $script/map4.sh $llvmnode $llvmedge $X $Y $R $MODE $SCHED
|
|
||||||
#fi
|
|
||||||
|
|
||||||
pwd
|
|
||||||
find ${ccf_root}/mappings -maxdepth 1 -mindepth 1 -type d | while read dir; do
|
|
||||||
if [[ $dir == *"$ALGO" ]]; then
|
|
||||||
map="$dir/Release"
|
|
||||||
nodefile="$dir/DFGFiles"
|
|
||||||
$map/$ALGO -EDGE $llvmedge -NODE $llvmnode -X $X -Y $Y -R $R -MSA $MSA -MAPII $MAPII -MAX_MAP $MAX_MAP -MAX_II $MAX_II -LAMBDA $LAMBDA #> $schfile
|
|
||||||
$nodefile/nodefile $llvmnode DUMP_node.txt > final_node.txt
|
|
||||||
fi
|
|
||||||
done
|
|
||||||
|
|
||||||
finalnode="$(find ./ -name "*.txt" | grep -i final | grep -i node)"
|
|
||||||
node="$(find ./ -name "*.txt" | grep -i DUMP | grep -i node)"
|
|
||||||
edge="$(find ./ -name "*.txt" | grep -i DUMP | grep -i edge)"
|
|
||||||
|
|
||||||
liveoutnode="$(find ./ -name "*.txt" | grep -i liveout | grep -i node)"
|
|
||||||
liveoutedge="$(find ./ -name "*.txt" | grep -i liveout | grep -i edge)"
|
|
||||||
|
|
||||||
if [ $R -eq 0 ]; then
|
|
||||||
R=4
|
|
||||||
fi
|
|
||||||
|
|
||||||
|
|
||||||
#echo "Num regs is $R"
|
|
||||||
|
|
||||||
#Instruction Generator
|
|
||||||
echo Instruction Generator
|
|
||||||
if [ $ALGO == "FalconCrimson" ]; then
|
|
||||||
echo running FalcomCrimson
|
|
||||||
$opcodegen1 $finalnode $edge $llvmnode $llvmedge $obj prolog.sch kernel.sch epilog.sch $X $Y $R $liveoutnode $liveoutedge > cgra_instructions.txt
|
|
||||||
else
|
|
||||||
echo Running something else
|
|
||||||
#$opcodegen $finalnode $edge $llvmnode $llvmedge $obj prolog.sch kernel.sch epilog.sch $X $Y $R $liveoutnode $liveoutedge > cgra_instructions.txt
|
|
||||||
$opcodegen $finalnode $edge $llvmnode $llvmedge $obj prolog.sch kernel.sch epilog.sch $X $Y $R $liveoutnode $liveoutedge &> cgra_instructions.debug
|
|
||||||
fi
|
|
||||||
|
|
@ -1,42 +0,0 @@
|
||||||
digraph schedule {
|
|
||||||
{
|
|
||||||
0 [color=red ];
|
|
||||||
|
|
||||||
1 [color=red ];
|
|
||||||
|
|
||||||
2 [color=red ];
|
|
||||||
|
|
||||||
3 [color=red ];
|
|
||||||
|
|
||||||
4 [color=red ];
|
|
||||||
3 -> 0 [style=bold, color=red, label=1]
|
|
||||||
2 -> 1 [style=bold, color=red, label=1]
|
|
||||||
1 -> 2
|
|
||||||
0 -> 3
|
|
||||||
3 -> 4
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
{
|
|
||||||
node [shape=plaintext];
|
|
||||||
T0 -> T1 -> T2 -> T3 -> T4;
|
|
||||||
}{ rank = source;
|
|
||||||
T0;
|
|
||||||
};
|
|
||||||
{ rank = same;
|
|
||||||
0; 1; T0;
|
|
||||||
};
|
|
||||||
{ rank = same;
|
|
||||||
2; 3; T1;
|
|
||||||
};
|
|
||||||
{ rank = same;
|
|
||||||
4; T2;
|
|
||||||
};
|
|
||||||
{ rank = same;
|
|
||||||
|
|
||||||
};
|
|
||||||
{ rank = same;
|
|
||||||
|
|
||||||
};
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
@ -1,42 +0,0 @@
|
||||||
digraph schedule {
|
|
||||||
{
|
|
||||||
0 [color=red ];
|
|
||||||
|
|
||||||
1 [color=red ];
|
|
||||||
|
|
||||||
2 [color=red ];
|
|
||||||
|
|
||||||
3 [color=red ];
|
|
||||||
|
|
||||||
4 [color=red ];
|
|
||||||
3 -> 0 [style=bold, color=red, label=1]
|
|
||||||
2 -> 1 [style=bold, color=red, label=1]
|
|
||||||
1 -> 2
|
|
||||||
0 -> 3
|
|
||||||
3 -> 4
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
{
|
|
||||||
node [shape=plaintext];
|
|
||||||
T0 -> T1 -> T2 -> T3 -> T4;
|
|
||||||
}{ rank = source;
|
|
||||||
T0;
|
|
||||||
};
|
|
||||||
{ rank = same;
|
|
||||||
0; 1; T0;
|
|
||||||
};
|
|
||||||
{ rank = same;
|
|
||||||
2; 3; T1;
|
|
||||||
};
|
|
||||||
{ rank = same;
|
|
||||||
4; T2;
|
|
||||||
};
|
|
||||||
{ rank = same;
|
|
||||||
|
|
||||||
};
|
|
||||||
{ rank = same;
|
|
||||||
|
|
||||||
};
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
@ -1,14 +0,0 @@
|
||||||
X,4
|
|
||||||
Y,4
|
|
||||||
R,4
|
|
||||||
IC,0
|
|
||||||
Cclock,0.7
|
|
||||||
CPUclock,2
|
|
||||||
Mem,8GB
|
|
||||||
MODE,0
|
|
||||||
ALGO,FalconCrimson
|
|
||||||
MSA,10
|
|
||||||
MAPII,10
|
|
||||||
MAX_MAP,1000
|
|
||||||
MAX_II,50
|
|
||||||
LAMBDA,0.02
|
|
||||||
|
|
|
@ -1,14 +0,0 @@
|
||||||
4
|
|
||||||
4
|
|
||||||
4
|
|
||||||
0
|
|
||||||
0.7
|
|
||||||
2
|
|
||||||
8GB
|
|
||||||
0
|
|
||||||
FalconCrimson
|
|
||||||
10
|
|
||||||
10
|
|
||||||
1000
|
|
||||||
50
|
|
||||||
0.02
|
|
||||||
|
|
@ -1,5 +0,0 @@
|
||||||
3 0 1 TRU 0
|
|
||||||
2 1 1 TRU 0
|
|
||||||
1 2 0 TRU 0
|
|
||||||
0 3 0 TRU 0
|
|
||||||
3 4 0 TRU 0
|
|
||||||
|
|
@ -1,5 +0,0 @@
|
||||||
0 29 1
|
|
||||||
1 29 1
|
|
||||||
2 4 1
|
|
||||||
3 0 1
|
|
||||||
4 10 1
|
|
||||||
|
|
@ -1,33 +0,0 @@
|
||||||
digraph Success_MS_ {
|
|
||||||
{
|
|
||||||
0 [color=red ];
|
|
||||||
|
|
||||||
1 [color=red ];
|
|
||||||
|
|
||||||
2 [color=red ];
|
|
||||||
|
|
||||||
3 [color=red ];
|
|
||||||
|
|
||||||
4 [color=red ];
|
|
||||||
3 -> 0 [style=bold, color=red, label=1]
|
|
||||||
2 -> 1 [style=bold, color=red, label=1]
|
|
||||||
1 -> 2
|
|
||||||
0 -> 3
|
|
||||||
3 -> 4
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
{
|
|
||||||
node [shape=plaintext];
|
|
||||||
T0 -> T1;
|
|
||||||
}{ rank = same;
|
|
||||||
0; 1; 4; T0;
|
|
||||||
};
|
|
||||||
{ rank = same;
|
|
||||||
2; 3; T1;
|
|
||||||
};
|
|
||||||
{ rank = same;
|
|
||||||
|
|
||||||
};
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
@ -1,504 +0,0 @@
|
||||||
|
|
||||||
UPDATING EDGES 3:0
|
|
||||||
|
|
||||||
UPDATING DEPENDENCY EDGES FOR NODE 0:1
|
|
||||||
|
|
||||||
UPDATING EDGES 2:1
|
|
||||||
|
|
||||||
UPDATING DEPENDENCY EDGES FOR NODE 1:1
|
|
||||||
|
|
||||||
UPDATING EDGES 1:2
|
|
||||||
|
|
||||||
UPDATING EDGES 0:3
|
|
||||||
|
|
||||||
UPDATING EDGES 3:4
|
|
||||||
|
|
||||||
UPDATING EDGES 5:0
|
|
||||||
|
|
||||||
UPDATING EDGES 6:1
|
|
||||||
|
|
||||||
UPDATING EDGES 5:2
|
|
||||||
|
|
||||||
UPDATING EDGES 5:3
|
|
||||||
|
|
||||||
UPDATING EDGES 7:4
|
|
||||||
|
|
||||||
UPDATING EDGES 111:112
|
|
||||||
|
|
||||||
UPDATING EDGES 2:112
|
|
||||||
|
|
||||||
UPDATING EDGES 110:112
|
|
||||||
file ptr:0 open:1 prolog_size:64
|
|
||||||
|
|
||||||
|
|
||||||
64
|
|
||||||
32
|
|
||||||
16
|
|
||||||
*********KERNEL*****************
|
|
||||||
*********EPILOG*****************
|
|
||||||
LiveOut_data_pe: 8 liveOut_data: 2
|
|
||||||
LiveOut_add_pe: 10 liveOut_add: 111
|
|
||||||
PE: 0 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 1 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 2 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 3 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 4 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 5 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 6 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 7 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 8 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 9 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 10 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 11 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 12 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 13 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 14 Configuration Boundary: 0 10e004000
|
|
||||||
PE: 15 Configuration Boundary: 0 10e004000
|
|
||||||
reg_num: 0
|
|
||||||
Generating Instructions To Store Address (Hex) 9a648
|
|
||||||
gVar6
|
|
||||||
Loading dynamic constant value. LDA and LDD are 168c02004: 105c04000 in pe 13
|
|
||||||
Load Dyn Cons 168c02004 105c04000
|
|
||||||
reg_num: 0
|
|
||||||
reg_num: 0
|
|
||||||
reg_num: 1
|
|
||||||
reg_num: 1
|
|
||||||
reg_num: 1
|
|
||||||
reg_num: 0
|
|
||||||
Large Constant (Hex): 1 Constant (Decimal): 1
|
|
||||||
reg_num: 1
|
|
||||||
Large Constant (Hex): 2 Constant (Decimal): 2
|
|
||||||
reg_num: 2
|
|
||||||
Generating Instructions To Store Address (Hex) 9a648
|
|
||||||
gVar6
|
|
||||||
Loading dynamic constant value. LDA and LDD are 168d02004: 105c14000 in pe 13
|
|
||||||
Load Dyn Cons 168d02004 105c14000
|
|
||||||
reg_num: 2
|
|
||||||
Generating Instructions To Store Address (Hex) 9a654
|
|
||||||
gVar7
|
|
||||||
reg_num: 0
|
|
||||||
|
|
||||||
Variable Address (Hex): 9a654 Node: 111 PE: 10 Address (Decimal): 632404 RegNum: 0
|
|
||||||
reg_num: 2
|
|
||||||
pe mem op
|
|
||||||
0 6
|
|
||||||
1 0
|
|
||||||
2 0
|
|
||||||
3 0
|
|
||||||
4 0
|
|
||||||
5 0
|
|
||||||
6 0
|
|
||||||
7 0
|
|
||||||
8 6
|
|
||||||
9 9
|
|
||||||
10 3
|
|
||||||
11 0
|
|
||||||
12 0
|
|
||||||
13 13
|
|
||||||
14 0
|
|
||||||
15 0
|
|
||||||
|
|
||||||
****** Generatina Instructions For Non-Phi Nodes *****
|
|
||||||
|
|
||||||
NODES SCHEDULED AT 0
|
|
||||||
4
|
|
||||||
|
|
||||||
FOR NODE 4: Datatype:1 opcode:12 lmux:3 rmux:0 reg1:0 reg2:2 we:0 wreg:0 imm:0 ab:0 db:0
|
|
||||||
Decoded 1c3040000
|
|
||||||
|
|
||||||
NODES SCHEDULED AT 1
|
|
||||||
2 3
|
|
||||||
|
|
||||||
FOR NODE 2: Datatype:1 opcode:8 lmux:7 rmux:6 reg1:0 reg2:0 we:0 wreg:0 imm:1 ab:0 db:0
|
|
||||||
Decoded 187c00001
|
|
||||||
|
|
||||||
FOR NODE 3: Datatype:1 opcode:0 lmux:7 rmux:6 reg1:0 reg2:0 we:0 wreg:0 imm:1 ab:0 db:0
|
|
||||||
Decoded 107c00001
|
|
||||||
|
|
||||||
****** Generating Instructions For Phi Nodes *****
|
|
||||||
|
|
||||||
NODES SCHEDULED AT 0
|
|
||||||
0 1
|
|
||||||
Phi Instructions
|
|
||||||
|
|
||||||
Phi! Prolog! FOR NODE 0: Datatype:1 opcode:1 lmux:6 rmux:0 reg1:0 reg2:0 we:0 wreg:0 imm:1 ab:0 db:0
|
|
||||||
Decoded 11e000001
|
|
||||||
|
|
||||||
Phi! Prolog! FOR NODE 1: Datatype:1 opcode:1 lmux:6 rmux:0 reg1:0 reg2:0 we:0 wreg:0 imm:2 ab:0 db:0
|
|
||||||
Decoded 11e000002
|
|
||||||
|
|
||||||
Kernel Instructions
|
|
||||||
|
|
||||||
FOR NODE 0: Datatype:1 opcode:1 lmux:7 rmux:6 reg1:0 reg2:0 we:0 wreg:0 imm:0 ab:0 db:0
|
|
||||||
Decoded 11fc00000
|
|
||||||
|
|
||||||
FOR NODE 1: Datatype:1 opcode:1 lmux:7 rmux:6 reg1:0 reg2:0 we:0 wreg:0 imm:0 ab:0 db:0
|
|
||||||
Decoded 11fc00000
|
|
||||||
|
|
||||||
****** Generating Instructions For Store Nodes For Live Variables*****
|
|
||||||
|
|
||||||
NODES SCHEDULED AT 2
|
|
||||||
|
|
||||||
NODES SCHEDULED AT STORE CYCLE 0
|
|
||||||
111 112
|
|
||||||
|
|
||||||
FOR NODE 111: Datatype:1 opcode:6 lmux:0 rmux:6 reg1:0 reg2:0 we:0 wreg:0 imm:4 ab:1 db:0
|
|
||||||
Decoded 168c02004
|
|
||||||
|
|
||||||
FOR NODE 112: Datatype:1 opcode:0 lmux:7 rmux:6 reg1:0 reg2:0 we:0 wreg:0 imm:0 ab:0 db:1
|
|
||||||
Decoded 107c01000
|
|
||||||
*******PROLOG*********
|
|
||||||
0: 10e004000
|
|
||||||
1: 10e004000
|
|
||||||
2: 10e004000
|
|
||||||
3: 10e004000
|
|
||||||
4: 10e004000
|
|
||||||
5: 10e004000
|
|
||||||
6: 10e004000
|
|
||||||
7: 10e004000
|
|
||||||
8: 10e004000
|
|
||||||
9: 10e004000
|
|
||||||
10: 10e004000
|
|
||||||
11: 10e004000
|
|
||||||
12: 10e004000
|
|
||||||
13: 10e004000
|
|
||||||
14: 10e004000
|
|
||||||
15: 10e004000
|
|
||||||
16: 11e004001
|
|
||||||
17: 177e00000
|
|
||||||
18: 177e00000
|
|
||||||
19: 177e00000
|
|
||||||
20: 177e00000
|
|
||||||
21: 177e00000
|
|
||||||
22: 177e00000
|
|
||||||
23: 177e00000
|
|
||||||
24: 177e00000
|
|
||||||
25: 11e014654
|
|
||||||
26: 11e004654
|
|
||||||
27: 177e00000
|
|
||||||
28: 177e00000
|
|
||||||
29: 11e004648
|
|
||||||
30: 177e00000
|
|
||||||
31: 177e00000
|
|
||||||
32: 12e004000
|
|
||||||
33: 177e00000
|
|
||||||
34: 177e00000
|
|
||||||
35: 177e00000
|
|
||||||
36: 177e00000
|
|
||||||
37: 177e00000
|
|
||||||
38: 177e00000
|
|
||||||
39: 177e00000
|
|
||||||
40: 177e00000
|
|
||||||
41: 12e01409a
|
|
||||||
42: 12e00409a
|
|
||||||
43: 177e00000
|
|
||||||
44: 177e00000
|
|
||||||
45: 12e00409a
|
|
||||||
46: 177e00000
|
|
||||||
47: 177e00000
|
|
||||||
48: 13e004000
|
|
||||||
49: 177e00000
|
|
||||||
50: 177e00000
|
|
||||||
51: 177e00000
|
|
||||||
52: 177e00000
|
|
||||||
53: 177e00000
|
|
||||||
54: 177e00000
|
|
||||||
55: 177e00000
|
|
||||||
56: 177e00000
|
|
||||||
57: 13e014000
|
|
||||||
58: 13e004000
|
|
||||||
59: 177e00000
|
|
||||||
60: 177e00000
|
|
||||||
61: 13e004000
|
|
||||||
62: 177e00000
|
|
||||||
63: 177e00000
|
|
||||||
64: 11e00c002
|
|
||||||
65: 177e00000
|
|
||||||
66: 177e00000
|
|
||||||
67: 177e00000
|
|
||||||
68: 177e00000
|
|
||||||
69: 177e00000
|
|
||||||
70: 177e00000
|
|
||||||
71: 177e00000
|
|
||||||
72: 177e00000
|
|
||||||
73: 177e00000
|
|
||||||
74: 177e00000
|
|
||||||
75: 177e00000
|
|
||||||
76: 177e00000
|
|
||||||
77: 168c02004
|
|
||||||
78: 177e00000
|
|
||||||
79: 177e00000
|
|
||||||
80: 12e00c000
|
|
||||||
81: 177e00000
|
|
||||||
82: 177e00000
|
|
||||||
83: 177e00000
|
|
||||||
84: 177e00000
|
|
||||||
85: 177e00000
|
|
||||||
86: 177e00000
|
|
||||||
87: 177e00000
|
|
||||||
88: 177e00000
|
|
||||||
89: 177e00000
|
|
||||||
90: 177e00000
|
|
||||||
91: 177e00000
|
|
||||||
92: 177e00000
|
|
||||||
93: 105c04000
|
|
||||||
94: 177e00000
|
|
||||||
95: 177e00000
|
|
||||||
96: 13e00c000
|
|
||||||
97: 177e00000
|
|
||||||
98: 177e00000
|
|
||||||
99: 177e00000
|
|
||||||
100: 177e00000
|
|
||||||
101: 177e00000
|
|
||||||
102: 177e00000
|
|
||||||
103: 177e00000
|
|
||||||
104: 177e00000
|
|
||||||
105: 177e00000
|
|
||||||
106: 177e00000
|
|
||||||
107: 177e00000
|
|
||||||
108: 177e00000
|
|
||||||
109: 11e014648
|
|
||||||
110: 177e00000
|
|
||||||
111: 177e00000
|
|
||||||
112: 177e00000
|
|
||||||
113: 177e00000
|
|
||||||
114: 177e00000
|
|
||||||
115: 177e00000
|
|
||||||
116: 177e00000
|
|
||||||
117: 177e00000
|
|
||||||
118: 177e00000
|
|
||||||
119: 177e00000
|
|
||||||
120: 177e00000
|
|
||||||
121: 177e00000
|
|
||||||
122: 177e00000
|
|
||||||
123: 177e00000
|
|
||||||
124: 177e00000
|
|
||||||
125: 12e01409a
|
|
||||||
126: 177e00000
|
|
||||||
127: 177e00000
|
|
||||||
128: 177e00000
|
|
||||||
129: 177e00000
|
|
||||||
130: 177e00000
|
|
||||||
131: 177e00000
|
|
||||||
132: 177e00000
|
|
||||||
133: 177e00000
|
|
||||||
134: 177e00000
|
|
||||||
135: 177e00000
|
|
||||||
136: 177e00000
|
|
||||||
137: 177e00000
|
|
||||||
138: 177e00000
|
|
||||||
139: 177e00000
|
|
||||||
140: 177e00000
|
|
||||||
141: 13e014000
|
|
||||||
142: 177e00000
|
|
||||||
143: 177e00000
|
|
||||||
144: 177e00000
|
|
||||||
145: 177e00000
|
|
||||||
146: 177e00000
|
|
||||||
147: 177e00000
|
|
||||||
148: 177e00000
|
|
||||||
149: 177e00000
|
|
||||||
150: 177e00000
|
|
||||||
151: 177e00000
|
|
||||||
152: 177e00000
|
|
||||||
153: 177e00000
|
|
||||||
154: 177e00000
|
|
||||||
155: 177e00000
|
|
||||||
156: 177e00000
|
|
||||||
157: 168d02004
|
|
||||||
158: 177e00000
|
|
||||||
159: 177e00000
|
|
||||||
160: 177e00000
|
|
||||||
161: 177e00000
|
|
||||||
162: 177e00000
|
|
||||||
163: 177e00000
|
|
||||||
164: 177e00000
|
|
||||||
165: 177e00000
|
|
||||||
166: 177e00000
|
|
||||||
167: 177e00000
|
|
||||||
168: 177e00000
|
|
||||||
169: 177e00000
|
|
||||||
170: 177e00000
|
|
||||||
171: 177e00000
|
|
||||||
172: 177e00000
|
|
||||||
173: 105c14000
|
|
||||||
174: 177e00000
|
|
||||||
175: 177e00000
|
|
||||||
176: 177e00000
|
|
||||||
177: 177e00000
|
|
||||||
178: 177e00000
|
|
||||||
179: 177e00000
|
|
||||||
180: 177e00000
|
|
||||||
181: 177e00000
|
|
||||||
182: 177e00000
|
|
||||||
183: 177e00000
|
|
||||||
184: 177e00000
|
|
||||||
185: 177e00000
|
|
||||||
186: 177e00000
|
|
||||||
187: 177e00000
|
|
||||||
188: 177e00000
|
|
||||||
189: 177e00000
|
|
||||||
190: 177e00000
|
|
||||||
191: 177e00000
|
|
||||||
192: 177e00000
|
|
||||||
193: 177e00000
|
|
||||||
194: 177e00000
|
|
||||||
195: 177e00000
|
|
||||||
196: 177e00000
|
|
||||||
197: 177e00000
|
|
||||||
198: 177e00000
|
|
||||||
199: 177e00000
|
|
||||||
200: 177e00000
|
|
||||||
201: 177e00000
|
|
||||||
202: 177e00000
|
|
||||||
203: 177e00000
|
|
||||||
204: 177e00000
|
|
||||||
205: 177e00000
|
|
||||||
206: 177e00000
|
|
||||||
207: 177e00000
|
|
||||||
208: 177e00000
|
|
||||||
209: 177e00000
|
|
||||||
210: 177e00000
|
|
||||||
211: 177e00000
|
|
||||||
212: 177e00000
|
|
||||||
213: 177e00000
|
|
||||||
214: 177e00000
|
|
||||||
215: 177e00000
|
|
||||||
216: 177e00000
|
|
||||||
217: 177e00000
|
|
||||||
218: 177e00000
|
|
||||||
219: 177e00000
|
|
||||||
220: 177e00000
|
|
||||||
221: 177e00000
|
|
||||||
222: 177e00000
|
|
||||||
223: 177e00000
|
|
||||||
224: 177e00000
|
|
||||||
225: 177e00000
|
|
||||||
226: 177e00000
|
|
||||||
227: 177e00000
|
|
||||||
228: 177e00000
|
|
||||||
229: 177e00000
|
|
||||||
230: 177e00000
|
|
||||||
231: 177e00000
|
|
||||||
232: 11e000002
|
|
||||||
233: 11e000001
|
|
||||||
234: 177e00000
|
|
||||||
235: 177e00000
|
|
||||||
236: 177e00000
|
|
||||||
237: 177e00000
|
|
||||||
238: 177e00000
|
|
||||||
239: 177e00000
|
|
||||||
240: 177e00000
|
|
||||||
241: 177e00000
|
|
||||||
242: 177e00000
|
|
||||||
243: 177e00000
|
|
||||||
244: 177e00000
|
|
||||||
245: 177e00000
|
|
||||||
246: 177e00000
|
|
||||||
247: 177e00000
|
|
||||||
248: 187c00001
|
|
||||||
249: 107c00001
|
|
||||||
250: 177e00000
|
|
||||||
251: 177e00000
|
|
||||||
252: 177e00000
|
|
||||||
253: 177e00000
|
|
||||||
254: 177e00000
|
|
||||||
255: 177e00000
|
|
||||||
256: 177e00000
|
|
||||||
257: 177e00000
|
|
||||||
258: 177e00000
|
|
||||||
259: 177e00000
|
|
||||||
260: 177e00000
|
|
||||||
261: 177e00000
|
|
||||||
262: 177e00000
|
|
||||||
263: 177e00000
|
|
||||||
264: 11fc00000
|
|
||||||
265: 11fc00000
|
|
||||||
266: 177e00000
|
|
||||||
267: 177e00000
|
|
||||||
268: 177e00000
|
|
||||||
269: 1c3040000
|
|
||||||
270: 177e00000
|
|
||||||
271: 177e00000
|
|
||||||
272: 177e00000
|
|
||||||
273: 177e00000
|
|
||||||
274: 177e00000
|
|
||||||
275: 177e00000
|
|
||||||
276: 177e00000
|
|
||||||
277: 177e00000
|
|
||||||
278: 177e00000
|
|
||||||
279: 177e00000
|
|
||||||
280: 187c00001
|
|
||||||
281: 107c00001
|
|
||||||
282: 177e00000
|
|
||||||
283: 177e00000
|
|
||||||
284: 177e00000
|
|
||||||
285: 177e00000
|
|
||||||
286: 177e00000
|
|
||||||
287: 177e00000
|
|
||||||
*******KERNEl*********
|
|
||||||
0: 177e00000
|
|
||||||
1: 177e00000
|
|
||||||
2: 177e00000
|
|
||||||
3: 177e00000
|
|
||||||
4: 177e00000
|
|
||||||
5: 177e00000
|
|
||||||
6: 177e00000
|
|
||||||
7: 177e00000
|
|
||||||
8: 11fc00000
|
|
||||||
9: 11fc00000
|
|
||||||
10: 177e00000
|
|
||||||
11: 177e00000
|
|
||||||
12: 177e00000
|
|
||||||
13: 1c3040000
|
|
||||||
14: 177e00000
|
|
||||||
15: 177e00000
|
|
||||||
16: 177e00000
|
|
||||||
17: 177e00000
|
|
||||||
18: 177e00000
|
|
||||||
19: 177e00000
|
|
||||||
20: 177e00000
|
|
||||||
21: 177e00000
|
|
||||||
22: 177e00000
|
|
||||||
23: 177e00000
|
|
||||||
24: 187c00001
|
|
||||||
25: 107c00001
|
|
||||||
26: 177e00000
|
|
||||||
27: 177e00000
|
|
||||||
28: 177e00000
|
|
||||||
29: 177e00000
|
|
||||||
30: 177e00000
|
|
||||||
31: 177e00000
|
|
||||||
*******EPILOG*********
|
|
||||||
0: 177e00000
|
|
||||||
1: 177e00000
|
|
||||||
2: 177e00000
|
|
||||||
3: 177e00000
|
|
||||||
4: 177e00000
|
|
||||||
5: 177e00000
|
|
||||||
6: 177e00000
|
|
||||||
7: 177e00000
|
|
||||||
8: 177e00000
|
|
||||||
9: 177e00000
|
|
||||||
10: 177e00000
|
|
||||||
11: 177e00000
|
|
||||||
12: 177e00000
|
|
||||||
13: 1c3040000
|
|
||||||
14: 177e00000
|
|
||||||
15: 177e00000
|
|
||||||
16: 177e00000
|
|
||||||
17: 177e00000
|
|
||||||
18: 177e00000
|
|
||||||
19: 177e00000
|
|
||||||
20: 177e00000
|
|
||||||
21: 177e00000
|
|
||||||
22: 177e00000
|
|
||||||
23: 177e00000
|
|
||||||
24: 107c01000
|
|
||||||
25: 177e00000
|
|
||||||
26: 168c02004
|
|
||||||
27: 177e00000
|
|
||||||
28: 177e00000
|
|
||||||
29: 177e00000
|
|
||||||
30: 177e00000
|
|
||||||
31: 177e00000
|
|
||||||
|
|
@ -1,41 +0,0 @@
|
||||||
Mapping has started
|
|
||||||
Operating mode:3
|
|
||||||
Starting II: 2 rec_MII: 2
|
|
||||||
node_set size: 5
|
|
||||||
Node: 2
|
|
||||||
|
|
||||||
Node: 2 type:4 ASAP: 1 ALAP:2 random try_time: 1
|
|
||||||
Node: 1
|
|
||||||
|
|
||||||
Node: 1 type:29 ASAP: 0 ALAP:0 random try_time: 0
|
|
||||||
Node: 4
|
|
||||||
|
|
||||||
Node: 4 type:10 ASAP: 2 ALAP:3 random try_time: 2
|
|
||||||
Node: 3
|
|
||||||
|
|
||||||
Node: 3 type:0 ASAP: 1 ALAP:1 random try_time: 1
|
|
||||||
Node: 0
|
|
||||||
|
|
||||||
Node: 0 type:29 ASAP: 0 ALAP:0 random try_time: 0
|
|
||||||
Feasible II is 2 Schedule Len is 4
|
|
||||||
Node: 0 ASAP: 0 ALAP: 0 is init: 1 sched @ 0 mod: 0
|
|
||||||
Node: 1 ASAP: 0 ALAP: 0 is init: 1 sched @ 0 mod: 0
|
|
||||||
Node: 2 ASAP: 1 ALAP: 2 is init: 1 sched @ 1 mod: 1
|
|
||||||
Node: 3 ASAP: 1 ALAP: 1 is init: 1 sched @ 1 mod: 1
|
|
||||||
Node: 4 ASAP: 2 ALAP: 3 is init: 1 sched @ 2 mod: 0
|
|
||||||
Left Nodes Are: 0
|
|
||||||
Left Nodes Are: 1
|
|
||||||
Left Nodes Are: 2
|
|
||||||
K : 1
|
|
||||||
distance: 1
|
|
||||||
adding nodes between: 2-->1
|
|
||||||
Left Nodes Are: 3
|
|
||||||
K : 1
|
|
||||||
distance: 1
|
|
||||||
adding nodes between: 3-->0
|
|
||||||
Successfully inserted routing nodes to the scheduled DFG.
|
|
||||||
attempt=0
|
|
||||||
rec_MII=0 resMII=1 II:2
|
|
||||||
Start Placement for II = 2
|
|
||||||
MII = 2 Current II=2
|
|
||||||
Mapping is completed and successfull
|
|
||||||
|
|
@ -1,17 +0,0 @@
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
4
|
|
||||||
-1
|
|
||||||
-1
|
|
||||||
16
|
|
||||||
Binary file not shown.
|
|
@ -1,8 +0,0 @@
|
||||||
0 29 1
|
|
||||||
1 29 1
|
|
||||||
2 4 1
|
|
||||||
3 0 1
|
|
||||||
4 10 1
|
|
||||||
5 30 1
|
|
||||||
6 30 1
|
|
||||||
7 30 1
|
|
||||||
|
|
@ -1,20 +0,0 @@
|
||||||
digraph iso_graph {
|
|
||||||
{
|
|
||||||
0 [color=red ];
|
|
||||||
|
|
||||||
1 [color=red ];
|
|
||||||
|
|
||||||
2 [color=red ];
|
|
||||||
|
|
||||||
3 [color=red ];
|
|
||||||
|
|
||||||
4 [color=red ];
|
|
||||||
3 -> 0 [style=bold, color=red, label=1]
|
|
||||||
2 -> 1 [style=bold, color=red, label=1]
|
|
||||||
1 -> 2
|
|
||||||
0 -> 3
|
|
||||||
3 -> 4
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
@ -1,33 +0,0 @@
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
1 0 0
|
|
||||||
0 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
4 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
2 0 1
|
|
||||||
3 0 1
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
-1 0 0
|
|
||||||
32
|
|
||||||
|
|
@ -1 +0,0 @@
|
||||||
-3
|
|
||||||
Binary file not shown.
|
|
@ -1,3 +0,0 @@
|
||||||
108 109 0 LRE 0
|
|
||||||
109 4 0 TRU 1
|
|
||||||
7 108 0 TRU 0
|
|
||||||
|
|
@ -1,4 +0,0 @@
|
||||||
4 10 4 1
|
|
||||||
7 30 gVar6 1
|
|
||||||
108 19 ld_add_gVar6 1
|
|
||||||
109 20 ld_data_gVar6 1
|
|
||||||
|
|
@ -1,3 +0,0 @@
|
||||||
111 112 0 SRE 0
|
|
||||||
2 112 0 TRU 0
|
|
||||||
110 112 0 TRU 1
|
|
||||||
|
|
@ -1,4 +0,0 @@
|
||||||
2 4 2 0 1
|
|
||||||
110 30 gVar7 0 1
|
|
||||||
111 21 st_add_gVar7 4 1
|
|
||||||
112 22 st_data_gVar7 0 1
|
|
||||||
|
|
@ -1 +0,0 @@
|
||||||
16
|
|
||||||
|
|
@ -1,10 +0,0 @@
|
||||||
3 0 1 TRU 0
|
|
||||||
5 0 0 TRU 1
|
|
||||||
2 1 1 TRU 0
|
|
||||||
6 1 0 TRU 1
|
|
||||||
1 2 0 TRU 0
|
|
||||||
5 2 0 TRU 1
|
|
||||||
0 3 0 TRU 0
|
|
||||||
5 3 0 TRU 1
|
|
||||||
3 4 0 TRU 0
|
|
||||||
7 4 0 LIE 1
|
|
||||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue