rdma cmplt compiling, pid hash.
This commit is contained in:
parent
24eae14790
commit
789214db94
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@ -330,6 +330,7 @@ extern long int eost;
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#define PR_BATCH_SIZE (2 * 1024 * 1024)
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#define USER_HASH_TABLE_ORDER 8
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#define PID_HASH_TABLE_ORDER 8
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/* PID */
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#define N_CPID_MAX 64
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@ -531,7 +532,7 @@ struct xdma_engine {
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/* Inode */
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struct cid_entry {
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struct hlist_node entry;
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uint64_t ino;
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pid_t pid;
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int32_t cpid;
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};
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@ -556,7 +557,8 @@ struct pr_pages {
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struct page **pages;
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};
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extern struct hlist_head cid_map[MAX_N_REGIONS][1 << (USER_HASH_TABLE_ORDER)]; // cid mapping
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/* PID tables */
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extern struct hlist_head pid_cpid_map[MAX_N_REGIONS][1 << (PID_HASH_TABLE_ORDER)];
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/* User tables */
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extern struct hlist_head user_lbuff_map[MAX_N_REGIONS][1 << (USER_HASH_TABLE_ORDER)]; // large alloc
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@ -443,7 +443,7 @@ int init_fpga_devices(struct bus_drvdata *d)
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d->fpga_dev[i].cdev.ops = &fpga_fops;
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// Init hash
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hash_init(cid_map[i]);
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hash_init(pid_cpid_map[i]);
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hash_init(user_lbuff_map[i]);
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hash_init(user_sbuff_map[i]);
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@ -36,7 +36,7 @@
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|_|
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*/
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struct hlist_head cid_map[MAX_N_REGIONS][1 << (USER_HASH_TABLE_ORDER)]; // cid mapping
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struct hlist_head pid_cpid_map[MAX_N_REGIONS][1 << (USER_HASH_TABLE_ORDER)]; // cid mapping
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/**
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* @brief Acquire a region
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@ -63,19 +63,19 @@ int fpga_open(struct inode *inode, struct file *file)
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*/
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int fpga_release(struct inode *inode, struct file *file)
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{
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uint64_t ino;
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int32_t cpid;
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struct cid_entry *tmp_cid;
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pid_t pid;
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int minor = iminor(inode);
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struct fpga_dev *d = container_of(inode->i_cdev, struct fpga_dev, cdev);
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BUG_ON(!d);
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ino = inode->i_ino;
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pid = current->pid;
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hash_for_each_possible(cid_map[d->id], tmp_cid, entry, ino) {
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if(tmp_cid->ino == ino) {
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hash_for_each_possible(pid_cpid_map[d->id], tmp_cid, entry, pid) {
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if(tmp_cid->pid == pid) {
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cpid = tmp_cid->cpid;
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// unamp all leftover user pages
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@ -129,6 +129,7 @@ long fpga_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
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int ret_val, i;
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uint64_t tmp[MAX_USER_WORDS];
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uint64_t cpid;
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pid_t pid;
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struct cid_entry *tmp_cid;
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struct fpga_dev *d = (struct fpga_dev *)file->private_data;
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@ -224,37 +225,32 @@ long fpga_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
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// register pid
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case IOCTL_REGISTER_PID:
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// read pid
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ret_val = copy_from_user(&tmp, (unsigned long *)arg, sizeof(unsigned long));
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if (ret_val != 0) {
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pr_info("user data could not be coppied, return %d\n", ret_val);
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spin_lock(&pd->stat_lock);
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pid = current->pid;
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cpid = (uint64_t)register_pid(d, pid);
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if (cpid == -1)
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{
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dbg_info("registration failed pid %d\n", pid);
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return -1;
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}
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else {
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spin_lock(&pd->stat_lock);
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cpid = (uint64_t)register_pid(d, tmp[0]); // tmp[0] - pid
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if (cpid == -1)
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{
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dbg_info("registration failed pid %lld\n", tmp[0]);
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return -1;
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}
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dbg_info("registration succeeded pid %d, cpid %lld\n", pid, cpid);
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dbg_info("registration succeeded pid %lld, cpid %lld\n", tmp[0], cpid);
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tmp_cid = kzalloc(sizeof(struct cid_entry), GFP_KERNEL);
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BUG_ON(!tmp_cid);
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// inode
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tmp_cid = kzalloc(sizeof(struct cid_entry), GFP_KERNEL);
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BUG_ON(!tmp_cid);
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tmp_cid->pid = pid;
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tmp_cid->cpid = cpid;
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tmp_cid->ino = file->f_path.dentry->d_inode->i_ino;
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tmp_cid->cpid = cpid;
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hash_add(pid_cpid_map[d->id], &tmp_cid->entry, pid);
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hash_add(cid_map[d->id], &tmp_cid->entry, tmp_cid->ino);
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// return cpid
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ret_val = copy_to_user((unsigned long *)arg + 1, &cpid, sizeof(unsigned long));
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// return cpid
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ret_val = copy_to_user((unsigned long *)arg + 1, &cpid, sizeof(unsigned long));
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spin_unlock(&pd->stat_lock);
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spin_unlock(&pd->stat_lock);
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}
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break;
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// unregister pid
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@ -267,15 +263,24 @@ long fpga_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
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else {
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spin_lock(&pd->stat_lock);
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ret_val = unregister_pid(d, tmp[0]); // tmp[0] - cpid
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cpid = tmp[0];
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pid = d->pid_array[cpid];
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ret_val = unregister_pid(d, cpid); // tmp[0] - cpid
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if (ret_val == -1) {
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dbg_info("unregistration failed cpid %lld\n", tmp[0]);
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dbg_info("unregistration failed cpid %lld\n", cpid);
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return -1;
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}
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// inode
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hash_for_each_possible(cid_map[d->id], tmp_cid, entry, file->f_path.dentry->d_inode->i_ino) {
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if(tmp_cid->ino == file->f_path.dentry->d_inode->i_ino && tmp_cid->cpid == tmp[0]) {
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// map
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hash_for_each_possible(pid_cpid_map[d->id], tmp_cid, entry, pid) {
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if(tmp_cid->pid == pid && tmp_cid->cpid == cpid) {
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// unamp all leftover user pages
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tlb_put_user_pages_cpid(d, cpid, 1);
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// unregister (if registered)
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unregister_pid(d, cpid);
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// Free from hash
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hash_del(&tmp_cid->entry);
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}
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@ -173,9 +173,7 @@ ssize_t cyt_attr_nstats_q0_show(struct kobject *kobj, struct kobj_attribute *att
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pr_info("coyote-sysfs: net stats QSFP0\n");
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return sprintf(buf, "\n -- \033[31m\e[1mNET STATS\033[0m\e[0m QSFP0\n\n"
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"RX words: %lld\n"
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"RX pkgs: %lld\n"
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"TX words: %lld\n"
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"TX pkgs: %lld\n"
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"ARP RX pkgs: %lld\n"
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"ARP TX pkgs: %lld\n"
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@ -187,10 +185,10 @@ ssize_t cyt_attr_nstats_q0_show(struct kobject *kobj, struct kobj_attribute *att
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"ROCE TX pkgs: %lld\n"
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"IBV RX pkgs: %lld\n"
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"IBV TX pkgs: %lld\n"
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"CRC drop cnt: %lld\n"
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"PSN drop cnt: %lld\n"
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"Retrans cnt: %lld\n"
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"TCP session cnt: %lld\n"
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"STRM down cnt: %lld\n\n",
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"STRM down: %lld\n\n",
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LOW_32 (pd->fpga_stat_cnfg->net_0_debug[0]),
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HIGH_32(pd->fpga_stat_cnfg->net_0_debug[0]),
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@ -207,9 +205,7 @@ ssize_t cyt_attr_nstats_q0_show(struct kobject *kobj, struct kobj_attribute *att
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LOW_32 (pd->fpga_stat_cnfg->net_0_debug[6]),
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HIGH_32(pd->fpga_stat_cnfg->net_0_debug[6]),
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LOW_32 (pd->fpga_stat_cnfg->net_0_debug[7]),
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HIGH_32(pd->fpga_stat_cnfg->net_0_debug[7]),
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LOW_32 (pd->fpga_stat_cnfg->net_0_debug[8]),
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LOW_32 (pd->fpga_stat_cnfg->net_0_debug[9])
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LOW_32 (pd->fpga_stat_cnfg->net_0_debug[8])
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);
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}
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@ -223,9 +219,7 @@ ssize_t cyt_attr_nstats_q1_show(struct kobject *kobj, struct kobj_attribute *att
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pr_info("coyote-sysfs: net stats QSFP1\n");
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return sprintf(buf, "\n -- \033[31m\e[1mNET STATS\033[0m\e[0m QSFP1\n\n"
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"RX words: %lld\n"
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"RX pkgs: %lld\n"
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"TX words: %lld\n"
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"TX pkgs: %lld\n"
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"ARP RX pkgs: %lld\n"
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"ARP TX pkgs: %lld\n"
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"ROCE TX pkgs: %lld\n"
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"IBV RX pkgs: %lld\n"
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"IBV TX pkgs: %lld\n"
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"CRC drop cnt: %lld\n"
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"PSN drop cnt: %lld\n"
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"Retrans cnt: %lld\n"
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"TCP session cnt: %lld\n"
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"STRM down cnt: %lld\n\n",
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"STRM down: %lld\n\n",
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LOW_32 (pd->fpga_stat_cnfg->net_1_debug[0]),
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HIGH_32(pd->fpga_stat_cnfg->net_1_debug[0]),
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LOW_32 (pd->fpga_stat_cnfg->net_1_debug[6]),
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HIGH_32(pd->fpga_stat_cnfg->net_1_debug[6]),
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LOW_32 (pd->fpga_stat_cnfg->net_1_debug[7]),
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HIGH_32(pd->fpga_stat_cnfg->net_1_debug[7]),
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LOW_32 (pd->fpga_stat_cnfg->net_1_debug[8]),
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LOW_32 (pd->fpga_stat_cnfg->net_1_debug[9])
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LOW_32 (pd->fpga_stat_cnfg->net_1_debug[8])
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);
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}
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@ -4,7 +4,11 @@
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## General
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# Max supported regions (could be more if really needed with a bit of hacking)
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# Max supported regions
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set(MULT_REGIONS 0)
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if(N_REGIONS GREATER 1)
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set(MULT_REGIONS 1)
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endif()
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if(N_REGIONS GREATER 15)
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message(FATAL_ERROR "Max 15 regions supported.")
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endif()
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@ -165,6 +169,11 @@ if(DDR_AUTO)
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endif()
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endif()
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set(MULT_DDR_CHAN 0)
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if(N_DDR_CHAN GREATER 1)
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set(MULT_DDR_CHAN 1)
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endif()
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# Compare for mismatch
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if(EN_DCARD)
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MATH(EXPR N_DDRS "${DDR_0}+${DDR_1}+${DDR_2}+${DDR_3}")
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@ -231,9 +240,13 @@ endif()
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# Channel designators
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set(NN 0)
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set(MULT_STRM_AXI 0)
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if(EN_STRM)
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set(STRM_CHAN ${NN})
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MATH(EXPR NN "${NN}+1")
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if(N_STRM_AXI GREATER 1)
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set(MULT_STRM_AXI 1)
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endif()
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else()
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set(STRM_CHAN -1)
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endif()
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@ -42,9 +42,7 @@ module rdma_req_parser #(
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input logic aresetn,
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metaIntf.s s_req,
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metaIntf.m m_req,
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output logic [31:0] used
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metaIntf.m m_req
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);
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// FSM
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@ -110,17 +108,7 @@ ila_req_parser inst_ila_parser (
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);
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// Decoupling
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axis_data_fifo_cnfg_rdma_512 inst_cmd_queue_in (
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.s_axis_aresetn(aresetn),
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.s_axis_aclk(aclk),
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.s_axis_tvalid(s_req.valid),
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.s_axis_tready(s_req.ready),
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.s_axis_tdata(s_req.data),
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.m_axis_tvalid(req_pre_parsed.valid),
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.m_axis_tready(req_pre_parsed.ready),
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.m_axis_tdata(req_pre_parsed.data),
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.axis_wr_data_count(used)
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);
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`META_ASSIGN(s_req, req_pre_parsed)
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logic [31:0] queue_used_out;
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@ -275,6 +263,7 @@ always_comb begin: DP
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req_parsed.data.last = plast_C;
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req_parsed.data.cmplt = cmplt_C;
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req_parsed.data.ssn = ssn_C;
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req_parsed.data.offs = 0;
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req_parsed.data.msg[RDMA_LVADDR_OFFS+:RDMA_VADDR_BITS] = plvaddr_C;
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req_parsed.data.msg[RDMA_RVADDR_OFFS+:RDMA_VADDR_BITS] = prvaddr_C;
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req_parsed.data.msg[RDMA_LEN_OFFS+:RDMA_LEN_BITS] = plen_C;
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@ -89,12 +89,11 @@ always_comb begin
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rdma_sq_data[32+:RDMA_QPN_BITS] = rdma_sq.data.qpn;
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rdma_sq_data[32+RDMA_QPN_BITS+0+:1] = rdma_sq.data.host;
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rdma_sq_data[32+RDMA_QPN_BITS+2+:1] = rdma_sq.data.last;
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rdma_sq_data[32+RDMA_QPN_BITS+1+:1] = rdma_sq.data.last;
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rdma_sq_data[32+RDMA_QPN_BITS+4+:RDMA_MSN_BITS] = rdma_sq.data.ssn;
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rdma_sq_data[32+RDMA_QPN_BITS+4+RDMA_MSN_BITS+:RDMA_OFFS_BITS] = rdma_sq.data.offs;
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rdma_sq_data[32+RDMA_QPN_BITS+2+:RDMA_OFFS_BITS] = rdma_sq.data.offs;
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rdma_sq_data[32+RDMA_QPN_BITS+4+RDMA_MSN_BITS+RDMA_OFFS_BITS+:RDMA_MSG_BITS] = rdma_sq.data.msg;
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rdma_sq_data[32+RDMA_QPN_BITS+2+RDMA_OFFS_BITS+:RDMA_MSG_BITS] = rdma_sq.data.msg;
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`else
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rdma_sq_data = 0;
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@ -82,7 +82,7 @@ if(ENABLED == 1) begin
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// Crossings
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//
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axis_data_fifo_net_ccross_512 inst_cross_ns_nr (
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axis_data_fifo_net_ccross_early_512 inst_cross_ns_nr (
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.m_axis_aclk(rclk),
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.s_axis_aclk(nclk),
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.s_axis_aresetn(nresetn_reg),
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@ -98,7 +98,7 @@ if(ENABLED == 1) begin
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.m_axis_tlast(m_axis_rclk_int.tlast)
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);
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axis_data_fifo_net_ccross_512 inst_cross_nr_ns (
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axis_data_fifo_net_ccross_early_512 inst_cross_nr_ns (
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.m_axis_aclk(nclk),
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.s_axis_aclk(rclk),
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.s_axis_aresetn(rresetn_reg),
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@ -139,7 +139,7 @@ if(ENABLED == 1) begin
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`ifdef EN_STATS
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// Stats
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axis_clock_converter_net_608 inst_ccross_qp_interface (
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axis_clock_converter_net_512 inst_ccross_qp_interface (
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.s_axis_aresetn(nresetn),
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.m_axis_aresetn(aresetn),
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.s_axis_aclk(nclk),
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@ -255,7 +255,7 @@ else begin
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`ifdef EN_STATS
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// Stats
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axis_register_slice_net_608 inst_reg_net_stats (
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axis_register_slice_net_512 inst_reg_net_stats (
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.aclk(aclk),
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.aresetn(aresetn),
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.s_axis_tvalid(1'b1),
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@ -120,7 +120,7 @@ module network_slice (
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`ifdef EN_STATS
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// Stats
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axis_register_slice_net_608 inst_reg_net_stats (
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axis_register_slice_net_512 inst_reg_net_stats (
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.aclk(aclk),
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.aresetn(aresetn),
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.s_axis_tvalid(1'b1),
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@ -161,7 +161,7 @@ for(genvar i = 0; i < N_STAGES; i++) begin
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`ifdef EN_STATS
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// ARP reply
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axis_register_slice_net_608 (
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axis_register_slice_net_512 (
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.aclk(aclk),
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.aresetn(aresetn),
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.s_axis_tvalid(1'b1),
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@ -860,13 +860,12 @@ end
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logic[31:0] roce_tx_pkg_counter;
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logic[31:0] roce_retrans_counter;
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logic[31:0] axis_stream_down_counter;
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logic[15:0] axis_stream_down_counter;
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logic axis_stream_down;
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net_stat_t[NET_STATS_DELAY-1:0] net_stats_tmp; // Slice
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assign net_stats_tmp[0].rx_word_counter = rx_word_counter;
|
||||
assign net_stats_tmp[0].rx_pkg_counter = rx_pkg_counter;
|
||||
assign net_stats_tmp[0].tx_word_counter = tx_word_counter;
|
||||
assign net_stats_tmp[0].tx_pkg_counter = tx_pkg_counter;
|
||||
assign net_stats_tmp[0].arp_rx_pkg_counter = arp_rx_pkg_counter;
|
||||
assign net_stats_tmp[0].arp_tx_pkg_counter = arp_tx_pkg_counter;
|
||||
|
@ -874,15 +873,14 @@ end
|
|||
assign net_stats_tmp[0].icmp_tx_pkg_counter = icmp_tx_pkg_counter;
|
||||
assign net_stats_tmp[0].tcp_rx_pkg_counter = tcp_rx_pkg_counter;
|
||||
assign net_stats_tmp[0].tcp_tx_pkg_counter = tcp_tx_pkg_counter;
|
||||
assign net_stats_tmp[0].tcp_session_counter = session_count_data;
|
||||
assign net_stats_tmp[0].roce_rx_pkg_counter = roce_rx_pkg_counter;
|
||||
assign net_stats_tmp[0].roce_tx_pkg_counter = roce_tx_pkg_counter;
|
||||
assign net_stats_tmp[0].ibv_rx_pkg_counter = regIbvRxPkgCount;
|
||||
assign net_stats_tmp[0].ibv_tx_pkg_counter = regIbvTxPkgCount;
|
||||
assign net_stats_tmp[0].roce_crc_drop_counter = regCrcDropPkgCount;
|
||||
assign net_stats_tmp[0].roce_psn_drop_counter = regInvalidPsnDropCount;
|
||||
assign net_stats_tmp[0].roce_retrans_counter = regRetransCount;
|
||||
assign net_stats_tmp[0].axis_stream_down_counter = axis_stream_down_counter;
|
||||
assign net_stats_tmp[0].tcp_session_counter = session_count_data;
|
||||
assign net_stats_tmp[0].axis_stream_down = axis_stream_down;
|
||||
|
||||
assign m_net_stats = net_stats_tmp[NET_STATS_DELAY-1];
|
||||
|
||||
|
@ -904,6 +902,7 @@ end
|
|||
roce_tx_pkg_counter <= '0;
|
||||
|
||||
axis_stream_down_counter <= '0;
|
||||
axis_stream_down <= 1'b0;
|
||||
end
|
||||
|
||||
// Reg the stats
|
||||
|
@ -978,8 +977,9 @@ end
|
|||
axis_stream_down_counter <= '0;
|
||||
end
|
||||
if (s_axis_net.tvalid && ~s_axis_net.tready) begin
|
||||
axis_stream_down_counter <= axis_stream_down_counter + 1;
|
||||
axis_stream_down_counter <= (axis_stream_down_counter == NET_STRM_DOWN_THRS) ? axis_stream_down_counter : axis_stream_down_counter + 1;
|
||||
end
|
||||
axis_stream_down <= (axis_stream_down_counter == NET_STRM_DOWN_THRS);
|
||||
|
||||
end
|
||||
|
||||
|
|
|
@ -145,7 +145,7 @@ module static_slave (
|
|||
// ------------------------------------------------------------------
|
||||
|
||||
// Constants
|
||||
localparam integer N_REGS = 128;
|
||||
localparam integer N_REGS = 160;
|
||||
localparam integer ADDR_LSB = $clog2(AXIL_DATA_BITS/8);
|
||||
localparam integer ADDR_MSB = $clog2(N_REGS);
|
||||
localparam integer AXIL_ADDR_BITS = ADDR_LSB + ADDR_MSB;
|
||||
|
@ -316,28 +316,27 @@ localparam integer XDMA_STAT_2_AXIS = 72;
|
|||
localparam integer XDMA_STAT_3_BPSS = 73;
|
||||
localparam integer XDMA_STAT_3_CMPL = 74;
|
||||
localparam integer XDMA_STAT_3_AXIS = 75;
|
||||
// NET STATS
|
||||
localparam integer NET_STAT_0_RX_REG = 96;
|
||||
localparam integer NET_STAT_0_TX_REG = 97;
|
||||
localparam integer NET_STAT_0_ARP_REG = 98;
|
||||
localparam integer NET_STAT_0_ICMP_REG = 99;
|
||||
localparam integer NET_STAT_0_TCP_REG = 100;
|
||||
localparam integer NET_STAT_0_RDMA_REG = 101;
|
||||
localparam integer NET_STAT_0_IBV_REG = 102;
|
||||
localparam integer NET_STAT_0_DROP_REG = 103;
|
||||
localparam integer NET_STAT_0_SESS_REG = 104;
|
||||
localparam integer NET_STAT_0_DOWN_REG = 105;
|
||||
|
||||
localparam integer NET_STAT_1_RX_REG = 112;
|
||||
localparam integer NET_STAT_1_TX_REG = 113;
|
||||
localparam integer NET_STAT_1_ARP_REG = 114;
|
||||
localparam integer NET_STAT_1_ICMP_REG = 115;
|
||||
localparam integer NET_STAT_1_TCP_REG = 116;
|
||||
localparam integer NET_STAT_1_RDMA_REG = 117;
|
||||
localparam integer NET_STAT_1_IBV_REG = 118;
|
||||
localparam integer NET_STAT_1_DROP_REG = 119;
|
||||
localparam integer NET_STAT_1_SESS_REG = 120;
|
||||
localparam integer NET_STAT_1_DOWN_REG = 121;
|
||||
// NET STATS
|
||||
localparam integer NET_STAT_0_PKG_REG = 96;
|
||||
localparam integer NET_STAT_0_ARP_REG = 97;
|
||||
localparam integer NET_STAT_0_ICMP_REG = 98;
|
||||
localparam integer NET_STAT_0_TCP_REG = 99;
|
||||
localparam integer NET_STAT_0_RDMA_REG = 100;
|
||||
localparam integer NET_STAT_0_IBV_REG = 101;
|
||||
localparam integer NET_STAT_0_DROP_REG = 102;
|
||||
localparam integer NET_STAT_0_SESS_REG = 103;
|
||||
localparam integer NET_STAT_0_DOWN_REG = 104;
|
||||
|
||||
localparam integer NET_STAT_1_PKG_REG = 128;
|
||||
localparam integer NET_STAT_1_ARP_REG = 129;
|
||||
localparam integer NET_STAT_1_ICMP_REG = 130;
|
||||
localparam integer NET_STAT_1_TCP_REG = 131;
|
||||
localparam integer NET_STAT_1_RDMA_REG = 132;
|
||||
localparam integer NET_STAT_1_IBV_REG = 133;
|
||||
localparam integer NET_STAT_1_DROP_REG = 134;
|
||||
localparam integer NET_STAT_1_SESS_REG = 135;
|
||||
localparam integer NET_STAT_1_DOWN_REG = 136;
|
||||
|
||||
// ----------------------------------------------------------------------------------------
|
||||
// Write process
|
||||
|
@ -883,10 +882,8 @@ always_ff @(posedge aclk) begin
|
|||
`endif
|
||||
|
||||
`ifdef EN_NET_0
|
||||
NET_STAT_0_RX_REG: // rx
|
||||
axi_rdata <= {s_net_stats_0.rx_pkg_counter, s_net_stats_0.rx_word_counter};
|
||||
NET_STAT_0_TX_REG: // tx
|
||||
axi_rdata <= {s_net_stats_0.tx_pkg_counter, s_net_stats_0.tx_word_counter};
|
||||
NET_STAT_0_PKG_REG: // rx and tx
|
||||
axi_rdata <= {s_net_stats_0.tx_pkg_counter, s_net_stats_0.rx_pkg_counter};
|
||||
NET_STAT_0_ARP_REG: // arp
|
||||
axi_rdata <= {s_net_stats_0.arp_tx_pkg_counter, s_net_stats_0.arp_rx_pkg_counter};
|
||||
NET_STAT_0_ICMP_REG: // icmp
|
||||
|
@ -898,18 +895,16 @@ always_ff @(posedge aclk) begin
|
|||
NET_STAT_0_IBV_REG: // ibv
|
||||
axi_rdata <= {s_net_stats_0.ibv_tx_pkg_counter, s_net_stats_0.ibv_rx_pkg_counter};
|
||||
NET_STAT_0_DROP_REG: // rdma drop
|
||||
axi_rdata <= {s_net_stats_0.roce_psn_drop_counter, s_net_stats_0.roce_crc_drop_counter};
|
||||
axi_rdata <= {s_net_stats_0.roce_retrans_counter, s_net_stats_0.roce_psn_drop_counter};
|
||||
NET_STAT_0_SESS_REG: // tcp sessions
|
||||
axi_rdata[31:0] <= s_net_stats_0.tcp_session_counter;
|
||||
NET_STAT_0_DOWN_REG: // rdma
|
||||
axi_rdata <= {s_net_stats_0.roce_retrans_counter, s_net_stats_0.axis_stream_down_counter};
|
||||
axi_rdata[0] <= s_net_stats_0.axis_stream_down;
|
||||
`endif
|
||||
|
||||
`ifdef EN_NET_1
|
||||
NET_STAT_1_RX_REG: // rx
|
||||
axi_rdata <= {s_net_stats_1.rx_pkg_counter, s_net_stats_1.rx_word_counter};
|
||||
NET_STAT_1_TX_REG: // tx
|
||||
axi_rdata <= {s_net_stats_1.tx_pkg_counter, s_net_stats_1.tx_word_counter};
|
||||
NET_STAT_1_PKG_REG: // rx and tx
|
||||
axi_rdata <= {s_net_stats_1.tx_pkg_counter, s_net_stats_1.rx_pkg_counter};
|
||||
NET_STAT_1_ARP_REG: // arp
|
||||
axi_rdata <= {s_net_stats_1.arp_tx_pkg_counter, s_net_stats_1.arp_rx_pkg_counter};
|
||||
NET_STAT_1_ICMP_REG: // icmp
|
||||
|
@ -921,11 +916,11 @@ always_ff @(posedge aclk) begin
|
|||
NET_STAT_1_IBV_REG: // ibv
|
||||
axi_rdata <= {s_net_stats_1.ibv_tx_pkg_counter, s_net_stats_1.ibv_rx_pkg_counter};
|
||||
NET_STAT_1_DROP_REG: // rdma drop
|
||||
axi_rdata <= {s_net_stats_1.roce_psn_drop_counter, s_net_stats_1.roce_crc_drop_counter};
|
||||
axi_rdata <= {s_net_stats_1.roce_retrans_counter, s_net_stats_1.roce_psn_drop_counter};
|
||||
NET_STAT_1_SESS_REG: // tcp sessions
|
||||
axi_rdata[31:0] <= s_net_stats_1.tcp_session_counter;
|
||||
NET_STAT_1_DOWN_REG: // rdma
|
||||
axi_rdata <= {s_net_stats_1.roce_retrans_counter, s_net_stats_1.axis_stream_down_counter};
|
||||
axi_rdata[0] <= s_net_stats_1.axis_stream_down;
|
||||
`endif
|
||||
|
||||
`endif
|
||||
|
|
|
@ -98,6 +98,10 @@ if {$cfg(en_rdma) eq 1} {
|
|||
create_ip -name rocev2 -vendor ethz.systems.fpga -library hls -version 0.82 -module_name rocev2_ip
|
||||
}
|
||||
|
||||
# Cmd
|
||||
create_ip -name axis_data_fifo -vendor xilinx.com -library ip -version 2.0 -module_name axis_data_fifo_req_512_used
|
||||
set_property -dict [list CONFIG.TDATA_NUM_BYTES {64} CONFIG.FIFO_DEPTH {32} CONFIG.HAS_WR_DATA_COUNT {1} ] [get_ips axis_data_fifo_req_512_used]
|
||||
|
||||
## Crossings
|
||||
create_ip -name axis_clock_converter -vendor xilinx.com -library ip -version 1.1 -module_name axis_clock_converter_rdma_16
|
||||
set_property -dict [list CONFIG.TDATA_NUM_BYTES {2} CONFIG.SYNCHRONIZATION_STAGES {4} ] [get_ips axis_clock_converter_rdma_16]
|
||||
|
@ -433,8 +437,8 @@ set_property -dict [list CONFIG.AXI_ADDR_WIDTH {64} CONFIG.INTERCONNECT_DATA_WID
|
|||
## Network top
|
||||
##
|
||||
|
||||
create_ip -name axis_data_fifo -vendor xilinx.com -library ip -version 2.0 -module_name axis_data_fifo_net_ccross_512
|
||||
set_property -dict [list CONFIG.TDATA_NUM_BYTES {64} CONFIG.IS_ACLK_ASYNC {1} CONFIG.FIFO_DEPTH {512} CONFIG.HAS_TKEEP {1} CONFIG.HAS_TLAST {1} ] [get_ips axis_data_fifo_net_ccross_512]
|
||||
create_ip -name axis_data_fifo -vendor xilinx.com -library ip -version 2.0 -module_name axis_data_fifo_net_ccross_early_512
|
||||
set_property -dict [list CONFIG.TDATA_NUM_BYTES {64} CONFIG.IS_ACLK_ASYNC {1} CONFIG.FIFO_DEPTH {512} CONFIG.HAS_TKEEP {1} CONFIG.HAS_TLAST {1} ] [get_ips axis_data_fifo_net_ccross_early_512]
|
||||
|
||||
## Crossings
|
||||
create_ip -name axis_clock_converter -vendor xilinx.com -library ip -version 1.1 -module_name axis_clock_converter_net_8
|
||||
|
@ -449,8 +453,8 @@ set_property -dict [list CONFIG.TDATA_NUM_BYTES {6} CONFIG.SYNCHRONIZATION_STAGE
|
|||
create_ip -name axis_clock_converter -vendor xilinx.com -library ip -version 1.1 -module_name axis_clock_converter_net_56
|
||||
set_property -dict [list CONFIG.TDATA_NUM_BYTES {7} CONFIG.SYNCHRONIZATION_STAGES {4} ] [get_ips axis_clock_converter_net_56]
|
||||
|
||||
create_ip -name axis_clock_converter -vendor xilinx.com -library ip -version 1.1 -module_name axis_clock_converter_net_608
|
||||
set_property -dict [list CONFIG.TDATA_NUM_BYTES {76} CONFIG.SYNCHRONIZATION_STAGES {4} ] [get_ips axis_clock_converter_net_608]
|
||||
create_ip -name axis_clock_converter -vendor xilinx.com -library ip -version 1.1 -module_name axis_clock_converter_net_512
|
||||
set_property -dict [list CONFIG.TDATA_NUM_BYTES {64} CONFIG.SYNCHRONIZATION_STAGES {4} ] [get_ips axis_clock_converter_net_512]
|
||||
|
||||
## Crossings FIFO
|
||||
create_ip -name axis_data_fifo -vendor xilinx.com -library ip -version 2.0 -module_name axis_data_fifo_net_ccross_8
|
||||
|
@ -465,8 +469,8 @@ set_property -dict [list CONFIG.TDATA_NUM_BYTES {6} CONFIG.IS_ACLK_ASYNC {1} CON
|
|||
create_ip -name axis_data_fifo -vendor xilinx.com -library ip -version 2.0 -module_name axis_data_fifo_net_ccross_56
|
||||
set_property -dict [list CONFIG.TDATA_NUM_BYTES {7} CONFIG.IS_ACLK_ASYNC {1} CONFIG.FIFO_DEPTH {32} ] [get_ips axis_data_fifo_net_ccross_56]
|
||||
|
||||
create_ip -name axis_data_fifo -vendor xilinx.com -library ip -version 2.0 -module_name axis_data_fifo_net_ccross_608
|
||||
set_property -dict [list CONFIG.TDATA_NUM_BYTES {76} CONFIG.IS_ACLK_ASYNC {1} CONFIG.FIFO_DEPTH {32} ] [get_ips axis_data_fifo_net_ccross_608]
|
||||
create_ip -name axis_data_fifo -vendor xilinx.com -library ip -version 2.0 -module_name axis_data_fifo_net_ccross_512
|
||||
set_property -dict [list CONFIG.TDATA_NUM_BYTES {64} CONFIG.IS_ACLK_ASYNC {1} CONFIG.FIFO_DEPTH {32} ] [get_ips axis_data_fifo_net_ccross_512]
|
||||
|
||||
## Slicing
|
||||
create_ip -name axis_register_slice -vendor xilinx.com -library ip -version 1.1 -module_name axis_register_slice_net_8
|
||||
|
@ -481,8 +485,8 @@ set_property -dict [list CONFIG.TDATA_NUM_BYTES {6} CONFIG.REG_CONFIG {8} ] [get
|
|||
create_ip -name axis_register_slice -vendor xilinx.com -library ip -version 1.1 -module_name axis_register_slice_net_56
|
||||
set_property -dict [list CONFIG.TDATA_NUM_BYTES {7} CONFIG.REG_CONFIG {8} ] [get_ips axis_register_slice_net_56]
|
||||
|
||||
create_ip -name axis_register_slice -vendor xilinx.com -library ip -version 1.1 -module_name axis_register_slice_net_608
|
||||
set_property -dict [list CONFIG.TDATA_NUM_BYTES {76} CONFIG.REG_CONFIG {8} ] [get_ips axis_register_slice_net_608]
|
||||
create_ip -name axis_register_slice -vendor xilinx.com -library ip -version 1.1 -module_name axis_register_slice_net_512
|
||||
set_property -dict [list CONFIG.TDATA_NUM_BYTES {64} CONFIG.REG_CONFIG {8} ] [get_ips axis_register_slice_net_512]
|
||||
|
||||
## Buffering
|
||||
create_ip -name axis_data_fifo -vendor xilinx.com -library ip -version 2.0 -module_name axis_data_fifo_net_8
|
||||
|
@ -497,8 +501,8 @@ set_property -dict [list CONFIG.TDATA_NUM_BYTES {6} CONFIG.FIFO_DEPTH {32} ] [ge
|
|||
create_ip -name axis_data_fifo -vendor xilinx.com -library ip -version 2.0 -module_name axis_data_fifo_net_56
|
||||
set_property -dict [list CONFIG.TDATA_NUM_BYTES {7} CONFIG.FIFO_DEPTH {32} ] [get_ips axis_data_fifo_net_56]
|
||||
|
||||
create_ip -name axis_data_fifo -vendor xilinx.com -library ip -version 2.0 -module_name axis_data_fifo_net_608
|
||||
set_property -dict [list CONFIG.TDATA_NUM_BYTES {76} CONFIG.FIFO_DEPTH {32} ] [get_ips axis_data_fifo_net_608]
|
||||
create_ip -name axis_data_fifo -vendor xilinx.com -library ip -version 2.0 -module_name axis_data_fifo_net_512
|
||||
set_property -dict [list CONFIG.TDATA_NUM_BYTES {64} CONFIG.FIFO_DEPTH {32} ] [get_ips axis_data_fifo_net_512]
|
||||
|
||||
##
|
||||
## Network stack
|
||||
|
|
|
@ -52,12 +52,6 @@
|
|||
{% if cnfg.en_net %}
|
||||
`define EN_NET
|
||||
{% endif %}
|
||||
{% if cnfg.mult_regions %}
|
||||
`define MULT_REGIONS
|
||||
{% endif %}
|
||||
{% if cnfg.mult_ddr_chan %}
|
||||
`define MULT_DDR_CHAN
|
||||
{% endif %}
|
||||
{% if cnfg.en_aclk %}
|
||||
`define EN_ACLK
|
||||
{% endif %}
|
||||
|
@ -97,9 +91,15 @@
|
|||
{% if cnfg.vit_hls %}
|
||||
`define VITIS_HLS
|
||||
{% endif %}
|
||||
{% if cnfg.mult_regions %}
|
||||
`define MULT_REGIONS
|
||||
{% endif %}
|
||||
{% if cnfg.mult_strm_axi %}
|
||||
`define MULT_STRM_AXI
|
||||
{% endif %}
|
||||
{% if cnfg.mult_ddr_chan %}
|
||||
`define MULT_DDR_CHAN
|
||||
{% endif %}
|
||||
|
||||
package lynxTypes;
|
||||
|
||||
|
@ -188,6 +188,7 @@ package lynxTypes;
|
|||
parameter integer MAC_ADDR_BITS = 48;
|
||||
parameter integer DEF_MAC_ADDRESS = 48'hE59D02350A00; // LSB first, 00:0A:35:02:9D:E5
|
||||
parameter integer DEF_IP_ADDRESS = 32'hD1D4010B; // LSB first, 0B:01:D4:D1
|
||||
parameter integer NET_STRM_DOWN_THRS = 256;
|
||||
|
||||
// Network RDMA
|
||||
parameter integer APP_READ = 0;
|
||||
|
@ -195,6 +196,9 @@ package lynxTypes;
|
|||
parameter integer APP_SEND = 2;
|
||||
parameter integer APP_IMMED = 3;
|
||||
|
||||
parameter integer RC_SEND_FIRST = 5'h0;
|
||||
parameter integer RC_SEND_MIDDLE = 5'h1;
|
||||
parameter integer RC_SEND_LAST = 5'h2;
|
||||
parameter integer RC_SEND_ONLY = 5'h4;
|
||||
parameter integer RC_RDMA_WRITE_FIRST = 5'h6;
|
||||
parameter integer RC_RDMA_WRITE_MIDDLE = 5'h7;
|
||||
|
@ -229,6 +233,7 @@ package lynxTypes;
|
|||
parameter integer RDMA_LEN_OFFS = 2*RDMA_VADDR_BITS;
|
||||
parameter integer RDMA_PARAMS_OFFS = 2*RDMA_VADDR_BITS + RDMA_LEN_BITS;
|
||||
parameter integer RDMA_MSN_BITS = 24;
|
||||
parameter integer RDMA_OFFS_BITS = 4;
|
||||
parameter integer RDMA_SNDRM_BITS = 8;
|
||||
parameter integer RDMA_MAX_OUTSTANDING = 32;
|
||||
parameter integer RDMA_MODE_PARSE = 0;
|
||||
|
@ -374,15 +379,19 @@ package lynxTypes;
|
|||
logic host;
|
||||
logic mode;
|
||||
logic last;
|
||||
logic cmplt;
|
||||
logic [RDMA_MSN_BITS-1:0] ssn;
|
||||
logic [RDMA_OFFS_BITS-1:0] offs;
|
||||
logic [RDMA_MSG_BITS-1:0] msg;
|
||||
logic [RDMA_REQ_BITS-RDMA_MSG_BITS-3-RDMA_QPN_BITS-RDMA_OPCODE_BITS-1:0] rsrvd;
|
||||
} rdma_req_t;
|
||||
|
||||
typedef struct packed {
|
||||
logic rd;
|
||||
logic cmplt;
|
||||
logic [PID_BITS-1:0] pid;
|
||||
logic [DEST_BITS-1:0] vfid;
|
||||
logic [RDMA_ACK_MSN_BITS-1:0] psn;
|
||||
logic [RDMA_ACK_MSN_BITS-1:0] ssn;
|
||||
} rdma_ack_t;
|
||||
|
||||
typedef struct packed {
|
||||
|
@ -450,9 +459,7 @@ package lynxTypes;
|
|||
} xdma_stat_t;
|
||||
|
||||
typedef struct packed {
|
||||
logic [31:0] rx_word_counter;
|
||||
logic [31:0] rx_pkg_counter;
|
||||
logic [31:0] tx_word_counter;
|
||||
logic [31:0] tx_pkg_counter;
|
||||
logic [31:0] arp_rx_pkg_counter;
|
||||
logic [31:0] arp_tx_pkg_counter;
|
||||
|
@ -464,10 +471,9 @@ package lynxTypes;
|
|||
logic [31:0] roce_tx_pkg_counter;
|
||||
logic [31:0] ibv_rx_pkg_counter;
|
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logic [31:0] ibv_tx_pkg_counter;
|
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logic [31:0] roce_crc_drop_counter;
|
||||
logic [31:0] roce_psn_drop_counter;
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logic [31:0] roce_retrans_counter;
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logic [15:0] tcp_session_counter;
|
||||
logic [7:0] axis_stream_down_counter;
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logic axis_stream_down;
|
||||
} net_stat_t;
|
||||
|
||||
|
|
Loading…
Reference in New Issue