1f4b84637f | ||
---|---|---|
abclib | ||
benchmark | ||
include | ||
lib | ||
source | ||
.gitignore | ||
LICENSE | ||
Makefile | ||
README.md |
README.md
Overview
A framework for dual-output LUT mapping.
How To Use
Clone project:
git clone https://github.com/pkuzjx/dom-fpga.git
cd dom-fpga
Compile the abc library : lib/libabc.a by https://github.com/berkeley-abc/abc ,and overwrite libabc.a.
-L./lib/ -labc
set ./lib/ to your libabc.a file location
Get bin DOLM
mkdir object
mkdir result
cd result
mkdir EPFL
mkdir ISACAS85
mkdir IWLS93
mkdir LGSynth91
cd ..
mkdir bin
make
Run an exmaple ./bin/DOLM [benchamrk set] [benchmark name]
./bin/DOLM EPFL adder
Get result
*.blif_abc_lut.blif.out is the answer of berkeley-abc
*.blif.out1 is the single-output result
*.blif.out2 is the dual-output result
reference:
@inproceedings{wang2020dual,
title={Dual-Output LUT Merging during FPGA Technology Mapping},
author={Wang, Feng and Zhu, Liren and Zhang, Jiaxi and Li, Lei and Zhang, Yang and Luo, Guojie},
booktitle=ICCAD,
pages={1--9},
year={2020},
organization={IEEE}
}