Commit Graph

26 Commits

Author SHA1 Message Date
Guojie Luo 0a7c7f7721 Add license statement in source files 2023-01-09 15:26:50 +00:00
PKU-ZLR e2423ad8d8 Upload local refinement 2021-10-14 21:32:43 +08:00
PKU-ZLR e1be1757df Add files via upload 2020-03-22 11:52:57 +08:00
Feng Wang 080617a8c8 add debug information 2020-03-02 16:34:58 +08:00
PKU-ZLR 40563c2353 Add files via upload 2020-02-29 22:27:05 +08:00
Feng Wang 7e41738078 implement 2-input LUT mapping. Decomposition failed! 2020-02-27 00:28:59 +08:00
PKU-ZLR ea91c35dba Upload Circuit.h 2020-02-26 23:13:18 +08:00
Feng Wang 5f62f443bb 2LUT.lutlib has a bug 2020-02-26 15:13:14 +08:00
PKU-ZLR 74a3018d86 Add files via upload 2020-02-25 11:36:04 +08:00
Feng Wang fb2543d92d add LUT2 mapping 2020-02-24 11:52:54 +08:00
PKU-ZLR 6e69abdc8d Upload Match 2019-12-15 03:10:08 +08:00
Feng Wang 48788c8c05 lut decomposition 2019-12-10 19:34:44 +08:00
Feng Wang 90f46fa8d9 recover read_blif 2019-12-08 15:12:38 +08:00
Feng Wang f2d8140a77 add 2INPUT.genlib 2019-12-08 15:03:29 +08:00
PKU-ZLR 5ba9936da3 Add files via upload 2019-12-07 12:57:00 +08:00
Feng Wang 603967539d update abc function call 2019-12-04 21:26:52 +08:00
PKU-ZLR 3b2c581ca9 upload Circuit.h 2019-11-30 01:56:42 +08:00
PKU-ZLR 413162d602 Upload Circuit.h 2019-11-02 14:14:35 +08:00
Feng Wang 55dbe382f6 record our area and abc area 2019-10-23 21:13:43 +08:00
PKU-ZLR 1635288fbd upload Circuit.h 2019-10-23 00:19:29 +08:00
Feng Wang b572c835e3 update the result of abc lut mapping command "lutpack" 2019-10-20 21:06:08 +08:00
Feng Wang f0b63f08ba add ISCAS89 benchmarks 2019-10-09 15:16:52 +08:00
Feng Wang f8539e8f9a move circuit.h into the include folder 2019-10-08 19:28:53 +08:00
PKU-ZLR 6218fa0ba4 Add files via upload 2019-10-08 01:32:09 +08:00
Feng Wang 9471030908 finish abc synthesis and the blif parser 2019-09-26 14:59:48 +08:00
王丰 151ee5e89a initialization 2019-09-26 14:00:28 +08:00