Commit Graph

71 Commits

Author SHA1 Message Date
Guojie Luo 0a7c7f7721 Add license statement in source files 2023-01-09 15:26:50 +00:00
Guojie Luo 1ebea05225 Update README.md 2022-02-18 16:04:00 +08:00
Guojie Luo 747ba23e23 Fix the compilation issue in Ubuntu 20.04 2022-02-18 15:56:48 +08:00
Guojie Luo a2049266dd Improve the first-time compilation experience 2022-02-18 15:32:57 +08:00
leetor 28d9f1e675
Update MAIN.cpp
some changes to support  commands
2021-10-15 14:08:11 +08:00
Jiaxi Zhang cd113e9ec3
Update README.md 2021-10-15 13:52:35 +08:00
Jiaxi Zhang 1f4b84637f
update readme.md 2021-10-15 13:52:08 +08:00
leetor 6e10af8c12
Update README.md
Add some information
2021-10-15 13:39:01 +08:00
Jiaxi Zhang f39e616a45
add license 2021-10-15 01:09:17 +08:00
PKU-ZLR e4d5fdf2ef Add 8LUTlib 2021-10-14 21:32:43 +08:00
PKU-ZLR 15a94a0e53 Upload local refinement 2021-10-14 21:32:43 +08:00
PKU-ZLR e2423ad8d8 Upload local refinement 2021-10-14 21:32:43 +08:00
PKU-ZLR e1be1757df Add files via upload 2020-03-22 11:52:57 +08:00
PKU-ZLR ea4d4094a0 Upload MAIN 2020-03-22 11:52:15 +08:00
Feng Wang 5562b1d3b6 add debug information 2020-03-10 16:03:13 +08:00
Feng Wang 080617a8c8 add debug information 2020-03-02 16:34:58 +08:00
Feng Wang e3925da63b add 10 cases in EPFL 2020-03-02 14:57:39 +08:00
Feng Wang 688283c49f compare with ''if'' command only 2020-03-01 16:07:14 +08:00
PKU-ZLR 38ecf2f140 Add files via upload 2020-02-29 22:28:22 +08:00
PKU-ZLR 40563c2353 Add files via upload 2020-02-29 22:27:05 +08:00
Feng Wang 7e41738078 implement 2-input LUT mapping. Decomposition failed! 2020-02-27 00:28:59 +08:00
Feng Wang e1848ade08 Merge branch 'master' of https://github.com/yzwangfeng/MOLM 2020-02-27 00:17:54 +08:00
Feng Wang 44a460cdac change library 2020-02-27 00:17:43 +08:00
PKU-ZLR ea91c35dba Upload Circuit.h 2020-02-26 23:13:18 +08:00
PKU-ZLR 64da250dd2 Upload MAIN.CPP 2020-02-26 23:12:28 +08:00
Feng Wang 5f62f443bb 2LUT.lutlib has a bug 2020-02-26 15:13:14 +08:00
PKU-ZLR 534fb1c758 Add files via upload 2020-02-25 11:37:29 +08:00
PKU-ZLR 74a3018d86 Add files via upload 2020-02-25 11:36:04 +08:00
Feng Wang fb2543d92d add LUT2 mapping 2020-02-24 11:52:54 +08:00
PKU-ZLR 29462a84de Add iteration process 2020-02-23 18:04:35 +08:00
Feng Wang 2a6ccb69cb add toy examples 2020-02-19 10:21:27 +08:00
Feng Wang ee820e8ff2 ignore 2020-01-07 13:33:32 +08:00
Feng Wang 9941ed82ec print information into .csv 2019-12-16 21:24:09 +08:00
Feng Wang a65c0e07e2 update suc 2019-12-15 11:38:37 +08:00
PKU-ZLR 6e69abdc8d Upload Match 2019-12-15 03:10:08 +08:00
Feng Wang dbda625f4e to debug 2019-12-11 21:41:55 +08:00
Feng Wang 48788c8c05 lut decomposition 2019-12-10 19:34:44 +08:00
Feng Wang e3e1348513 annotation 2019-12-08 15:36:23 +08:00
Feng Wang 90f46fa8d9 recover read_blif 2019-12-08 15:12:38 +08:00
Feng Wang f2d8140a77 add 2INPUT.genlib 2019-12-08 15:03:29 +08:00
PKU-ZLR e138645b4e Upload graph Match 2019-12-07 12:57:48 +08:00
PKU-ZLR 5ba9936da3 Add files via upload 2019-12-07 12:57:00 +08:00
Feng Wang 26e5f2e999 fix read_blif bugs 2019-12-05 10:30:55 +08:00
Feng Wang c4f46f5886 abc_equivalence_check function debug 2019-12-04 21:48:24 +08:00
Feng Wang 603967539d update abc function call 2019-12-04 21:26:52 +08:00
PKU-ZLR 2accc3584b 2 outputs upload 2019-11-30 01:57:50 +08:00
PKU-ZLR 3b2c581ca9 upload Circuit.h 2019-11-30 01:56:42 +08:00
PKU-ZLR 413162d602 Upload Circuit.h 2019-11-02 14:14:35 +08:00
PKU-ZLR 0eeed0d95f Update MAIN and Circuit 2019-11-02 14:11:12 +08:00
PKU-ZLR dfec04e653 Update MAIN.cpp 2019-10-29 20:46:10 +08:00