Guojie Luo
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0a7c7f7721
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Add license statement in source files
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2023-01-09 15:26:50 +00:00 |
Guojie Luo
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1ebea05225
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Update README.md
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2022-02-18 16:04:00 +08:00 |
Guojie Luo
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747ba23e23
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Fix the compilation issue in Ubuntu 20.04
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2022-02-18 15:56:48 +08:00 |
Guojie Luo
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a2049266dd
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Improve the first-time compilation experience
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2022-02-18 15:32:57 +08:00 |
leetor
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28d9f1e675
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Update MAIN.cpp
some changes to support commands
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2021-10-15 14:08:11 +08:00 |
Jiaxi Zhang
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cd113e9ec3
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Update README.md
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2021-10-15 13:52:35 +08:00 |
Jiaxi Zhang
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1f4b84637f
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update readme.md
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2021-10-15 13:52:08 +08:00 |
leetor
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6e10af8c12
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Update README.md
Add some information
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2021-10-15 13:39:01 +08:00 |
Jiaxi Zhang
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f39e616a45
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add license
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2021-10-15 01:09:17 +08:00 |
PKU-ZLR
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e4d5fdf2ef
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Add 8LUTlib
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2021-10-14 21:32:43 +08:00 |
PKU-ZLR
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15a94a0e53
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Upload local refinement
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2021-10-14 21:32:43 +08:00 |
PKU-ZLR
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e2423ad8d8
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Upload local refinement
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2021-10-14 21:32:43 +08:00 |
PKU-ZLR
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e1be1757df
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Add files via upload
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2020-03-22 11:52:57 +08:00 |
PKU-ZLR
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ea4d4094a0
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Upload MAIN
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2020-03-22 11:52:15 +08:00 |
Feng Wang
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5562b1d3b6
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add debug information
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2020-03-10 16:03:13 +08:00 |
Feng Wang
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080617a8c8
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add debug information
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2020-03-02 16:34:58 +08:00 |
Feng Wang
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e3925da63b
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add 10 cases in EPFL
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2020-03-02 14:57:39 +08:00 |
Feng Wang
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688283c49f
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compare with ''if'' command only
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2020-03-01 16:07:14 +08:00 |
PKU-ZLR
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38ecf2f140
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Add files via upload
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2020-02-29 22:28:22 +08:00 |
PKU-ZLR
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40563c2353
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Add files via upload
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2020-02-29 22:27:05 +08:00 |
Feng Wang
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7e41738078
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implement 2-input LUT mapping. Decomposition failed!
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2020-02-27 00:28:59 +08:00 |
Feng Wang
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e1848ade08
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Merge branch 'master' of https://github.com/yzwangfeng/MOLM
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2020-02-27 00:17:54 +08:00 |
Feng Wang
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44a460cdac
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change library
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2020-02-27 00:17:43 +08:00 |
PKU-ZLR
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ea91c35dba
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Upload Circuit.h
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2020-02-26 23:13:18 +08:00 |
PKU-ZLR
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64da250dd2
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Upload MAIN.CPP
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2020-02-26 23:12:28 +08:00 |
Feng Wang
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5f62f443bb
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2LUT.lutlib has a bug
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2020-02-26 15:13:14 +08:00 |
PKU-ZLR
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534fb1c758
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Add files via upload
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2020-02-25 11:37:29 +08:00 |
PKU-ZLR
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74a3018d86
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Add files via upload
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2020-02-25 11:36:04 +08:00 |
Feng Wang
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fb2543d92d
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add LUT2 mapping
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2020-02-24 11:52:54 +08:00 |
PKU-ZLR
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29462a84de
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Add iteration process
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2020-02-23 18:04:35 +08:00 |
Feng Wang
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2a6ccb69cb
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add toy examples
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2020-02-19 10:21:27 +08:00 |
Feng Wang
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ee820e8ff2
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ignore
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2020-01-07 13:33:32 +08:00 |
Feng Wang
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9941ed82ec
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print information into .csv
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2019-12-16 21:24:09 +08:00 |
Feng Wang
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a65c0e07e2
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update suc
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2019-12-15 11:38:37 +08:00 |
PKU-ZLR
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6e69abdc8d
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Upload Match
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2019-12-15 03:10:08 +08:00 |
Feng Wang
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dbda625f4e
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to debug
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2019-12-11 21:41:55 +08:00 |
Feng Wang
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48788c8c05
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lut decomposition
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2019-12-10 19:34:44 +08:00 |
Feng Wang
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e3e1348513
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annotation
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2019-12-08 15:36:23 +08:00 |
Feng Wang
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90f46fa8d9
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recover read_blif
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2019-12-08 15:12:38 +08:00 |
Feng Wang
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f2d8140a77
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add 2INPUT.genlib
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2019-12-08 15:03:29 +08:00 |
PKU-ZLR
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e138645b4e
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Upload graph Match
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2019-12-07 12:57:48 +08:00 |
PKU-ZLR
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5ba9936da3
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Add files via upload
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2019-12-07 12:57:00 +08:00 |
Feng Wang
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26e5f2e999
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fix read_blif bugs
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2019-12-05 10:30:55 +08:00 |
Feng Wang
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c4f46f5886
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abc_equivalence_check function debug
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2019-12-04 21:48:24 +08:00 |
Feng Wang
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603967539d
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update abc function call
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2019-12-04 21:26:52 +08:00 |
PKU-ZLR
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2accc3584b
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2 outputs upload
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2019-11-30 01:57:50 +08:00 |
PKU-ZLR
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3b2c581ca9
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upload Circuit.h
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2019-11-30 01:56:42 +08:00 |
PKU-ZLR
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413162d602
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Upload Circuit.h
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2019-11-02 14:14:35 +08:00 |
PKU-ZLR
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0eeed0d95f
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Update MAIN and Circuit
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2019-11-02 14:11:12 +08:00 |
PKU-ZLR
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dfec04e653
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Update MAIN.cpp
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2019-10-29 20:46:10 +08:00 |