From 1f4b84637fb47f07b7a0bb9dd59975af593175d7 Mon Sep 17 00:00:00 2001
From: Jiaxi Zhang <zsjyxyl@gmail.com>
Date: Fri, 15 Oct 2021 13:52:08 +0800
Subject: [PATCH] update readme.md

---
 README.md | 49 +++++++++++++++++++++++++------------------------
 1 file changed, 25 insertions(+), 24 deletions(-)

diff --git a/README.md b/README.md
index 7ec42c8..192e5a6 100644
--- a/README.md
+++ b/README.md
@@ -1,36 +1,26 @@
 
 
-### Overview
-
-##### abclib:some definitions about library
-
-##### benchmark:benchmarks
-
-##### include,source:source files about DOLM-FPGA
-
-##### lib: berkeley-abc library
+## Overview
+A framework for dual-output LUT mapping.
 
 
+## How To Use
 
-### How To Use
-
-#### using commands to build:
+### Clone project:
 
 ```
 git clone https://github.com/pkuzjx/dom-fpga.git
 cd dom-fpga
 ```
 
-##### Then recompile the abc library : lib/libabc.a by https://github.com/berkeley-abc/abc ,and overwrite libabc.a.
-
-##### Or you can make libabc.a in another space,and change Makefile at line 17
+### Compile the abc library : lib/libabc.a by https://github.com/berkeley-abc/abc ,and overwrite libabc.a.
 
 ```
 -L./lib/ -labc
-change ./lib/ to your libabc.a file location
+set ./lib/ to your libabc.a file location
 ```
 
-##### Then you can successfully get an Executable file in the folder bin named DOLM 
+### Get bin DOLM 
 
 ```
 mkdir object
@@ -45,20 +35,31 @@ mkdir bin
 make
 ```
 
-##### To run a benchmark  you can 
+### Run an exmaple ./bin/DOLM [benchamrk set] [benchmark name]
 
 ```
 ./bin/DOLM EPFL adder
 ```
 
-##### EPFL is the benchmark_set folder name,adder is the name of the benchmark,you can change (EPFL,adder) both of them to test all the benchmark.
 
-##### You can get the answer in the folder result:
 
-****.blif_abc_lut.blif.out is the answer of berkeley-abc
+### Get result
 
-****.blif.out1 is the single-output answer
+*.blif_abc_lut.blif.out is the answer of berkeley-abc
 
-****.blif.out2 is the dual-output answer
+*.blif.out1 is the single-output result
 
-****.blif.out is the better answer between out1 and out2
+*.blif.out2 is the dual-output result
+
+### reference: 
+
+```
+@inproceedings{wang2020dual,
+  title={Dual-Output LUT Merging during FPGA Technology Mapping},
+  author={Wang, Feng and Zhu, Liren and Zhang, Jiaxi and Li, Lei and Zhang, Yang and Luo, Guojie},
+  booktitle=ICCAD,
+  pages={1--9},
+  year={2020},
+  organization={IEEE}
+}
+```