forked from opendacs/PyHCL
34 lines
944 B
Python
34 lines
944 B
Python
# Copyright (c) 2019 scutdig
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# Licensed under the MIT license.
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from __future__ import annotations
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from dataclasses import dataclass, field, InitVar
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from pyhcl.core._emit_context import EmitterContext
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from pyhcl.core._repr import Node, CType, MemType
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from pyhcl.ir import low_ir
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@dataclass(eq=False)
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class Mem(Node):
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size: int
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elemType: InitVar[CType]
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typ: MemType = field(init=False, default=None)
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def __post_init__(self, elemType):
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super().__post_init__()
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self.typ = MemType(self.size, elemType)
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from pyhcl.core._clock_manager import Clock_manager
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Clock_manager.register(id(self))
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def mapToIR(self, ctx: EmitterContext):
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name = ctx.getName(self)
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mtyp = self.typ.mapToIR(ctx)
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defm = low_ir.DefMemory(name, mtyp)
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ctx.appendFinalStatement(defm, self.scopeId)
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ref = low_ir.Reference(name, mtyp)
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ctx.updateRef(self, ref)
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return ref
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