130 lines
4.3 KiB
C
130 lines
4.3 KiB
C
#ifndef __MEMLAYOUT_H
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#define __MEMLAYOUT_H
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// Physical memory layout
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// k210 peripherals
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// (0x0200_0000, 0x1000), /* CLINT */
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// // we only need claim/complete for target0 after initializing
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// (0x0C20_0000, 0x1000), /* PLIC */
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// (0x3800_0000, 0x1000), /* UARTHS */
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// (0x3800_1000, 0x1000), /* GPIOHS */
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// (0x5020_0000, 0x1000), /* GPIO */
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// (0x5024_0000, 0x1000), /* SPI_SLAVE */
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// (0x502B_0000, 0x1000), /* FPIOA */
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// (0x502D_0000, 0x1000), /* TIMER0 */
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// (0x502E_0000, 0x1000), /* TIMER1 */
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// (0x502F_0000, 0x1000), /* TIMER2 */
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// (0x5044_0000, 0x1000), /* SYSCTL */
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// (0x5200_0000, 0x1000), /* SPI0 */
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// (0x5300_0000, 0x1000), /* SPI1 */
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// (0x5400_0000, 0x1000), /* SPI2 */
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// (0x8000_0000, 0x600000), /* Memory */
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// qemu -machine virt is set up like this,
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// based on qemu's hw/riscv/virt.c:
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//
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// 00001000 -- boot ROM, provided by qemu
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// 02000000 -- CLINT
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// 0C000000 -- PLIC
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// 10000000 -- uart0
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// 10001000 -- virtio disk
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// 80000000 -- boot ROM jumps here in machine mode
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// -kernel loads the kernel here
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// unused RAM after 80000000.
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#define VIRT_OFFSET 0x3F00000000L
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#ifdef QEMU
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// qemu puts UART registers here in physical memory.
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#define UART 0x10000000L
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#else
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#define UART 0x38000000L
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#endif
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#define UART_V (UART + VIRT_OFFSET)
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#ifdef QEMU
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// virtio mmio interface
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#define VIRTIO0 0x10001000
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#define VIRTIO0_V (VIRTIO0 + VIRT_OFFSET)
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#endif
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// local interrupt controller, which contains the timer.
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#define CLINT 0x02000000L
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#define CLINT_V (CLINT + VIRT_OFFSET)
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#define PLIC 0x0c000000L
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#define PLIC_V (PLIC + VIRT_OFFSET)
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#define PLIC_PRIORITY (PLIC_V + 0x0)
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#define PLIC_PENDING (PLIC_V + 0x1000)
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#define PLIC_MENABLE(hart) (PLIC_V + 0x2000 + (hart) * 0x100)
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#define PLIC_SENABLE(hart) (PLIC_V + 0x2080 + (hart) * 0x100)
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#define PLIC_MPRIORITY(hart) (PLIC_V + 0x200000 + (hart) * 0x2000)
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#define PLIC_SPRIORITY(hart) (PLIC_V + 0x201000 + (hart) * 0x2000)
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#define PLIC_MCLAIM(hart) (PLIC_V + 0x200004 + (hart) * 0x2000)
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#define PLIC_SCLAIM(hart) (PLIC_V + 0x201004 + (hart) * 0x2000)
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#ifndef QEMU
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#define GPIOHS 0x38001000
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#define DMAC 0x50000000
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#define GPIO 0x50200000
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#define SPI_SLAVE 0x50240000
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#define FPIOA 0x502B0000
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#define SPI0 0x52000000
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#define SPI1 0x53000000
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#define SPI2 0x54000000
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#define SYSCTL 0x50440000
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#define GPIOHS_V (0x38001000 + VIRT_OFFSET)
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#define DMAC_V (0x50000000 + VIRT_OFFSET)
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#define GPIO_V (0x50200000 + VIRT_OFFSET)
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#define SPI_SLAVE_V (0x50240000 + VIRT_OFFSET)
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#define FPIOA_V (0x502B0000 + VIRT_OFFSET)
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#define SPI0_V (0x52000000 + VIRT_OFFSET)
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#define SPI1_V (0x53000000 + VIRT_OFFSET)
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#define SPI2_V (0x54000000 + VIRT_OFFSET)
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#define SYSCTL_V (0x50440000 + VIRT_OFFSET)
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#endif
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// the physical address of rustsbi
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#define RUSTSBI_BASE 0x80000000
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// the kernel expects there to be RAM
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// for use by the kernel and user pages
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// from physical address 0x80200000 to PHYSTOP.
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#ifndef QEMU
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#define KERNBASE 0x80020000
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#else
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#define KERNBASE 0x80200000
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#endif
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#define PHYSTOP 0x80600000
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// map the trampoline page to the highest address,
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// in both user and kernel space.
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#define TRAMPOLINE (MAXVA - PGSIZE)
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// map kernel stacks beneath the trampoline,
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// each surrounded by invalid guard pages.
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// #define KSTACK(p) (TRAMPOLINE - ((p) + 1) * 2 * PGSIZE)
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#define VKSTACK 0x3EC0000000L
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// User memory layout.
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// Address zero first:
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// text
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// original data and bss
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// fixed-size stack
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// expandable heap
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// ...
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// TRAPFRAME (p->trapframe, used by the trampoline)
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// TRAMPOLINE (the same page as in the kernel)
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#define TRAPFRAME (TRAMPOLINE - PGSIZE)
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#define MAXUVA RUSTSBI_BASE
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#endif
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