fix timer interrupt

This commit is contained in:
hustccc 2020-10-23 04:20:13 +09:00
parent daa0d6efc2
commit b06052d288
12 changed files with 214 additions and 15 deletions

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@ -31,7 +31,6 @@ OBJS = \
$K/kernelvec.o \
$K/plic.o \
$K/virtio_disk.o \
$K/sbi.o \
$K/timer.o \
$K/test.o \
@ -83,7 +82,7 @@ qemu: build
image = $T/kernel.bin
k210 = $T/k210.bin
k210-serialport := /dev/ttyUSB0
k210-serialport := /dev/ttyUSB1
k210: build
@riscv64-unknown-elf-objcopy $T/kernel --strip-all -O binary $(image)

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@ -20,6 +20,7 @@
#include "riscv.h"
#include "defs.h"
#include "proc.h"
#include "sbi.h"
#define BACKSPACE 0x100
#define C(x) ((x)-'@') // Control-x

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@ -23,15 +23,16 @@ void consoleintr(int);
void consputc(int);
// sbi.c
void sbi_console_putchar(int ch);
int sbi_console_getchar();
void sbi_send_ipi(const unsigned long *hart_mask);
void sbi_set_timer(uint64 stime_value);
// void sbi_console_putchar(int ch);
// int sbi_console_getchar();
// void sbi_send_ipi(const unsigned long *hart_mask);
// void sbi_set_timer(uint64 stime_value);
// timer.c
void timerinit();
void supervisor_timer();
void set_next_timeout();
uint64 read_time();
void timer_tick();
// exec.c
int exec(char*, char**);

97
kernel/interrupt.S Normal file
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@ -0,0 +1,97 @@
#
.altmacro
#
.set REG_SIZE, 8
# Context
.set CONTEXT_SIZE, 34
#
.macro SAVE reg, offset
sd \reg, \offset * REG_SIZE(sp)
.endm
#
.macro LOAD reg, offset
ld \reg, \offset * REG_SIZE(sp)
.endm
# n n
.macro SAVE_N n
SAVE x\n, n
.endm
# n n
.macro LOAD_N n
LOAD x\n, n
.endm
.section .text
.globl __interrupt
#
# Context Rust interrupt::handler::handle_interrupt()
__interrupt:
# 线 Context
# 使 sscratch
# sscratch
# sp sscratch
csrrw sp, sscratch, sp
# Context
addi sp, sp, -CONTEXT_SIZE * REG_SIZE
# x0 0
SAVE x1, 1
# sp x2
csrr x1, sscratch
SAVE x1, 2
# x5 x31
.set n, 5
.rept 27
SAVE_N %n
.set n, n + 1
.endr
# CSR
csrr t0, sstatus
csrr t1, sepc
SAVE t0, 32
SAVE t1, 33
# handle_interrupt
# context: &mut Context
mv a0, sp
# scause: Scause
csrr a1, scause
# stval: usize
csrr a2, stval
jal kerneltrap
.globl __restore
#
# Context a0
# Context Context sscratch
# sepc
__restore:
# a0 sp
# a0
mv sp, a0
# CSR
LOAD t0, 32
LOAD t1, 33
csrw sstatus, t0
csrw sepc, t1
# sscratch
addi t0, sp, CONTEXT_SIZE * REG_SIZE
csrw sscratch, t0
#
LOAD x1, 1
# x5 x31
.set n, 5
.rept 27
LOAD_N %n
.set n, n + 1
.endr
# sp x2使 LOAD
LOAD x2, 2
sret

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@ -3,6 +3,7 @@
#include "memlayout.h"
#include "riscv.h"
#include "defs.h"
#include "sbi.h"
volatile static int started = 0;
@ -21,10 +22,10 @@ main(unsigned long hartid, unsigned long dtb_pa)
kvminit(); // create kernel page table
kvminithart(); // turn on paging
test_kalloc();
procinit();
trapinit(); // trap vectors
trapinithart(); // install kernel trap vector
timerinit(); // set up timer interrupt handler
procinit();
// plicinit(); // set up interrupt controller
// plicinithart(); // ask PLIC for device interrupts
// binit(); // buffer cache

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@ -11,4 +11,4 @@
#define NBUF (MAXOPBLOCKS*3) // size of disk block cache
#define FSSIZE 1000 // size of file system in blocks
#define MAXPATH 128 // maximum file path name
#define INTERVAL 100 // timer interrupt interval
#define INTERVAL (390000000 / 200) // timer interrupt interval

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@ -13,6 +13,7 @@
#include "riscv.h"
#include "defs.h"
#include "proc.h"
#include "sbi.h"
volatile int panicked = 0;

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@ -253,7 +253,8 @@ static inline uint64
r_time()
{
uint64 x;
asm volatile("csrr %0, time" : "=r" (x) );
// asm volatile("csrr %0, time" : "=r" (x) );
asm volatile("rdtime %0" : "=r" (x) );
return x;
}

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@ -1,5 +1,93 @@
// SBI Call Head file
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2015 Regents of the University of California
*/
void sbi_console_putchar(int ch);
int sbi_console_getchar();
void sbi_send_ipi(const unsigned long *hart_mask);
#ifndef _ASM_RISCV_SBI_H
#define _ASM_RISCV_SBI_H
#include "types.h"
#define SBI_SET_TIMER 0
#define SBI_CONSOLE_PUTCHAR 1
#define SBI_CONSOLE_GETCHAR 2
#define SBI_CLEAR_IPI 3
#define SBI_SEND_IPI 4
#define SBI_REMOTE_FENCE_I 5
#define SBI_REMOTE_SFENCE_VMA 6
#define SBI_REMOTE_SFENCE_VMA_ASID 7
#define SBI_SHUTDOWN 8
#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \
register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \
register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \
register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \
register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3); \
register uintptr_t a7 asm ("a7") = (uintptr_t)(which); \
asm volatile ("ecall" \
: "+r" (a0) \
: "r" (a1), "r" (a2), "r" (a3), "r" (a7) \
: "memory"); \
a0; \
})
/* Lazy implementations until SBI is finalized */
#define SBI_CALL_0(which) SBI_CALL(which, 0, 0, 0, 0)
#define SBI_CALL_1(which, arg0) SBI_CALL(which, arg0, 0, 0, 0)
#define SBI_CALL_2(which, arg0, arg1) SBI_CALL(which, arg0, arg1, 0, 0)
#define SBI_CALL_3(which, arg0, arg1, arg2) \
SBI_CALL(which, arg0, arg1, arg2, 0)
#define SBI_CALL_4(which, arg0, arg1, arg2, arg3) \
SBI_CALL(which, arg0, arg1, arg2, arg3)
static inline void sbi_console_putchar(int ch)
{
SBI_CALL_1(SBI_CONSOLE_PUTCHAR, ch);
}
static inline int sbi_console_getchar(void)
{
return SBI_CALL_0(SBI_CONSOLE_GETCHAR);
}
static inline void sbi_set_timer(uint64 stime_value)
{
SBI_CALL_1(SBI_SET_TIMER, stime_value);
}
static inline void sbi_shutdown(void)
{
SBI_CALL_0(SBI_SHUTDOWN);
}
static inline void sbi_clear_ipi(void)
{
SBI_CALL_0(SBI_CLEAR_IPI);
}
static inline void sbi_send_ipi(const unsigned long *hart_mask)
{
SBI_CALL_1(SBI_SEND_IPI, hart_mask);
}
static inline void sbi_remote_fence_i(const unsigned long *hart_mask)
{
SBI_CALL_1(SBI_REMOTE_FENCE_I, hart_mask);
}
static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask,
unsigned long start,
unsigned long size)
{
SBI_CALL_3(SBI_REMOTE_SFENCE_VMA, hart_mask, start, size);
}
static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
unsigned long start,
unsigned long size,
unsigned long asid)
{
SBI_CALL_4(SBI_REMOTE_SFENCE_VMA_ASID, hart_mask, start, size, asid);
}
#endif

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@ -4,6 +4,7 @@
#include "param.h"
#include "riscv.h"
#include "defs.h"
#include "sbi.h"
static int tick = 0;
void timerinit() {
@ -19,9 +20,15 @@ void supervisor_timer() {
void set_next_timeout() {
printf("[Timer]read_time: %d\n", r_time());
// printf("[Timer]read_time: %d\n", read_time());
sbi_set_timer(r_time() + INTERVAL);
}
uint64 read_time() {
uint64 *mtime = (uint64 *)0xffffffff0200bff8;
return *(mtime);
}
void timer_tick() {
printf("[Timer]tick\n");
set_next_timeout();

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@ -13,6 +13,7 @@ extern char trampoline[], uservec[], userret[];
// in kernelvec.S, calls kerneltrap().
void kernelvec();
void __interrupt();
extern int devintr();
@ -28,6 +29,7 @@ void
trapinithart(void)
{
w_stvec((uint64)kernelvec);
w_sstatus(r_sstatus() | SSTATUS_SIE);
w_sie(r_sie() | SIE_SEIE | SIE_SSIE);
printf("trapinithart\n");
}
@ -153,12 +155,12 @@ kerneltrap()
panic("kerneltrap");
}
printf("which_dev: %d\n", which_dev);
// give up the CPU if this is a timer interrupt.
if(which_dev == 2 && myproc() != 0 && myproc()->state == RUNNING) {
supervisor_timer();
yield();
}
// the yield() may have caused some traps to occur,
// so restore trap registers for use by kernelvec.S's sepc instruction.
w_sepc(sepc);

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@ -7,4 +7,5 @@ typedef unsigned short uint16;
typedef unsigned int uint32;
typedef unsigned long uint64;
typedef unsigned long uintptr_t;
typedef uint64 pde_t;