Delete some unused files.

This commit is contained in:
Lu Sitong 2021-03-09 16:02:02 +08:00
parent b3899b3d31
commit 560f22e9ba
8 changed files with 6 additions and 534 deletions

View File

@ -40,7 +40,8 @@ make build
## Run on k210 board ## Run on k210 board
Instead of the original file system, xv6-k210 runs with FAT32. You might need an SD card with FAT32 format. Instead of the original file system, xv6-k210 runs with FAT32. You might need an SD card with FAT32 format.
To start `shell`, you need to rename the "_init" and "_sh" in the "/xv6-user" to "init" and "sh" after building, To start `shell`, you need to rename the "_init" and "_sh" in the "/xv6-user" to "init" and "sh" after building,
then copy them to the root of your SD card. Or you can directly run the command as below with your SD card connected. then copy them to the root of your SD card.
Or you can directly run the command as below with your SD card connected to your PC (SD card reader required).
Warning: this will format your SD card and clean your original data! Warning: this will format your SD card and clean your original data!
```bash ```bash

View File

@ -40,7 +40,7 @@ make build
## 在 k210 开发板上运行 ## 在 k210 开发板上运行
Xv6-k210 采用 FAT32 文件系统,而不是其原本的文件系统。您需要一张 FAT32 格式的 SD 卡才能运行。 Xv6-k210 采用 FAT32 文件系统,而不是其原本的文件系统。您需要一张 FAT32 格式的 SD 卡才能运行。
在编译项目后,您需要将 “/xv6-user” 目录下的 “_init” 和 “_sh” 重命名为 “init” 和 “sh”并拷贝至 SD 卡的根目录下。 在编译项目后,您需要将 “/xv6-user” 目录下的 “_init” 和 “_sh” 重命名为 “init” 和 “sh”并拷贝至 SD 卡的根目录下。
或者,您可以直接运行以下命令。 或者,您可以将 SD 卡连至主机(需要读卡器),再直接运行以下命令。
警告:这会格式化您的 SD 卡并清除卡上的原有数据! 警告:这会格式化您的 SD 卡并清除卡上的原有数据!
```bash ```bash

View File

@ -1,60 +0,0 @@
// On-disk file system format.
// Both the kernel and user programs use this header file.
#define ROOTINO 1 // root i-number
#define BSIZE 512 // block size
// Disk layout:
// [ boot block | super block | log | inode blocks |
// free bit map | data blocks]
//
// mkfs computes the super block and builds an initial file system. The
// super block describes the disk layout:
struct superblock {
uint magic; // Must be FSMAGIC
uint size; // Size of file system image (blocks)
uint nblocks; // Number of data blocks
uint ninodes; // Number of inodes.
uint nlog; // Number of log blocks
uint logstart; // Block number of first log block
uint inodestart; // Block number of first inode block
uint bmapstart; // Block number of first free map block
};
#define FSMAGIC 0x10203040
#define NDIRECT 12
#define NINDIRECT (BSIZE / sizeof(uint))
#define MAXFILE (NDIRECT + NINDIRECT)
// On-disk inode structure
struct dinode {
short type; // File type
short major; // Major device number (T_DEVICE only)
short minor; // Minor device number (T_DEVICE only)
short nlink; // Number of links to inode in file system
uint size; // Size of file (bytes)
uint addrs[NDIRECT+1]; // Data block addresses
};
// Inodes per block.
#define IPB (BSIZE / sizeof(struct dinode))
// Block containing inode i
#define IBLOCK(i, sb) ((i) / IPB + sb.inodestart)
// Bitmap bits per block
#define BPB (BSIZE*8)
// Block of free map containing bit for block b
#define BBLOCK(b, sb) ((b)/BPB + sb.bmapstart)
// Directory is a file containing a sequence of dirent structures.
#define DIRSIZ 14
struct dirent {
ushort inum;
char name[DIRSIZ];
};

View File

@ -1,90 +0,0 @@
#ifndef _SDCARD_H
#define _SDCARD_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Card Specific Data: CSD Register
*/
typedef struct {
uint8 CSDStruct; /*!< CSD structure */
uint8 SysSpecVersion; /*!< System specification version */
uint8 Reserved1; /*!< Reserved */
uint8 TAAC; /*!< Data read access-time 1 */
uint8 NSAC; /*!< Data read access-time 2 in CLK cycles */
uint8 MaxBusClkFrec; /*!< Max. bus clock frequency */
uint16 CardComdClasses; /*!< Card command classes */
uint8 RdBlockLen; /*!< Max. read data block length */
uint8 PartBlockRead; /*!< Partial blocks for read allowed */
uint8 WrBlockMisalign; /*!< Write block misalignment */
uint8 RdBlockMisalign; /*!< Read block misalignment */
uint8 DSRImpl; /*!< DSR implemented */
uint8 Reserved2; /*!< Reserved */
uint32 DeviceSize; /*!< Device Size */
uint8 MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
uint8 MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
uint8 MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
uint8 MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
uint8 DeviceSizeMul; /*!< Device size multiplier */
uint8 EraseGrSize; /*!< Erase group size */
uint8 EraseGrMul; /*!< Erase group size multiplier */
uint8 WrProtectGrSize; /*!< Write protect group size */
uint8 WrProtectGrEnable; /*!< Write protect group enable */
uint8 ManDeflECC; /*!< Manufacturer default ECC */
uint8 WrSpeedFact; /*!< Write speed factor */
uint8 MaxWrBlockLen; /*!< Max. write data block length */
uint8 WriteBlockPaPartial; /*!< Partial blocks for write allowed */
uint8 Reserved3; /*!< Reserded */
uint8 ContentProtectAppli; /*!< Content protection application */
uint8 FileFormatGrouop; /*!< File format group */
uint8 CopyFlag; /*!< Copy flag (OTP) */
uint8 PermWrProtect; /*!< Permanent write protection */
uint8 TempWrProtect; /*!< Temporary write protection */
uint8 FileFormat; /*!< File Format */
uint8 ECC; /*!< ECC code */
uint8 CSD_CRC; /*!< CSD CRC */
uint8 Reserved4; /*!< always 1*/
} SD_CSD;
/**
* @brief Card Identification Data: CID Register
*/
typedef struct {
uint8 ManufacturerID; /*!< ManufacturerID */
uint16 OEM_AppliID; /*!< OEM/Application ID */
uint32 ProdName1; /*!< Product Name part1 */
uint8 ProdName2; /*!< Product Name part2*/
uint8 ProdRev; /*!< Product Revision */
uint32 ProdSN; /*!< Product Serial Number */
uint8 Reserved1; /*!< Reserved1 */
uint16 ManufactDate; /*!< Manufacturing Date */
uint8 CID_CRC; /*!< CID CRC */
uint8 Reserved2; /*!< always 1 */
} SD_CID;
/**
* @brief SD Card information
*/
typedef struct {
SD_CSD SD_csd;
SD_CID SD_cid;
uint64 CardCapacity; /*!< Card Capacity */
uint32 CardBlockSize; /*!< Card Block Size */
} SD_CardInfo;
extern SD_CardInfo cardinfo;
uint8 sd_init(void);
void sdcard_init(void);
uint8 sd_read_sector(uint8 *data_buff, uint32 sector, uint32 count);
uint8 sd_write_sector(uint8 *data_buff, uint32 sector, uint32 count);
uint8 sd_read_sector_dma(uint8 *data_buff, uint32 sector, uint32 count);
uint8 sd_write_sector_dma(uint8 *data_buff, uint32 sector, uint32 count);
#ifdef __cplusplus
}
#endif
#endif

View File

@ -1,166 +0,0 @@
//
// Created by lumin on 2020/11/2.
//
#ifndef LAB8_SDCARD_H
#define LAB8_SDCARD_H
#include <defs.h>
/*
* SD Card Commands
* @brief Commands: CMDxx = CMD-number | 0x40
*/
#define SD_CMD_SIGN (0x40)
#define SD_CMD0 0 // chip reset
#define SD_CMD8 8 // voltage negotiation
#define SD_CMD9 9 // read CSD register
#define SD_CMD10 10 // read CID register
#define SD_CMD12 12 // end multiple continuous sector read
#define SD_CMD17 17 // start single sector read
#define SD_CMD18 18 // start multiple continuous sector read and send start sector
#define SD_ACMD23 23 // start multiple continuous sector write and send sector count
#define SD_CMD24 24 // start single sector write
#define SD_CMD25 25 // start multiple continuous sector write and send start sector
#define SD_ACMD41 41 // capacity mode set
#define SD_CMD55 55 // ACMD prefix
#define SD_CMD58 58 // read CCS(card capacity status)
#define SD_INIT_MODE_RESULT_OK (0x01)
#define SD_TRANS_MODE_RESULT_OK (0x00)
#define SD_START_DATA_READ_RESPONSE (0xFE)
#define SD_START_DATA_SINGLE_BLOCK_WRITE_TOKEN (0xFE)
#define SD_START_DATA_MULTIPLE_BLOCK_WRITE_TOKEN (0xFC)
/**
* CMD frame format
* | CRC | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | CMD |
* | byte 5 | bit 4 | bit 3 | bit 2 | bit 1 | bit 0 |
*/
#define SD_CMD_CMD_BIT 0
#define SD_CMD_ARG_MSB0 1
#define SD_CMD_ARG_MSB1 2
#define SD_CMD_ARG_MSB2 3
#define SD_CMD_ARG_MSB3 4
#define SD_CMD_CRC_BIT 5
#define SD_CMD_FRAME_SIZE 6
#define SD_EMPTY_FILL (0xFF)
#define SD_R3_RESPONSE_REST_LENGTH 4
#define SD_R7_RESPONSE_REST_LENGTH 4
// SD card here uses SPI mode, pin
// names also inherit from it.
typedef struct
{
int mosi_pin; // pin num of Master Out Slave In
int miso_pin; // pin num of Master In Slave Out
int sclk_pin; // pin num of SPI Clock
int cs_pin; // pin num of Chip Selector
int cs_gpio_num;// what is this..?
} sdcard_hardware_pin_config_t;
typedef struct
{
uint8_t CSDStruct; /*!< CSD structure */
uint8_t SysSpecVersion; /*!< System specification version */
uint8_t Reserved1; /*!< Reserved */
uint8_t TAAC; /*!< Data read access-time 1 */
uint8_t NSAC; /*!< Data read access-time 2 in CLK cycles */
uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
uint16_t CardComdClasses; /*!< Card command classes */
uint8_t RdBlockLen; /*!< Max. read data block length */
uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
uint8_t WrBlockMisalign; /*!< Write block misalignment */
uint8_t RdBlockMisalign; /*!< Read block misalignment */
uint8_t DSRImpl; /*!< DSR implemented */
uint8_t Reserved2; /*!< Reserved */
uint32_t DeviceSize; /*!< Device Size */
uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
uint8_t DeviceSizeMul; /*!< Device size multiplier */
uint8_t EraseGrSize; /*!< Erase group size */
uint8_t EraseGrMul; /*!< Erase group size multiplier */
uint8_t WrProtectGrSize; /*!< Write protect group size */
uint8_t WrProtectGrEnable; /*!< Write protect group enable */
uint8_t ManDeflECC; /*!< Manufacturer default ECC */
uint8_t WrSpeedFact; /*!< Write speed factor */
uint8_t MaxWrBlockLen; /*!< Max. write data block length */
uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
uint8_t Reserved3; /*!< Reserded */
uint8_t ContentProtectAppli; /*!< Content protection application */
uint8_t FileFormatGrouop; /*!< File format group */
uint8_t CopyFlag; /*!< Copy flag (OTP) */
uint8_t PermWrProtect; /*!< Permanent write protection */
uint8_t TempWrProtect; /*!< Temporary write protection */
uint8_t FileFormat; /*!< File Format */
uint8_t ECC; /*!< ECC code */
uint8_t CSD_CRC; /*!< CSD CRC */
uint8_t Reserved4; /*!< always 1*/
uint8_t CSizeMlut; /*!< */
} SD_CSD;
/**
* @brief Card Identification Data: CID Register
*/
typedef struct
{
uint8_t ManufacturerID; /*!< ManufacturerID */
uint16_t OEM_AppliID; /*!< OEM/Application ID */
uint32_t ProdName1; /*!< Product Name part1 */
uint8_t ProdName2; /*!< Product Name part2*/
uint8_t ProdRev; /*!< Product Revision */
uint32_t ProdSN; /*!< Product Serial Number */
uint8_t Reserved1; /*!< Reserved1 */
uint16_t ManufactDate; /*!< Manufacturing Date */
uint8_t CID_CRC; /*!< CID CRC */
uint8_t Reserved2; /*!< always 1 */
} SD_CID;
/**
* @brief SD Card information
*/
typedef struct
{
SD_CSD SD_csd;
SD_CID SD_cid;
uint64_t CardCapacity; /*!< Card Capacity */
uint32_t CardBlockSize; /*!< Card Block Size */
uint8_t active;
} SD_CardInfo;
extern SD_CardInfo cardinfo;
/**
* Initialize the SD Card
*/
void sd_init();
/**
* Synchronously read single/multiple sector(s) from SD card
*
* @param data_buff pointer to the buffer that receives the data read from the SD.
* @param sector SD's internal address to read from.
* @param count count of sectors to be read
* @retval The SD Response:
* - 0xFF: Sequence failed
* - 0: Sequence succeed
*/
uint8_t sd_read_sector(uint8_t *data_buff, uint32_t sector, uint32_t count);
/**
* Synchronously write single/multiple sector(s) from SD card
*
* @param data_buff pointer to the buffer to be written to the SD.
* @param sector SD's internal address to write to.
* @param count count of sectors to be read
* @retval The SD Response:
* - 0xFF: Sequence failed
* - 0: Sequence succeed
*/
uint8_t sd_write_sector(uint8_t *data_buff, uint32_t sector, uint32_t count);
#endif //LAB8_SDCARD_H

View File

@ -1,210 +0,0 @@
//
// Created by lumin on 2020/11/2.
//
#ifndef LAB8_SPI_H
#define LAB8_SPI_H
#include <defs.h>
#include <io.h>
#define SPI01_WORK_MODE_OFFSET 6
#define SPI012_TRANSFER_MODE_OFFSET 8
#define SPI01_DATA_BIT_LENGTH_OFFSET 16
#define SPI01_FRAME_FORMAT_OFFSET 21
#define SPI3_WORK_MODE_OFFSET 8
#define SPI3_TRANSFER_MODE_OFFSET 10
#define SPI3_DATA_BIT_LENGTH_OFFSET 0
#define SPI3_FRAME_FORMAT_OFFSET 22
#define SPI_DATA_BIT_LENGTH_BIT 5
#define SPI_MIN_DATA_BIT_LENGTH 4
#define SPI_MAX_DATA_BIT_LENGTH (1 << SPI_DATA_BIT_LENGTH_BIT)
#define SPI_BAUDRATE_DEFAULT_VAL (0x14)
#define SPI_INTERRUPT_DISABLE (0x00)
#define SPI_DMACR_DEFAULT_VAL (0x00)
#define SPI_DMATDLR_DEFAULT_VAL (0x00)
#define SPI_DMARDLR_DEFAULT_VAL (0x00)
#define SPI_SLAVE_DISABLE (0x00)
#define SPI_MASTER_DISABLE (0x00)
#define SPI_MASTER_ENABLE (0x01)
#define SPI_TMOD_DEFAULT_VAL 0
#define SPI_FIFO_CAPCITY_IN_BYTE (32)
typedef struct
{
/* SPI Control Register 0 (0x00)*/
volatile uint32_t ctrlr0;
/* SPI Control Register 1 (0x04)*/
volatile uint32_t ctrlr1;
/* SPI Enable Register (0x08)*/
volatile uint32_t ssienr;
/* SPI Microwire Control Register (0x0c)*/
volatile uint32_t mwcr;
/* SPI Slave Enable Register (0x10)*/
volatile uint32_t ser;
/* SPI Baud Rate Select (0x14)*/
volatile uint32_t baudr;
/* SPI Transmit FIFO Threshold Level (0x18)*/
volatile uint32_t txftlr;
/* SPI Receive FIFO Threshold Level (0x1c)*/
volatile uint32_t rxftlr;
/* SPI Transmit FIFO Level Register (0x20)*/
volatile uint32_t txflr;
/* SPI Receive FIFO Level Register (0x24)*/
volatile uint32_t rxflr;
/* SPI Status Register (0x28)*/
volatile uint32_t sr;
/* SPI Interrupt Mask Register (0x2c)*/
volatile uint32_t imr;
/* SPI Interrupt Status Register (0x30)*/
volatile uint32_t isr;
/* SPI Raw Interrupt Status Register (0x34)*/
volatile uint32_t risr;
/* SPI Transmit FIFO Overflow Interrupt Clear Register (0x38)*/
volatile uint32_t txoicr;
/* SPI Receive FIFO Overflow Interrupt Clear Register (0x3c)*/
volatile uint32_t rxoicr;
/* SPI Receive FIFO Underflow Interrupt Clear Register (0x40)*/
volatile uint32_t rxuicr;
/* SPI Multi-Master Interrupt Clear Register (0x44)*/
volatile uint32_t msticr;
/* SPI Interrupt Clear Register (0x48)*/
volatile uint32_t icr;
/* SPI DMA Control Register (0x4c)*/
volatile uint32_t dmacr;
/* SPI DMA Transmit Data Level (0x50)*/
volatile uint32_t dmatdlr;
/* SPI DMA Receive Data Level (0x54)*/
volatile uint32_t dmardlr;
/* SPI Identification Register (0x58)*/
volatile uint32_t idr;
/* SPI DWC_ssi component version (0x5c)*/
volatile uint32_t ssic_version_id;
/* SPI Data Register 0-36 (0x60 -- 0xec)*/
volatile uint32_t dr[36];
/* SPI RX Sample Delay Register (0xf0)*/
volatile uint32_t rx_sample_delay;
/* SPI SPI Control Register (0xf4)*/
volatile uint32_t spi_ctrlr0;
/* reserved (0xf8)*/
volatile uint32_t resv;
/* SPI XIP Mode bits (0xfc)*/
volatile uint32_t xip_mode_bits;
/* SPI XIP INCR transfer opcode (0x100)*/
volatile uint32_t xip_incr_inst;
/* SPI XIP WRAP transfer opcode (0x104)*/
volatile uint32_t xip_wrap_inst;
/* SPI XIP Control Register (0x108)*/
volatile uint32_t xip_ctrl;
/* SPI XIP Slave Enable Register (0x10c)*/
volatile uint32_t xip_ser;
/* SPI XIP Receive FIFO Overflow Interrupt Clear Register (0x110)*/
volatile uint32_t xrxoicr;
/* SPI XIP time out register for continuous transfers (0x114)*/
volatile uint32_t xip_cnt_time_out;
volatile uint32_t endian;
} __attribute__((packed, aligned(4))) spi_t;
typedef enum
{
SPI_DEVICE_0,
SPI_DEVICE_1,
SPI_DEVICE_2,
SPI_DEVICE_3,
SPI_DEVICE_MAX,
} spi_device_num_t;
typedef enum
{
SPI_WORK_MODE_0,
SPI_WORK_MODE_1,
SPI_WORK_MODE_2,
SPI_WORK_MODE_3,
} spi_work_mode_t;
typedef enum
{
SPI_FF_STANDARD,
SPI_FF_DUAL,
SPI_FF_QUAD,
SPI_FF_OCTAL,
} spi_frame_format_t;
typedef enum
{
SPI_TMODE_TRANS_RECV,
SPI_TMODE_TRANS,
SPI_TMODE_RECV,
SPI_TMODE_EEROM,
} spi_transfer_mode_t;
typedef enum
{
SPI_CHIP_SELECT_0,
SPI_CHIP_SELECT_1,
SPI_CHIP_SELECT_2,
SPI_CHIP_SELECT_3,
SPI_CHIP_SELECT_MAX,
} spi_chip_select_t;
extern volatile spi_t *const spi[4];
/**
* @brief Set spi configuration
*
* @param[in] spi_num Spi bus number
* @param[in] mode Spi mode
* @param[in] frame_format Spi frame format
* @param[in] data_bit_length Spi data bit length
* @param[in] endian 0:little-endian 1:big-endian
*
* @return Void
*/
void spi_init(spi_device_num_t spi_num, spi_work_mode_t work_mode, spi_frame_format_t frame_format,
size_t data_bit_length, uint32_t endian);
/**
* @brief Spi send data
*
* @param[in] spi_num Spi bus number
* @param[in] slave Spi chip select
* @param[in] cmd_buff Spi command buffer point
* @param[in] cmd_len Spi command length
* @param[in] tx_buff Spi transmit buffer point
* @param[in] tx_len Spi transmit buffer length
*
* @return Result
* - 0 Success
* - Other Fail
*/
void spi_send_data_standard(spi_device_num_t spi_num, spi_chip_select_t slave, const uint8_t *tx_buff, size_t tx_len);
/**
* @brief Spi receive data
*
* @param[in] spi_num Spi bus number
* @param[in] chip_select Spi chip select
* @param[in] rx_buff Spi receive buffer point
* @param[in] rx_len Spi receive buffer length
*
* @return Result
* - 0 Success
* - Other Fail
*/
void spi_receive_data_standard(spi_device_num_t spi_num, spi_chip_select_t chip_select, uint8_t *rx_buff, size_t rx_len);
/**
* @brief Spi normal send by dma
*
* @param[in] spi_num Spi bus number
* @param[in] spi_clk Spi clock rate
*
* @return The real spi clock rate
*/
uint32_t spi_set_clk_rate(spi_device_num_t spi_num, uint32_t spi_clk);
#endif //LAB8_SPI_H

View File

@ -229,7 +229,7 @@ devintr()
// acknowledge the software interrupt by clearing // acknowledge the software interrupt by clearing
// the SSIP bit in sip. // the SSIP bit in sip.
w_sip(r_sip() & ~2); // w_sip(r_sip() & ~2);
return 2; return 2;
} }

View File

@ -2,14 +2,11 @@
#include "kernel/include/types.h" #include "kernel/include/types.h"
#include "kernel/include/stat.h" #include "kernel/include/stat.h"
#include "kernel/include/spinlock.h"
#include "kernel/include/sleeplock.h"
#include "kernel/include/fs.h"
#include "kernel/include/file.h" #include "kernel/include/file.h"
#include "xv6-user/user.h"
#include "kernel/include/fcntl.h" #include "kernel/include/fcntl.h"
#include "xv6-user/user.h"
char *argv[] = { "_sh", 0 }; char *argv[] = { "sh", 0 };
int int
main(void) main(void)