77 lines
2.3 KiB
C
77 lines
2.3 KiB
C
// See LICENSE for license details.
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// borrowed from https://github.com/riscv/riscv-pk:
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// machine/atomic.h
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#ifndef _RISCV_ATOMIC_H_
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#define _RISCV_ATOMIC_H_
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// Currently, interrupts are always disabled in M-mode.
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// todo: for PKE, wo turn on irq in lab_1_3_timer, so wo have to implement these two functions.
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#define disable_irqsave() (0)
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#define enable_irqrestore(flags) ((void)(flags))
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typedef struct {
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int lock;
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// For debugging:
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char* name; // Name of lock.
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struct cpu* cpu; // The cpu holding the lock.
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} spinlock_t;
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#define SPINLOCK_INIT \
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{ 0 }
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#define mb() asm volatile("fence" ::: "memory")
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#define atomic_set(ptr, val) (*(volatile typeof(*(ptr))*)(ptr) = val)
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#define atomic_read(ptr) (*(volatile typeof(*(ptr))*)(ptr))
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#define atomic_binop(ptr, inc, op) \
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({ \
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long flags = disable_irqsave(); \
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typeof(*(ptr)) res = atomic_read(ptr); \
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atomic_set(ptr, op); \
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enable_irqrestore(flags); \
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res; \
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})
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#define atomic_add(ptr, inc) atomic_binop(ptr, inc, res + (inc))
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#define atomic_or(ptr, inc) atomic_binop(ptr, inc, res | (inc))
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#define atomic_swap(ptr, inc) atomic_binop(ptr, inc, (inc))
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#define atomic_cas(ptr, cmp, swp) \
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({ \
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long flags = disable_irqsave(); \
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typeof(*(ptr)) res = *(volatile typeof(*(ptr))*)(ptr); \
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if (res == (cmp)) *(volatile typeof(ptr))(ptr) = (swp); \
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enable_irqrestore(flags); \
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res; \
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})
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static inline int spinlock_trylock(spinlock_t* lock) {
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int res = atomic_swap(&lock->lock, -1);
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mb();
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return res;
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}
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static inline void spinlock_lock(spinlock_t* lock) {
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do {
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while (atomic_read(&lock->lock))
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;
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} while (spinlock_trylock(lock));
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}
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static inline void spinlock_unlock(spinlock_t* lock) {
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mb();
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atomic_set(&lock->lock, 0);
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}
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static inline long spinlock_lock_irqsave(spinlock_t* lock) {
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long flags = disable_irqsave();
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spinlock_lock(lock);
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return flags;
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}
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static inline void spinlock_unlock_irqrestore(spinlock_t* lock, long flags) {
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spinlock_unlock(lock);
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enable_irqrestore(flags);
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}
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#endif
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