upgrading common and zedboard to vivado 2014.2

common/zynq_rocketchip.tcl

@@ -1,10 +1,10 @@
 #
-# Vivado (TM) v2013.4 (64-bit)
+# Vivado (TM) v2014.2 (64-bit)
 #
 # BOARD_NAME_HERE_rocketchip.tcl: Tcl script for re-creating project 'BOARD_NAME_HERE_rocketchip'
 #
-# Generated by Vivado on Fri Aug 01 10:36:13 PDT 2014
-# IP Build 208076 on Mon Dec  2 12:38:17 MST 2013
+# Generated by Vivado on Fri Sep 12 16:05:06 PDT 2014
+# IP Build 924643 on Fri May 30 09:20:16 MDT 2014
 #
 # This file contains the Vivado Tcl commands for re-creating the project to the state*
 # when this script was generated. In order to re-create the project, please source this
@@ -14,8 +14,11 @@
 #   original project, however they will not be launched automatically. To regenerate the
 #   run results please launch the synthesis/implementation runs as needed.
 
-# Set the original project directory path for adding/importing sources in the new project
-set orig_proj_dir "./BOARD_NAME_HERE_rocketchip"
+# Set the reference directory for source file relative paths (by default the value is script directory path)
+set origin_dir "."
+
+# Set the directory path for the original project from where this script was exported
+set orig_proj_dir "[file normalize "$origin_dir/BOARD_NAME_HERE_rocketchip"]"
 
 # Create project
 create_project BOARD_NAME_HERE_rocketchip $orig_proj_dir
@@ -25,22 +28,24 @@ set proj_dir [get_property directory [current_project]]
 
 # Set project properties
 set obj [get_projects BOARD_NAME_HERE_rocketchip]
+set_property "default_lib" "xil_defaultlib" $obj
 set_property "part" "PART_NUMBER_HERE" $obj
 # REPLACE FOR OFFICIAL BOARD NAME $obj
 set_property "simulator_language" "Mixed" $obj
 
 # Create 'sources_1' fileset (if not found)
-if {[string equal [get_filesets sources_1] ""]} {
+if {[string equal [get_filesets -quiet sources_1] ""]} {
   create_fileset -srcset sources_1
 }
 
-# Import local files from the original project
+# Set 'sources_1' fileset object
+set obj [get_filesets sources_1]
 set files [list \
- "[file normalize "$orig_proj_dir/../src/verilog/Top.DefaultFPGAConfig.v"]"\
- "[file normalize "$orig_proj_dir/../src/verilog/rocketchip_wrapper.v"]"\
- "[file normalize "$orig_proj_dir/../src/verilog/clocking.vh"]"\
+ "[file normalize "$origin_dir/src/verilog/clocking.vh"]"\
+ "[file normalize "$origin_dir/src/verilog/Top.DefaultFPGAConfig.v"]"\
+ "[file normalize "$origin_dir/src/verilog/rocketchip_wrapper.v"]"\
 ]
-set imported_files [import_files -fileset sources_1 $files]
+add_files -norecurse -fileset $obj $files
 
 # Set 'sources_1' fileset file properties for remote files
 # None
@@ -53,34 +58,31 @@ set obj [get_filesets sources_1]
 set_property "top" "rocketchip_wrapper" $obj
 
 # Create 'constrs_1' fileset (if not found)
-if {[string equal [get_filesets constrs_1] ""]} {
+if {[string equal [get_filesets -quiet constrs_1] ""]} {
   create_fileset -constrset constrs_1
 }
 
-# Add files to 'constrs_1' fileset
+# Set 'constrs_1' fileset object
 set obj [get_filesets constrs_1]
-set files [list \
- "[file normalize "$orig_proj_dir/../src/constrs/base.xdc"]"\
-]
-add_files -norecurse -fileset $obj $files
 
-
-# Set 'constrs_1' fileset file properties for remote files
-set file "$orig_proj_dir/../src/constrs/base.xdc"
+# Add/Import constrs file and set constrs file properties
+set file "[file normalize "$origin_dir/src/constrs/base.xdc"]"
+set file_added [add_files -norecurse -fileset $obj $file]
+set file "$origin_dir/src/constrs/base.xdc"
 set file [file normalize $file]
-set file_obj [get_files -of_objects constrs_1 [list "*$file"]]
+set file_obj [get_files -of_objects [get_filesets constrs_1] [list "*$file"]]
 set_property "file_type" "XDC" $file_obj
 
 # Set 'constrs_1' fileset properties
 set obj [get_filesets constrs_1]
-set_property "target_constrs_file" "$orig_proj_dir/../src/constrs/base.xdc" $obj
+set_property "target_constrs_file" "[file normalize "$origin_dir/src/constrs/base.xdc"]" $obj
 
 # Create 'sim_1' fileset (if not found)
-if {[string equal [get_filesets sim_1] ""]} {
+if {[string equal [get_filesets -quiet sim_1] ""]} {
   create_fileset -simset sim_1
 }
 
-# Add files to 'sim_1' fileset
+# Set 'sim_1' fileset object
 set obj [get_filesets sim_1]
 # Empty (no sources present)
 
@@ -89,16 +91,16 @@ set obj [get_filesets sim_1]
 set_property "top" "rocketchip_wrapper" $obj
 
 # Create 'synth_1' run (if not found)
-if {[string equal [get_runs synth_1] ""]} {
-  create_run -name synth_1 -part PART_NUMBER_HERE -flow {Vivado Synthesis 2013} -strategy "Vivado Synthesis Defaults" -constrset constrs_1
+if {[string equal [get_runs -quiet synth_1] ""]} {
+  create_run -name synth_1 -part PART_NUMBER_HERE -flow {Vivado Synthesis 2014} -strategy "Vivado Synthesis Defaults" -constrset constrs_1
 }
 set obj [get_runs synth_1]
 set_property "needs_refresh" "1" $obj
 set_property "part" "PART_NUMBER_HERE" $obj
 
 # Create 'impl_1' run (if not found)
-if {[string equal [get_runs impl_1] ""]} {
-  create_run -name impl_1 -part PART_NUMBER_HERE -flow {Vivado Implementation 2013} -strategy "Vivado Implementation Defaults" -constrset constrs_1 -parent_run synth_1
+if {[string equal [get_runs -quiet impl_1] ""]} {
+  create_run -name impl_1 -part PART_NUMBER_HERE -flow {Vivado Implementation 2014} -strategy "Vivado Implementation Defaults" -constrset constrs_1 -parent_run synth_1
 }
 set obj [get_runs impl_1]
 set_property "needs_refresh" "1" $obj