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bors a69df72bdc Auto merge of #132664 - matthiaskrgr:rollup-i27nr7i, r=matthiaskrgr 
Rollup of 5 pull requests

Successful merges:

 - #131261 (Stabilize `UnsafeCell::from_mut`)
 - #131405 (bootstrap/codegen_ssa: ship llvm-strip and use it for -Cstrip)
 - #132077 (Add a new `wide-arithmetic` feature for WebAssembly)
 - #132562 (Remove the `wasm32-wasi` target from rustc)
 - #132660 (Remove unused errs.rs file)

Failed merges:

 - #131721 (Add new unstable feature `const_eq_ignore_ascii_case`)

r? `@ghost`
`@rustbot` modify labels: rollup
 		2024-11-06 01:21:42 +00:00
..
src Auto merge of #132664 - matthiaskrgr:rollup-i27nr7i, r=matthiaskrgr 2024-11-06 01:21:42 +00:00
Cargo.toml compiler: Factor rustc_target::abi out of cg_llvm 2024-10-08 18:24:56 -07:00
README.md
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messages.ftl mark some target features as 'forbidden' so they cannot be (un)set 2024-11-04 22:56:47 +01:00

README.md

The codegen crate contains the code to convert from MIR into LLVM IR, and then from LLVM IR into machine code. In general it contains code that runs towards the end of the compilation process.

For more information about how codegen works, see the rustc dev guide.