526 lines
17 KiB
Plaintext
526 lines
17 KiB
Plaintext
/***************************************************************************************************
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* Copyright (c) 2017 - 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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**************************************************************************************************/
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/*! \file
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\brief Unit test for the PipelineTmaAsync class as it would be used in a Warp specialized loop
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*/
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#define KERNEL_DBG_TRACE false
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#include "../common/cutlass_unit_test.h"
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#include <thrust/host_vector.h>
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#include <thrust/device_vector.h>
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#include <cute/tensor.hpp>
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#include <cute/arch/cluster_sm90.hpp>
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#include <cutlass/util/reference/host/gemm.h>
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#include <cutlass/cluster_launch.hpp>
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#include "cutlass/core_io.h"
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#include "cutlass/util/print_error.hpp"
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#include "cutlass/util/GPU_Clock.hpp"
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#include "testbed.h"
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#include "cutlass/pipeline/pipeline.hpp"
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#include "cutlass/arch/barrier.h"
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#include "cute/arch/cluster_sm90.hpp"
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#include "cutlass/arch/barrier.h"
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#include "cutlass/arch/reg_reconfig.h"
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using namespace cute;
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using namespace cutlass;
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//////////////////// KERNEL /////////////////////////
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template <uint32_t Stages>
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struct SharedStorage
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{
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typename cutlass::PipelineTmaAsync<Stages>::SharedStorage storage ;
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};
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struct KernelParams
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{
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uint32_t num_iterations;
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int* data_ptr;
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};
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// Goal of this kernel is to complete deadlock-free
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template <typename ClusterShape, uint32_t Stages>
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__launch_bounds__(384, 1)
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__global__ static
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void pipeline_device(KernelParams const kernel_params)
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{
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extern __shared__ char shared_memory[];
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using MainloopPipeline = typename cutlass::PipelineTmaAsync<Stages>;
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using PipelineState = typename cutlass::PipelineState<Stages>;
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using SharedStorage = SharedStorage<Stages>;
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SharedStorage& shared_storage = *reinterpret_cast<SharedStorage*>(shared_memory);
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[[maybe_unused]] auto cta_layout = Layout<ClusterShape>{}; // (m,n) -> cta_id
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int warp_group_idx = __shfl_sync(0xffffffff, threadIdx.x / 128, 0);
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int warp_idx_in_warpgroup = __shfl_sync(0xffffffff, (threadIdx.x / 32) % 4, 0);
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int warp_group_thread_idx = threadIdx.x % 128;
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dim3 block_id_in_cluster = cute::block_id_in_cluster();
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auto cluster_shape = ClusterShape{};
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// #Producers = #RowsInCluster + #ColsInCluster - 1
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uint32_t const NumProducers = cute::size<0>(cluster_shape) + cute::size<1>(cluster_shape) - 1;
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uint32_t const TmaTransactionBytes = static_cast<uint32_t>(sizeof(uint32_t) * NumProducers);
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uint32_t const per_cta_bytes = sizeof(uint32_t);
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// mbarrier.init
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typename MainloopPipeline::Params params;
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params.transaction_bytes = TmaTransactionBytes;
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if (warp_group_idx == 0) {
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params.role = MainloopPipeline::ThreadCategory::Producer;
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}
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else {
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params.role = MainloopPipeline::ThreadCategory::Consumer;
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}
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params.is_leader = warp_group_thread_idx == 0;
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params.num_consumers = 128;
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MainloopPipeline pipeline(shared_storage.storage, params, cluster_shape);
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__syncthreads();
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// Ensure All CTAs in Cluster have completed init before issuing commits
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cute::cluster_arrive_relaxed();
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cute::cluster_wait();
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// Producer WarpGroup
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if (warp_group_idx == 0) {
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cutlass::arch::warpgroup_reg_alloc<232>();
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int lane_predicate = cute::elect_one_sync();
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if (warp_idx_in_warpgroup == 0 && lane_predicate) {
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int tma_k_prologue = min(Stages, kernel_params.num_iterations);
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// Simulating Prologue TMA Loads
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// For the DMA (prologue) - we start with an opposite phase - since we skip all waits
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// i.e., we know that the buffer is indeed empty
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PipelineState smem_pipe_write = make_producer_start_state<MainloopPipeline>();
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CUTLASS_PRAGMA_UNROLL
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for(int i = 0; i < tma_k_prologue; ++i) {
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pipeline.producer_acquire(smem_pipe_write);
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// Simulating cp.async.bulk.tensor behavior
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pipeline.producer_commit(smem_pipe_write, per_cta_bytes);
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++smem_pipe_write;
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}
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int tma_k_iter = kernel_params.num_iterations - tma_k_prologue;
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// Simulating Mainloop TMA Loads
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CUTE_NO_UNROLL
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for ( ; tma_k_iter > 0; --tma_k_iter) {
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pipeline.producer_acquire(smem_pipe_write);
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// Simulating cp.async.bulk.tensor behavior
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pipeline.producer_commit(smem_pipe_write, per_cta_bytes);
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// Advance write stage
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++smem_pipe_write;
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}
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// Tail Loop
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// Handles the case where we never enter the mainloop
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PipelineState tail = tma_k_prologue == Stages ? smem_pipe_write : PipelineState{};
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for ( int i = 0; i < tma_k_prologue; ++i) {
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pipeline.producer_acquire(tail);
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++tail;
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}
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}
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// Consumer WarpGroup
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} else if(warp_group_idx == 1) {
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cutlass::arch::warpgroup_reg_alloc<232>();
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PipelineState smem_pipe_read;
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PipelineState smem_pipe_release;
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// simulates accumulators + extra reg. pressure
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int arr[168];
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// Init Shared Memory read stages & PhaseBit
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static constexpr uint32_t K_PIPE_MMAS = 1;
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static_assert( K_PIPE_MMAS < Stages, "ERROR : Too many MMAs in flight");
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// Total number of gemm iterations
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auto gemm_k_iterations = kernel_params.num_iterations;
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// Simulating Prologue MMAs
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int mma_k_prologue = min(K_PIPE_MMAS, gemm_k_iterations);
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CUTLASS_PRAGMA_UNROLL
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for (int iter = 0; iter < mma_k_prologue; ++iter) {
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pipeline.consumer_wait(smem_pipe_read);
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warpgroup_arrive();
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// GMMA would typically happen here
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++smem_pipe_read;
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}
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gemm_k_iterations -= mma_k_prologue;
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// Simulating Mainloop MMAs
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CUTLASS_PRAGMA_NO_UNROLL
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for ( ; gemm_k_iterations > 0; --gemm_k_iterations) {
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/// Wait on the smem_pipe_read stage / phase
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pipeline.consumer_wait(smem_pipe_read);
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warpgroup_arrive();
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// GMMA would typically happen here
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// Dummy op - which will never happen
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// But simulates high register usage.
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CUTE_UNROLL
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for(int i = 0; i < 168; ++i){
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if (threadIdx.x > 256){
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arr[i] += kernel_params.data_ptr[i];
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}
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}
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pipeline.consumer_release(smem_pipe_release);
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// Advance stages
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++smem_pipe_read;
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++smem_pipe_release;
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}
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// Dummy op - which will never happen
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CUTE_UNROLL
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for(int i = 0; i < 168; ++i){
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if (threadIdx.x > 256){
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kernel_params.data_ptr[i] = arr[i];
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}
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}
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// Tail Loop
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for (int i = 0; i < K_PIPE_MMAS; ++i){
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pipeline.consumer_release(smem_pipe_release);
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++smem_pipe_release;
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}
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// Warp-Group #2
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} else {
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cutlass::arch::warpgroup_reg_dealloc<40>();
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}
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}
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/////////////////////////////////////////////////////
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/// Device NT GMMA + TMA specialized
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template<uint32_t Stages_, typename ClusterShape_>
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struct PipelineTest {
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//
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// Data members
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//
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static constexpr uint32_t Stages = Stages_;
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static constexpr uint32_t kBlockSize = 128 * 3;
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using ClusterShape = ClusterShape_;
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//
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// Methods
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//
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// Ctor
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PipelineTest(){};
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// Run CuTe GEMM kernel
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cudaError_t run(uint32_t const kNumIters,
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cudaStream_t stream = 0) {
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float elapsed_ms = 0.0f;
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// Pipeline (multistage pipeline)
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[[maybe_unused]] auto num_stages = Int<Stages>{};
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auto cluster_shape = Shape<Int<ClusterShape::kM>, Int<ClusterShape::kN>, _1>{};
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//
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// Configure and launch
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//
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int iterations = 1;
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cudaEvent_t events[2];
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cudaError_t result;
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for (cudaEvent_t & event : events) {
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result = cudaEventCreate(&event);
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if (result != cudaSuccess) {
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std::cerr << "Error: Failed to create event.";
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return result;
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}
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}
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result = cudaEventRecord(events[0]);
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if (result != cudaSuccess) {
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std::cerr << "Error: Failed to record start event.";
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return result;
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}
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for (int iter = 0; iter < iterations; ++iter) {
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using MainloopPipeline = typename cutlass::PipelineTmaAsync<Stages>;
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int smem_size = int(sizeof(SharedStorage<Stages>));
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result = cudaFuncSetAttribute(
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pipeline_device<decltype(cluster_shape), Stages>,
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cudaFuncAttributeMaxDynamicSharedMemorySize,
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smem_size);
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// Launch a single Cluster, with kBlockSize threads per CTA
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dim3 dimCluster(size<0>(cluster_shape), size<1>(cluster_shape), 1);
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dim3 dimGrid(size<0>(cluster_shape), size<1>(cluster_shape), 1);
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dim3 dimBlock(kBlockSize,1,1);
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const void* kernel = (const void*)pipeline_device<decltype(cluster_shape), Stages>;
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KernelParams params{kNumIters, nullptr};
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void* kernel_params[] = {reinterpret_cast<void*>(¶ms)};
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cutlass::ClusterLauncher::launch(dimGrid, dimCluster, dimBlock, smem_size, stream, kernel, kernel_params);
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}
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result = cudaEventRecord(events[1]);
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if (result != cudaSuccess) {
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std::cerr << "Error: Failed to record stop event.";
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return result;
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}
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result = cudaDeviceSynchronize();
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if (result != cudaSuccess) {
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std::cerr << "Error: cudaDeviceSynchronize() failed" << std::endl;
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return result;
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}
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result = cudaEventElapsedTime(&elapsed_ms, events[0], events[1]);
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if (result != cudaSuccess) {
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std::cerr << "Failed to create event.";
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return result;
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}
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for (cudaEvent_t & event : events) {
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(void)cudaEventDestroy(event);
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}
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return cudaSuccess;
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}
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};
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#if CUDA_12_0_SM90_FEATURES_SUPPORTED
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TEST(SM90_Verify_PipelineTmaAsync_WS, Cluster1x1_Stage2) {
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Options options;
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using ClusterShape = cutlass::gemm::GemmShape<1, 1, 1>;
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static constexpr uint32_t Stages = 2;
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using Test = PipelineTest<Stages, ClusterShape>;
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Testbed<Test> testbed(options);
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EXPECT_TRUE(testbed.verification());
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}
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TEST(SM90_Verify_PipelineTmaAsync_WS, Cluster1x1_Stage5) {
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Options options;
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using ClusterShape = cutlass::gemm::GemmShape<1, 1, 1>;
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static constexpr uint32_t Stages = 5;
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using Test = PipelineTest<Stages, ClusterShape>;
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Testbed<Test> testbed(options);
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EXPECT_TRUE(testbed.verification());
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}
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TEST(SM90_Verify_PipelineTmaAsync_WS, Cluster1x1_Stage10) {
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Options options;
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using ClusterShape = cutlass::gemm::GemmShape<1, 1, 1>;
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static constexpr uint32_t Stages = 10;
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using Test = PipelineTest<Stages, ClusterShape>;
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Testbed<Test> testbed(options);
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EXPECT_TRUE(testbed.verification());
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}
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TEST(SM90_Verify_PipelineTmaAsync_WS, Cluster2x2_Stage2) {
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Options options;
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using ClusterShape = cutlass::gemm::GemmShape<2, 2, 1>;
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static constexpr uint32_t Stages = 2;
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using Test = PipelineTest<Stages, ClusterShape>;
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Testbed<Test> testbed(options);
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EXPECT_TRUE(testbed.verification());
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}
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TEST(SM90_Verify_PipelineTmaAsync_WS, Cluster2x2_Stage5) {
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Options options;
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using ClusterShape = cutlass::gemm::GemmShape<2, 2, 1>;
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static constexpr uint32_t Stages = 5;
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using Test = PipelineTest<Stages, ClusterShape>;
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Testbed<Test> testbed(options);
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EXPECT_TRUE(testbed.verification());
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}
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TEST(SM90_Verify_PipelineTmaAsync_WS, Cluster2x2_Stage7) {
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Options options;
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using ClusterShape = cutlass::gemm::GemmShape<2, 2, 1>;
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static constexpr uint32_t Stages = 7;
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using Test = PipelineTest<Stages, ClusterShape>;
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Testbed<Test> testbed(options);
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EXPECT_TRUE(testbed.verification());
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}
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TEST(SM90_Verify_PipelineTmaAsync_WS, Cluster4x4_Stage2) {
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Options options;
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using ClusterShape = cutlass::gemm::GemmShape<4, 4, 1>;
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static constexpr uint32_t Stages = 2;
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using Test = PipelineTest<Stages, ClusterShape>;
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Testbed<Test> testbed(options);
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EXPECT_TRUE(testbed.verification());
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}
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TEST(SM90_Verify_PipelineTmaAsync_WS, Cluster4x4_Stage7) {
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Options options;
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using ClusterShape = cutlass::gemm::GemmShape<4, 4, 1>;
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static constexpr uint32_t Stages = 7;
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using Test = PipelineTest<Stages, ClusterShape>;
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Testbed<Test> testbed(options);
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EXPECT_TRUE(testbed.verification());
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}
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TEST(SM90_Verify_PipelineTmaAsync_WS, Cluster2x1_Stage2) {
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Options options;
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using ClusterShape = cutlass::gemm::GemmShape<2, 1, 1>;
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static constexpr uint32_t Stages = 2;
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using Test = PipelineTest<Stages, ClusterShape>;
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Testbed<Test> testbed(options);
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EXPECT_TRUE(testbed.verification());
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}
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TEST(SM90_Verify_PipelineTmaAsync_WS, Cluster2x1_Stage7) {
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Options options;
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using ClusterShape = cutlass::gemm::GemmShape<2, 1, 1>;
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static constexpr uint32_t Stages = 7;
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using Test = PipelineTest<Stages, ClusterShape>;
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Testbed<Test> testbed(options);
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EXPECT_TRUE(testbed.verification());
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}
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TEST(SM90_Verify_PipelineTmaAsync_WS, Cluster1x2_Stage2) {
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Options options;
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using ClusterShape = cutlass::gemm::GemmShape<1, 2, 1>;
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static constexpr uint32_t Stages = 2;
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using Test = PipelineTest<Stages, ClusterShape>;
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Testbed<Test> testbed(options);
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EXPECT_TRUE(testbed.verification());
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}
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TEST(SM90_Verify_PipelineTmaAsync_WS, Cluster1x2_Stage7) {
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Options options;
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using ClusterShape = cutlass::gemm::GemmShape<1, 2, 1>;
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static constexpr uint32_t Stages = 7;
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using Test = PipelineTest<Stages, ClusterShape>;
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Testbed<Test> testbed(options);
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EXPECT_TRUE(testbed.verification());
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}
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TEST(SM90_Verify_PipelineTmaAsync_WS, Cluster4x1_Stage2) {
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Options options;
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using ClusterShape = cutlass::gemm::GemmShape<4, 1, 1>;
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static constexpr uint32_t Stages = 2;
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using Test = PipelineTest<Stages, ClusterShape>;
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Testbed<Test> testbed(options);
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EXPECT_TRUE(testbed.verification());
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}
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TEST(SM90_Verify_PipelineTmaAsync_WS, Cluster4x1_Stage7) {
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Options options;
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using ClusterShape = cutlass::gemm::GemmShape<4, 1, 1>;
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static constexpr uint32_t Stages = 7;
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using Test = PipelineTest<Stages, ClusterShape>;
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Testbed<Test> testbed(options);
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EXPECT_TRUE(testbed.verification());
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}
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TEST(SM90_Verify_PipelineTmaAsync_WS, Cluster1x4_Stage2) {
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Options options;
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using ClusterShape = cutlass::gemm::GemmShape<1, 4, 1>;
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static constexpr uint32_t Stages = 2;
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using Test = PipelineTest<Stages, ClusterShape>;
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Testbed<Test> testbed(options);
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EXPECT_TRUE(testbed.verification());
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}
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TEST(SM90_Verify_PipelineTmaAsync_WS, Cluster1x4_Stage7) {
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Options options;
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using ClusterShape = cutlass::gemm::GemmShape<1, 4, 1>;
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static constexpr uint32_t Stages = 7;
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using Test = PipelineTest<Stages, ClusterShape>;
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Testbed<Test> testbed(options);
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EXPECT_TRUE(testbed.verification());
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}
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TEST(SM90_Verify_PipelineTmaAsync_WS, Cluster2x4_Stage2) {
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Options options;
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using ClusterShape = cutlass::gemm::GemmShape<2, 4, 1>;
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static constexpr uint32_t Stages = 2;
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using Test = PipelineTest<Stages, ClusterShape>;
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Testbed<Test> testbed(options);
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EXPECT_TRUE(testbed.verification());
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}
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TEST(SM90_Verify_PipelineTmaAsync_WS, Cluster2x4_Stage7) {
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Options options;
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using ClusterShape = cutlass::gemm::GemmShape<2, 4, 1>;
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static constexpr uint32_t Stages = 7;
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using Test = PipelineTest<Stages, ClusterShape>;
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Testbed<Test> testbed(options);
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EXPECT_TRUE(testbed.verification());
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}
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TEST(SM90_Verify_PipelineTmaAsync_WS, Cluster4x2_Stage2) {
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|
Options options;
|
|
using ClusterShape = cutlass::gemm::GemmShape<4, 2, 1>;
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|
static constexpr uint32_t Stages = 2;
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|
using Test = PipelineTest<Stages, ClusterShape>;
|
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Testbed<Test> testbed(options);
|
|
EXPECT_TRUE(testbed.verification());
|
|
}
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|
|
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TEST(SM90_Verify_PipelineTmaAsync_WS, Cluster4x2_Stage7) {
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|
Options options;
|
|
using ClusterShape = cutlass::gemm::GemmShape<4, 2, 1>;
|
|
static constexpr uint32_t Stages = 7;
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|
using Test = PipelineTest<Stages, ClusterShape>;
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Testbed<Test> testbed(options);
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|
EXPECT_TRUE(testbed.verification());
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}
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#endif
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