199 lines
7.4 KiB
C++
199 lines
7.4 KiB
C++
/***************************************************************************************************
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* Copyright (c) 2017 - 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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**************************************************************************************************/
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#pragma once
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#include "cutlass_unit_test.h"
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#include <iostream>
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#include <cstdint>
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#include <thrust/host_vector.h>
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#include <thrust/device_vector.h>
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#include <cute/tensor.hpp>
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namespace cutlass::test {
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template <class ElementType, class SmemLayout>
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struct SharedStorage
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{
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cute::ArrayEngine<ElementType, cute::cosize_v<SmemLayout>> smem;
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};
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#if CUDA_12_0_SM90_FEATURES_SUPPORTED
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template <class T, class TiledCopy, class CTA_Tiler, class GmemLayout, class SmemLayout>
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__global__ void
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tma_test_device_cute(T const* g_in, T* g_out,
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CUTE_GRID_CONSTANT TiledCopy const tma, CTA_Tiler cta_tiler,
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GmemLayout gmem_layout, SmemLayout smem_layout)
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{
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using namespace cute;
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CUTE_STATIC_ASSERT_V(product_each(shape(cta_tiler)) == product_each(shape(smem_layout)));
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// Use Shared Storage structure to allocate and distribute aligned SMEM addresses
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extern __shared__ char shared_memory[];
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using SharedStorage = SharedStorage<T, SmemLayout>;
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SharedStorage& shared_storage = *reinterpret_cast<SharedStorage*>(shared_memory);
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// Construct SMEM tensor
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Tensor sB = make_tensor(make_smem_ptr(shared_storage.smem.begin()), smem_layout); // (CTA_TILE_M,CTA_TILE_N,...)
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// TMA requires special handling of strides to deal with coord codomain mapping
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// Represent the full tensors -- get these from TMA
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Tensor mA = make_tensor(make_gmem_ptr<T>(g_in), gmem_layout);
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Tensor mB = tma.get_tma_tensor(shape(gmem_layout));
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constexpr int R = rank_v<CTA_Tiler>;
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Tensor gA = flat_divide(mA, cta_tiler); // (CTA_TILE_M,CTA_TILE_N,...REST_M,REST_N,...)
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Tensor gB = flat_divide(mB, cta_tiler); // (CTA_TILE_M,CTA_TILE_N,...REST_M,REST_N,...)
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//
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// Prepare the TMA_STORE
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//
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auto cta_tma = tma.get_slice(Int<0>{}); // CTA slice
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Tensor tBsB_x = cta_tma.partition_S(sB); // (TMA,TMA_M,TMA_N)
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Tensor tBgB_x = cta_tma.partition_D(gB); // (TMA,TMA_M,TMA_N,REST_M,REST_N)
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#if 0
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if (thread0()) {
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print(tma);
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print("TILE : "); print(cta_tiler); print("\n");
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print(" mB : "); print( mB.data()); print(" o "); print( mB.layout()); print("\n");
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print(" gB : "); print( gB.data()); print(" o "); print( gB.layout()); print("\n");
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print("tBgB_x: "); print(tBgB_x.data()); print(" o "); print(tBgB_x.layout()); print("\n");
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print(" sB : "); print( sB.data()); print(" o "); print( sB.layout()); print("\n");
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print("tBsB_x: "); print(tBsB_x.data()); print(" o "); print(tBsB_x.layout()); print("\n");
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}
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#endif
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//
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// Perform the TMA_STORE
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//
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// INPUT: Group the CTA_TILE_X modes and REST_X modes for input
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Tensor tAgA = group_modes<0,R>(group_modes<R,rank(gA)>(gA)); // (CTA_TILE, REST)
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// OUTPUT: Group the REST_X modes and the TMA_X modes to easily iterate through the tiles
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Tensor tBgB = group_modes<1,rank(tBgB_x)>(tBgB_x); // (TMA,REST)
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Tensor tBsB = group_modes<1,rank(tBsB_x)>(tBsB_x); // (TMA,REST)
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static_assert(size<1>(tBsB) == 1);
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#if 0
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if (thread0()) {
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print("tAgA : "); print(tAgA.data()); print(" o "); print(tAgA.layout()); print("\n");
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print("tBsB : "); print(tBsB.data()); print(" o "); print(tBsB.layout()); print("\n");
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print("tBgB : "); print(tBgB.data()); print(" o "); print(tBgB.layout()); print("\n");
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}
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#endif
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// Loop over the TMA stages, using smem as our buffer
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for (int stage = 0; stage < size<1>(tBgB); ++stage)
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{
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//
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// Read in trivially gmem -> smem
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//
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// Subbyte elements could cause race conditions, so be even more conservative
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if (thread0()) {
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copy(tAgA(_,stage), sB);
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}
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__syncthreads();
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cute::cp_async_wait<0>();
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//
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// Perform the TMA_STORE
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//
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if (threadIdx.x == 0) {
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copy(tma, tBsB(_,0), tBgB(_,stage));
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}
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tma_store_wait<0>();
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__syncthreads();
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}
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}
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template <class T, class TmaType = T, class CopyOp, class GMEM_Layout, class SMEM_Layout, class CTA_Tile>
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void
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test_tma_store(CopyOp const& copy_op,
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GMEM_Layout const& gmem_layout,
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SMEM_Layout const& smem_layout,
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CTA_Tile const& cta_tile)
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{
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using namespace cute;
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// Allocate and initialize host test data
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size_t N = ceil_div(cosize(gmem_layout) * sizeof_bits<T>::value, 8);
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thrust::host_vector<uint8_t> h_in(N);
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for (size_t i = 0; i < h_in.size(); ++i) {
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h_in[i] = uint8_t(i % 13);
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}
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Tensor hA_in = make_tensor(recast_ptr<T>(h_in.data()), gmem_layout);
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// Allocate and initialize device test data
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thrust::device_vector<uint8_t> d_in = h_in;
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thrust::device_vector<uint8_t> d_out(h_in.size(), uint8_t(-1)); // overflow uint
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// Create TMA for this device Tensor
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Tensor gA = make_tensor(make_gmem_ptr<T>(raw_pointer_cast(d_out.data())), gmem_layout);
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auto tma = make_tma_copy<TmaType>(copy_op, gA, smem_layout, cta_tile, Int<1>{});
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//print(tma);
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// Launch
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int smem_size = int(sizeof(SharedStorage<T, decltype(smem_layout)>));
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tma_test_device_cute<<<1, 128, smem_size>>>(
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reinterpret_cast<T const*>(raw_pointer_cast(d_in.data())),
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reinterpret_cast<T*> (raw_pointer_cast(d_out.data())),
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tma, cta_tile,
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gmem_layout,
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smem_layout);
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// Copy results back to host
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thrust::host_vector<uint8_t> h_out = d_out;
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Tensor hA_out = make_tensor(recast_ptr<T>(h_out.data()), gmem_layout);
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// Validate the results. Print only the first 3 errors.
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int count = 3;
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for (int i = 0; i < int(size(hA_out)) && count > 0; ++i) {
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EXPECT_EQ(hA_in(i), hA_out(i));
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if (hA_in(i) != hA_out(i)) {
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--count;
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}
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}
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}
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#endif
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} // end namespace cutlass::test
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