88 lines
3.1 KiB
C++
88 lines
3.1 KiB
C++
/***************************************************************************************************
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* Copyright (c) 2023 - 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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**************************************************************************************************/
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#pragma once
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#include <cute/config.hpp>
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#include <cute/arch/mma.hpp>
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// Config
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#if (defined(__CUDA_ARCH__) && (__CUDA_ARCH__ >= 610))
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# define CUTE_ARCH_MMA_SM61_ENABLED
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#endif
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namespace cute
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{
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struct SM61_DP4A
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{
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using DRegisters = int32_t[1];
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using ARegisters = uint32_t[1];
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using BRegisters = uint32_t[1];
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using CRegisters = int32_t[1];
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// Register asm fma
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CUTE_HOST_DEVICE static void
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fma(int32_t& d, uint32_t const& a, uint32_t const& b, int32_t const& c)
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{
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#if defined(CUTE_ARCH_MMA_SM61_ENABLED)
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asm volatile("dp4a.s32.s32 %0, %1, %2, %3;"
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: "=r"(d)
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: "r"(a), "r"(b), "r"(c));
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#else
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CUTE_INVALID_CONTROL_PATH("Attempting to use SM61_DP4A without CUTE_ARCH_MMA_SM61_ENABLED");
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#endif
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}
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};
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struct SM61_DP2A
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{
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using DRegisters = int32_t[1];
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using ARegisters = uint32_t[1];
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using BRegisters = uint32_t[1];
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using CRegisters = int32_t[1];
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// Register asm fma
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CUTE_HOST_DEVICE static void
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fma(int32_t& d, uint32_t const& a, uint32_t const& b, int32_t const& c)
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{
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#if defined(CUTE_ARCH_MMA_SM61_ENABLED)
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asm volatile("dp2a.s32.s32 %0, %1, %2, %3;"
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: "=r"(d)
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: "r"(a), "r"(b), "r"(c));
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#else
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CUTE_INVALID_CONTROL_PATH("Attempting to use SM61_DP2A without CUTE_ARCH_MMA_SM61_ENABLED");
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#endif
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}
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};
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} // namespace cute
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