cst-to-llhd/test/addition.v

module addition
#(
    parameter DSIZE = 8
)
(
    input [DSIZE-1:0] a,
    input [DSIZE-1:0] b,
    output [DSIZE-1:0] c
);
assign c = a + b;
endmodule

module top(
    input [3:0] a,
    input [3:0] b,
    output [3:0] c
);
addition#(.DSIZE(4)) i(a, b, c);
endmodule