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Update symbol_declaration.rs 

[to-fix]symbol not found (port declaration and port)
This commit is contained in:
Yanting Zhang 2022-08-22 17:03:17 +08:00
parent 3f85ea5c6e
commit a30771fd68
1 changed files with 39 additions and 8 deletions
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47
src/cst/symbol_declaration.rs
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@ -9,7 +9,9 @@ use std::collections::HashMap;
#[allow(unused_imports)] #[allow(unused_imports)]
use log::{debug, error, info, trace, warn}; use log::{debug, error, info, trace, warn};
pub struct SymbolDeclaration {} pub struct SymbolDeclaration {
//#[derive(Copy, Clone)]
}
impl<'a> SymbolDeclaration { impl<'a> SymbolDeclaration {
pub fn declare_port(json: &'a JsonValue, context: &mut ModuleContext<'a>) { pub fn declare_port(json: &'a JsonValue, context: &mut ModuleContext<'a>) {
@ -23,14 +25,14 @@ impl<'a> SymbolDeclaration {
Tag::MODULE_HEADER, Tag::MODULE_HEADER,
Tag::PAREN_GROUP, Tag::PAREN_GROUP,
Tag::PORT_DECLARATION_LIST, Tag::PORT_DECLARATION_LIST,
Tag::PORT_DECLARATION, //Tag::PORT_DECLARATION,
]; ];
let json_io_ports_2001 = Tools::match_tags(vec![json], base_path_2001.to_vec()); let json_io_ports_2001 = Tools::match_tags(vec![json], base_path_2001.to_vec());
if json_io_ports_2001.len() == 0 { if json_io_ports_2001.len() == 0 {
let json_io_ports_2005 = Tools::match_tags(vec![json], base_path_2005.to_vec()); let mut json_io_ports_2005 = Tools::match_tags(vec![json], base_path_2005.to_vec());
info!("version: Verilog-2005"); info!("version: Verilog-2005");
let symbol_list = Self::gen_port_info_2005(json_io_ports_2005); let symbol_list = Self::gen_port_info_2005(&mut json_io_ports_2005);
for (symbol, info) in symbol_list { for (symbol, info) in symbol_list {
context.symbol.insert(symbol.clone(), info); context.symbol.insert(symbol.clone(), info);
} }
@ -125,11 +127,19 @@ impl<'a> SymbolDeclaration {
.collect::<Vec<_>>() .collect::<Vec<_>>()
} }
fn gen_port_info_2005(json_io_ports: Vec<&'a JsonValue>) -> Vec<(String, SymbolInfo<'a>)> { fn gen_port_info_2005(json_io_ports: &mut Vec<&'a JsonValue>) -> Vec<(String, SymbolInfo<'a>)> {
let name_path = vec![ let name_path = [
vec![
Tag::PORT_DECLARATION, Tag::PORT_DECLARATION,
Tag::UNQUALIFIED_ID, Tag::UNQUALIFIED_ID,
Tag::SYMBOL_IDENTIFIER, Tag::SYMBOL_IDENTIFIER,
],
vec![
Tag::PORT,
Tag::PORT_REFERENCE,
Tag::UNQUALIFIED_ID,
Tag::SYMBOL_IDENTIFIER,
],
]; ];
let dim_path = [ let dim_path = [
@ -143,17 +153,38 @@ impl<'a> SymbolDeclaration {
Tag::DEC_NUMBER, Tag::DEC_NUMBER,
]; ];
json_io_ports let io_paths = [
vec![
Tag::PORT_DECLARATION_LIST,
Tag::PORT_DECLARATION,
],
vec![
Tag::PORT_DECLARATION_LIST,
Tag::PORT,
],
];
let json_io_declarations: Vec<_> = io_paths
.iter()
.flat_map(|x|Tools::match_tags(json_io_ports.to_vec(), x.to_vec()))
.collect();
json_io_declarations
.iter() .iter()
.flat_map(|json_port| { .flat_map(|json_port| {
let kind = match json_port["children"][0]["tag"].as_str() { let kind = match json_port["children"][0]["tag"].as_str() {
Some(Tag::INPUT) => SymbolKind::Input, Some(Tag::INPUT) => SymbolKind::Input,
Some(Tag::OUTPUT) => SymbolKind::Output, Some(Tag::OUTPUT) => SymbolKind::Output,
Some(Tag::INOUT) => SymbolKind::Inout, Some(Tag::INOUT) => SymbolKind::Inout,
Some(Tag::PORT_REFERENCE) => SymbolKind::Inout,
_ => panic!("unknown error at CST node {}", json_port), _ => panic!("unknown error at CST node {}", json_port),
}; };
let width = Self::gen_var_width(json_port, dim_path.to_vec()); let width = Self::gen_var_width(json_port, dim_path.to_vec());
let json_port_names = Tools::match_tags(vec![json_port], name_path.to_vec()); let json_port_names: Vec<_> = name_path
.iter()
.flat_map(|x|Tools::match_tags(vec![json_port], x.to_vec()))
.collect();
assert!(json_port_names.len() > 0); assert!(json_port_names.len() > 0);
json_port_names json_port_names