From a30771fd68b998490fa92335734af1d895e42636 Mon Sep 17 00:00:00 2001
From: Yanting Zhang <mmzyt@qq.com>
Date: Mon, 22 Aug 2022 17:03:17 +0800
Subject: [PATCH] Update symbol_declaration.rs

[to-fix]symbol not found (port declaration and port)
---
 src/cst/symbol_declaration.rs | 47 +++++++++++++++++++++++++++++------
 1 file changed, 39 insertions(+), 8 deletions(-)

diff --git a/src/cst/symbol_declaration.rs b/src/cst/symbol_declaration.rs
index b0e993d..8326847 100644
--- a/src/cst/symbol_declaration.rs
+++ b/src/cst/symbol_declaration.rs
@@ -9,7 +9,9 @@ use std::collections::HashMap;
 #[allow(unused_imports)]
 use log::{debug, error, info, trace, warn};
 
-pub struct SymbolDeclaration {}
+pub struct SymbolDeclaration { 
+//#[derive(Copy, Clone)]
+}
 
 impl<'a> SymbolDeclaration {
     pub fn declare_port(json: &'a JsonValue, context: &mut ModuleContext<'a>) {
@@ -23,14 +25,14 @@ impl<'a> SymbolDeclaration {
             Tag::MODULE_HEADER,
             Tag::PAREN_GROUP,
             Tag::PORT_DECLARATION_LIST,
-            Tag::PORT_DECLARATION,
+            //Tag::PORT_DECLARATION,
         ];
 
         let json_io_ports_2001 = Tools::match_tags(vec![json], base_path_2001.to_vec());
         if json_io_ports_2001.len() == 0 {
-            let json_io_ports_2005 = Tools::match_tags(vec![json], base_path_2005.to_vec());
+            let mut json_io_ports_2005 = Tools::match_tags(vec![json], base_path_2005.to_vec());
             info!("version: Verilog-2005");
-            let symbol_list = Self::gen_port_info_2005(json_io_ports_2005);
+            let symbol_list = Self::gen_port_info_2005(&mut json_io_ports_2005);
             for (symbol, info) in symbol_list {
                 context.symbol.insert(symbol.clone(), info);
             }
@@ -125,11 +127,19 @@ impl<'a> SymbolDeclaration {
             .collect::<Vec<_>>()
     }
 
-    fn gen_port_info_2005(json_io_ports: Vec<&'a JsonValue>) -> Vec<(String, SymbolInfo<'a>)> {
-        let name_path = vec![
+    fn gen_port_info_2005(json_io_ports: &mut Vec<&'a JsonValue>) -> Vec<(String, SymbolInfo<'a>)> {
+        let name_path = [
+            vec![
             Tag::PORT_DECLARATION,
             Tag::UNQUALIFIED_ID,
             Tag::SYMBOL_IDENTIFIER,
+        ],
+            vec![
+            Tag::PORT,
+            Tag::PORT_REFERENCE,
+            Tag::UNQUALIFIED_ID,
+            Tag::SYMBOL_IDENTIFIER,
+        ],
         ];
 
         let dim_path = [
@@ -143,17 +153,38 @@ impl<'a> SymbolDeclaration {
             Tag::DEC_NUMBER,
         ];
 
-        json_io_ports
+        let io_paths = [
+            vec![
+                Tag::PORT_DECLARATION_LIST,
+                Tag::PORT_DECLARATION,
+            ],
+            vec![
+                Tag::PORT_DECLARATION_LIST,
+                Tag::PORT,
+            ],
+        ];
+
+        let json_io_declarations: Vec<_> = io_paths
+						.iter()
+						.flat_map(|x|Tools::match_tags(json_io_ports.to_vec(), x.to_vec()))
+						.collect();
+        
+
+        json_io_declarations
             .iter()
             .flat_map(|json_port| {
                 let kind = match json_port["children"][0]["tag"].as_str() {
                     Some(Tag::INPUT) => SymbolKind::Input,
                     Some(Tag::OUTPUT) => SymbolKind::Output,
                     Some(Tag::INOUT) => SymbolKind::Inout,
+                    Some(Tag::PORT_REFERENCE) => SymbolKind::Inout,
                     _ => panic!("unknown error at CST node {}", json_port),
                 };
                 let width = Self::gen_var_width(json_port, dim_path.to_vec());
-                let json_port_names = Tools::match_tags(vec![json_port], name_path.to_vec());
+                let json_port_names: Vec<_> = name_path
+                .iter()
+                .flat_map(|x|Tools::match_tags(vec![json_port], x.to_vec()))
+                .collect();
                 assert!(json_port_names.len() > 0);
 
                 json_port_names