68 lines
2.0 KiB
INI
68 lines
2.0 KiB
INI
### Sample config file for Cocoon
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### coding: utf-8
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; Multiple flows can be defined and will be run simultaneously
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; For example:
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; [flow_20211023]
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; foo = 1
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; bar = 2
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; [flow_test]
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; foo = 3
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; bar = 4
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; ......
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### Arguments description
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; [demo_flow]
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;
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; # Design settings
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; design_name str Name of the design (top module)
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; is_Chisel_design boolean True / False
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; rtl_input str Path to the verilog file if !is_Chisel_design
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; Chisel_input str Path to the Chisel project if is_Chisel_design
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; result_dir str Where to save the results, default is cocoon/design
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; clk_name str Name of the clock, default is clk
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; delay int Set the delay of IO ports
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; # Library settings
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; lib_name str Name of the technology lib
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; lef_input str Path to the input .lef/.LEF file
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; liberty_input str Path to the input .lib file
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; # External toolkit settings
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; dreamplace_bin_path str Path/to/DREAMPlace/.../Placer.py
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; yosys_bin_path str Path/to/Yosys/build_dir/, which contains yosys and yosys-abc binaries
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; # Flow settings
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; flow dict {'synth':'genus'/'yosys', 'placement':'innovus/dreamplace', 'routing':'innovus'}
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; n_iter_IFT int Define the rounds of iterative feedback tuning, if set to 0 (default), nothing will be done
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[flow1]
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# Design settings
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design_name = TopModule
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is_Chisel_design = True
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rtl_input =
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Chisel_input = /home/wxm/pillars
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result_dir = /home/wxm/cocoon/results/pillars/
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clk_name = clk
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delay = 1000
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# Library settings
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lib_name = gscl45nm
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lef_input = /home/wxm/cocoon/demo/lib/gscl45nm.lef
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liberty_input = /home/wxm/cocoon/demo/lib/gscl45nm.lib
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# External toolkit settings
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dreamplace_bin_path = /home/wxm/DREAMPlace/install/dreamplace/Placer.py
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yosys_bin_path = /home/wxm/yosys/build
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# Flow settings
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flow = {'synth':'genus', 'placement':'dreamplace', 'routing':'innovus'}
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n_iter_IFT = 0
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