add more sample configs

.gitignore

@@ -8,5 +8,8 @@ demo/alu-chisel/project/target/streams/
 gurobi.log
 *.ini
 !config.sample.ini
+!config.sample1.ini
+!config.sample2.ini
+!config.sample3.ini
 
 

demo/config.sample.ini

@@ -1,83 +0,0 @@
-### Sample config file for Cocoon
-### coding: utf-8
-
-; Multiple flows can be defined and will be run simultaneously
-; For example:
-;   [flow_20211023]
-;   foo = 1
-;   bar = 2
-
-;   [flow_test]
-;   foo = 3
-;   bar = 4
-
-;   ......
-
-
-### Arguments description
-
-; [demo_flow]
-; 
-; # Design settings
-; design_name         str         Name of the design (top module)
-; is_Chisel_design    boolean     True / False
-; rtl_input           str         Path to the verilog file if !is_Chisel_design
-; Chisel_input        str         Path to the Chisel project if is_Chisel_design
-; result_dir          str         Where to save the results, default is cocoon/design
-; clk_name            str         Name of the clock, default is clk
-; delay               int         Set the delay of IO ports
-
-; # Library settings (Cocoon supplies an open-source FreePDK45nm library)
-; lib_name            str         Name of the technology lib
-; lef_input           str         Path to the input .lef/.LEF file
-; liberty_input       str         Path to the input .lib file
-
-; # Flow settings
-; flow                dict        {'synth':'genus'/'yosys', 'placement':'innovus/dreamplace', 'routing':'innovus'}
-; n_iter_IFT          int         Define the rounds of iterative feedback tuning, if set to 0 (default), nothing will be done
-;                                  * Only work with Genus synth *
-; verbose             bool        Whether to print detail outputs of each point tools
-; cadence_version     str         15/19
-
-[gcd]
-# Design settings
-design_name = gcd
-is_Chisel_design = False
-rtl_input = ./gcd/gcd.v
-Chisel_input = 
-result_dir = ../results/
-clk_name = clk
-delay = 1000
-
-# Library settings
-lib_name = gscl45nm
-lef_input = ./lib/gscl45nm.lef
-liberty_input = ./lib/gscl45nm.lib
-
-# Flow settings
-flow = {'synth':'yosys', 'placement':'dreamplace', 'routing':'innovus'}
-n_iter_IFT = 0
-verbose = False
-cadence_version = 19
-
-
-[ALU(Chisel)]
-# Design settings
-design_name = AluTop
-is_Chisel_design = True
-rtl_input = ./gcd/gcd.v
-Chisel_input = ./alu-chisel/
-result_dir = ../results/
-clk_name = clk
-delay = 1000
-
-# Library settings
-lib_name = gscl45nm
-lef_input = ./lib/gscl45nm.lef
-liberty_input = ./lib/gscl45nm.lib
-
-# Flow settings
-flow = {'synth':'genus', 'placement':'innovus', 'routing':'innovus'}
-n_iter_IFT = 0
-verbose = False
-cadence_version = 19