support relative path in config

config.py

@@ -19,6 +19,7 @@ class Config:
         # List of different sections (flows) of the .ini file
         self.multi_flows = self.config.sections()
         self.cocoon_home = os.getcwd()
+        self.config_dir = os.path.dirname(os.path.abspath(config_file))
     
     def parse(self):
         flows = []
@@ -36,10 +37,25 @@ class Config:
 
         design.is_Chisel_design = sec.getboolean('is_Chisel_design')
         design.rtl_input = sec.get('rtl_input')
+        if not os.path.isabs(design.rtl_input):  # Relative path
+            design.rtl_input = os.path.join(self.config_dir, design.rtl_input)
+
         design.Chisel_input = sec.get('Chisel_input')
+        if not os.path.isabs(design.Chisel_input):  # Relative path
+            design.Chisel_input = os.path.join(self.config_dir, design.Chisel_input)
+
         design.result_dir = sec.get('result_dir')
+        if not os.path.isabs(design.result_dir):  # Relative path
+            design.result_dir = os.path.join(self.config_dir, design.result_dir)
+
         design.lef_input = sec.get('lef_input')
+        if not os.path.isabs(design.lef_input):  # Relative path
+            design.lef_input = os.path.join(self.config_dir, design.lef_input)
+
         design.liberty_input = sec.get('liberty_input')
+        if not os.path.isabs(design.liberty_input):  # Relative path
+            design.liberty_input = os.path.join(self.config_dir, design.liberty_input)
+
         design.clk_name = sec.get('clk_name')
         design.delay = sec.getint('delay')
 

demo/config.sample.ini

@@ -32,37 +32,52 @@
 ; lef_input           str         Path to the input .lef/.LEF file
 ; liberty_input       str         Path to the input .lib file
 
-; # External toolkit settings
-; cadence_version     str         15/19
-; dreamplace_bin_path str         Path/to/DREAMPlace/.../Placer.py
-; yosys_bin_path      str         Path/to/Yosys/build_dir/, which contains yosys and yosys-abc binaries
-
 ; # Flow settings
 ; flow                dict        {'synth':'genus'/'yosys', 'placement':'innovus/dreamplace', 'routing':'innovus'}
 ; n_iter_IFT          int         Define the rounds of iterative feedback tuning, if set to 0 (default), nothing will be done
-;                                  Only work with Genus synth
+;                                  * Only work with Genus synth *
+; verbose             bool        Whether to print detail outputs of each point tools
+; cadence_version     str         15/19
 
-[demo_flow]
+[gcd]
 # Design settings
-design_name = your_design_topmodule_name
-is_Chisel_design = True
-rtl_input = /Path/to/verilog/file
-Chisel_input = /Path/to/Chisel/project/
-result_dir = /Path/to/result/dir/
+design_name = gcd
+is_Chisel_design = False
+rtl_input = ./gcd/gcd.v
+Chisel_input = 
+result_dir = ../results/
 clk_name = clk
 delay = 1000
 
-# Library settings (Cocoon supplies an open-source FreePDK45nm library)
+# Library settings
 lib_name = gscl45nm
-lef_input = /Path/to/cocoon/demo/lib/gscl45nm.lef
-liberty_input = /Path/to/cocoon/demo/lib/gscl45nm.lib
-
-# External toolkit settings
-cadence_version = 19
-dreamplace_bin_path = /Path/to/DREAMPlace/install/dreamplace/Placer.py
-yosys_bin_path = /Path/to/yosys/build/
+lef_input = ./lib/gscl45nm.lef
+liberty_input = ./lib/gscl45nm.lib
 
 # Flow settings
-flow = {'synth':'genus', 'placement':'dreamplace', 'routing':'innovus'}
+flow = {'synth':'yosys', 'placement':'dreamplace', 'routing':'innovus'}
 n_iter_IFT = 0
-verbose = True
+verbose = False
+cadence_version = 19
+
+
+[ALU(Chisel)]
+# Design settings
+design_name = AluTop
+is_Chisel_design = True
+rtl_input = ./gcd/gcd.v
+Chisel_input = ./alu-chisel/
+result_dir = ../results/
+clk_name = clk
+delay = 1000
+
+# Library settings
+lib_name = gscl45nm
+lef_input = ./lib/gscl45nm.lef
+liberty_input = ./lib/gscl45nm.lib
+
+# Flow settings
+flow = {'synth':'genus', 'placement':'innovus', 'routing':'innovus'}
+n_iter_IFT = 0
+verbose = False
+cadence_version = 19