356 lines
9.2 KiB
C
356 lines
9.2 KiB
C
/* Copyright 2018 Canaan Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file
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* @brief Universal Asynchronous Receiver/Transmitter (UART)
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*
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* The UART peripheral supports the following features:
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*
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* - 8-N-1 and 8-N-2 formats: 8 data bits, no parity bit, 1 start
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* bit, 1 or 2 stop bits
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*
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* - 8-entry transmit and receive FIFO buffers with programmable
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* watermark interrupts
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*
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* - 16× Rx oversampling with 2/3 majority voting per bit
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*
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* The UART peripheral does not support hardware flow control or
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* other modem control signals, or synchronous serial data
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* tranfesrs.
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*
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*
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*/
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#ifndef _DRIVER_APBUART_H
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#define _DRIVER_APBUART_H
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#include <stdint.h>
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#include "platform.h"
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#include "plic.h"
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#include "dmac.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum _uart_dev
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{
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UART_DEV1 = 0,
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UART_DEV2,
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UART_DEV3,
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} uart_dev_t;
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typedef struct _uart
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{
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union
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{
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volatile uint32_t RBR;
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volatile uint32_t DLL;
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volatile uint32_t THR;
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};
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union
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{
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volatile uint32_t DLH;
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volatile uint32_t IER;
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};
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union
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{
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volatile uint32_t FCR;
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volatile uint32_t IIR;
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};
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volatile uint32_t LCR;
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volatile uint32_t MCR;
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volatile uint32_t LSR;
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volatile uint32_t MSR;
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volatile uint32_t SCR;
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volatile uint32_t LPDLL;
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volatile uint32_t LPDLH;
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volatile uint32_t reserved1[2];
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union
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{
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volatile uint32_t SRBR[16];
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volatile uint32_t STHR[16];
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};
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volatile uint32_t FAR;
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volatile uint32_t TFR;
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volatile uint32_t RFW;
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volatile uint32_t USR;
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volatile uint32_t TFL;
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volatile uint32_t RFL;
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volatile uint32_t SRR;
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volatile uint32_t SRTS;
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volatile uint32_t SBCR;
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volatile uint32_t SDMAM;
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volatile uint32_t SFE;
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volatile uint32_t SRT;
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volatile uint32_t STET;
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volatile uint32_t HTX;
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volatile uint32_t DMASA;
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volatile uint32_t TCR;
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volatile uint32_t DE_EN;
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volatile uint32_t RE_EN;
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volatile uint32_t DET;
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volatile uint32_t TAT;
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volatile uint32_t DLF;
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volatile uint32_t RAR;
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volatile uint32_t TAR;
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volatile uint32_t LCR_EXT;
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volatile uint32_t reserved2[9];
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volatile uint32_t CPR;
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volatile uint32_t UCV;
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volatile uint32_t CTR;
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} uart_t;
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typedef enum _uart_device_number
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{
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UART_DEVICE_1,
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UART_DEVICE_2,
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UART_DEVICE_3,
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UART_DEVICE_MAX,
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} uart_device_number_t;
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typedef enum _uart_bitwidth
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{
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UART_BITWIDTH_5BIT = 5,
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UART_BITWIDTH_6BIT,
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UART_BITWIDTH_7BIT,
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UART_BITWIDTH_8BIT,
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} uart_bitwidth_t;
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typedef enum _uart_stopbit
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{
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UART_STOP_1,
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UART_STOP_1_5,
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UART_STOP_2
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} uart_stopbit_t;
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typedef enum _uart_rede_sel
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{
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DISABLE = 0,
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ENABLE,
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} uart_rede_sel_t;
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typedef enum _uart_parity
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{
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UART_PARITY_NONE,
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UART_PARITY_ODD,
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UART_PARITY_EVEN
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} uart_parity_t;
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typedef enum _uart_interrupt_mode
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{
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UART_SEND = 1,
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UART_RECEIVE = 2,
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} uart_interrupt_mode_t;
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typedef enum _uart_send_trigger
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{
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UART_SEND_FIFO_0,
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UART_SEND_FIFO_2,
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UART_SEND_FIFO_4,
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UART_SEND_FIFO_8,
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} uart_send_trigger_t;
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typedef enum _uart_receive_trigger
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{
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UART_RECEIVE_FIFO_1,
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UART_RECEIVE_FIFO_4,
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UART_RECEIVE_FIFO_8,
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UART_RECEIVE_FIFO_14,
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} uart_receive_trigger_t;
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typedef struct _uart_data_t
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{
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dmac_channel_number_t tx_channel;
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dmac_channel_number_t rx_channel;
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uint32_t *tx_buf;
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size_t tx_len;
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uint32_t *rx_buf;
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size_t rx_len;
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uart_interrupt_mode_t transfer_mode;
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} uart_data_t;
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/**
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* @brief Send data from uart
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*
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* @param[in] channel Uart index
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* @param[in] buffer The data be transfer
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* @param[in] len The data length
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*
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* @return Transfer length
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*/
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int uart_send_data(uart_device_number_t channel, const char *buffer, size_t buf_len);
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/**
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* @brief Read data from uart
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*
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* @param[in] channel Uart index
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* @param[in] buffer The Data received
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* @param[in] len Receive length
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*
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* @return Receive length
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*/
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int uart_receive_data(uart_device_number_t channel, char *buffer, size_t buf_len);
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/**
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* @brief Init uart
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*
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* @param[in] channel Uart index
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*
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*/
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void uart_init(uart_device_number_t channel);
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/**
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* @brief Set uart param
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*
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* @param[in] channel Uart index
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* @param[in] baud_rate Baudrate
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* @param[in] data_width Data width
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* @param[in] stopbit Stop bit
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* @param[in] parity Odd Even parity
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*
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*/
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void uart_config(uart_device_number_t channel, uint32_t baud_rate, uart_bitwidth_t data_width, uart_stopbit_t stopbit, uart_parity_t parity);
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/**
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* @brief Set uart param
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*
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* @param[in] channel Uart index
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* @param[in] baud_rate Baudrate
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* @param[in] data_width Data width
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* @param[in] stopbit Stop bit
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* @param[in] parity Odd Even parity
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*
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*/
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void uart_configure(uart_device_number_t channel, uint32_t baud_rate, uart_bitwidth_t data_width, uart_stopbit_t stopbit, uart_parity_t parity);
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/**
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* @brief Register uart interrupt
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*
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* @param[in] channel Uart index
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* @param[in] interrupt_mode Interrupt Mode receive or send
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* @param[in] uart_callback Call back
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* @param[in] ctx Param of call back
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* @param[in] priority Interrupt priority
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*
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*/
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void uart_irq_register(uart_device_number_t channel, uart_interrupt_mode_t interrupt_mode, plic_irq_callback_t uart_callback, void *ctx, uint32_t priority);
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/**
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* @brief Deregister uart interrupt
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*
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* @param[in] channel Uart index
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* @param[in] interrupt_mode Interrupt Mode receive or send
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*
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*/
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void uart_irq_unregister(uart_device_number_t channel, uart_interrupt_mode_t interrupt_mode);
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/**
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* @brief Set send interrupt threshold
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*
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* @param[in] channel Uart index
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* @param[in] trigger Threshold of send interrupt
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*
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*/
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void uart_set_send_trigger(uart_device_number_t channel, uart_send_trigger_t trigger);
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/**
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* @brief Set receive interrupt threshold
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*
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* @param[in] channel Uart index
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* @param[in] trigger Threshold of receive interrupt
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*
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*/
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void uart_set_receive_trigger(uart_device_number_t channel, uart_receive_trigger_t trigger);
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/**
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* @brief Send data by dma
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*
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* @param[in] channel Uart index
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* @param[in] dmac_channel Dmac channel
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* @param[in] buffer Send data
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* @param[in] buf_len Data length
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*
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*/
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void uart_send_data_dma(uart_device_number_t uart_channel, dmac_channel_number_t dmac_channel, const uint8_t *buffer, size_t buf_len);
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/**
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* @brief Receive data by dma
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*
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* @param[in] channel Uart index
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* @param[in] dmac_channel Dmac channel
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* @param[in] buffer Receive data
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* @param[in] buf_len Data length
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*
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*/
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void uart_receive_data_dma(uart_device_number_t uart_channel, dmac_channel_number_t dmac_channel, uint8_t *buffer, size_t buf_len);
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/**
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* @brief Send data by dma
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*
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* @param[in] uart_channel Uart index
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* @param[in] dmac_channel Dmac channel
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* @param[in] buffer Send data
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* @param[in] buf_len Data length
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* @param[in] uart_callback Call back
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* @param[in] ctx Param of call back
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* @param[in] priority Interrupt priority
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*
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*/
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void uart_send_data_dma_irq(uart_device_number_t uart_channel, dmac_channel_number_t dmac_channel,
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const uint8_t *buffer, size_t buf_len, plic_irq_callback_t uart_callback,
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void *ctx, uint32_t priority);
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/**
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* @brief Receive data by dma
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*
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* @param[in] uart_channel Uart index
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* @param[in] dmac_channel Dmac channel
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* @param[in] buffer Receive data
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* @param[in] buf_len Data length
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* @param[in] uart_callback Call back
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* @param[in] ctx Param of call back
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* @param[in] priority Interrupt priority
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*
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*/
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void uart_receive_data_dma_irq(uart_device_number_t uart_channel, dmac_channel_number_t dmac_channel,
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uint8_t *buffer, size_t buf_len, plic_irq_callback_t uart_callback,
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void *ctx, uint32_t priority);
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/**
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* @brief Uart handle transfer data operations
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*
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* @param[in] uart_channel Uart index
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* @param[in] data Uart data information
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* @param[in] buffer Uart DMA callback
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*
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*/
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void uart_handle_data_dma(uart_device_number_t uart_channel ,uart_data_t data, plic_interrupt_t *cb);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _DRIVER_APBUART_H */
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