linzhida
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6d2a6a5b5b
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coremark: add three smaller tests size with known output.
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2024-08-19 03:22:48 +08:00 |
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Camel Coder
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28c275b0ea
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fix memcpy&memset alignment (#37)
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2024-07-15 11:44:36 +08:00 |
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Xu, Zefan
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5b34ea9384
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countertest: update README
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2024-05-30 13:22:05 +08:00 |
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Xu, Zefan
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8fd8ac1528
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countertest: setup pmp before test
Before switching from M-mode to a lower privilege level, PMP requires that the PMP configuration must be set.
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2024-05-30 13:14:21 +08:00 |
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Xu, Zefan
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f90c6fdcfb
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countertest: support counter-write test
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2024-05-30 12:30:49 +08:00 |
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Xu, Zefan
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8440fe6a15
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countertest: pack the counter-enable tests
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2024-05-29 20:54:35 +08:00 |
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Xu, Zefan
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4f15941e01
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countertest: support counter-inhibit test
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2024-05-29 17:50:38 +08:00 |
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Xu, Zefan
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ee3eb9edda
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countertest: support probe counter before tests
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2024-05-29 12:48:07 +08:00 |
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Xu, Zefan
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6f4db8e1f7
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countertest: support tests for all *counteren
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2024-05-28 22:05:42 +08:00 |
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Xu, Zefan
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8e2aa1de33
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countertest: initial commit for the test framwork
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2024-05-27 21:53:23 +08:00 |
 Yinan Xu
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e8c3cd0701
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Update core_main.c
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2024-02-10 20:14:52 +08:00 |
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Yinan Xu
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7681afcd2b
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Update README.md
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2024-02-08 21:01:59 +08:00 |
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wakafa
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f017fa3a16
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Merge pull request #33 from OpenXiangShan/rename
test: rename test for oraclebp
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2023-10-30 17:21:15 +08:00 |
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wangkaifan
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1556d7ef39
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test: rename test for oraclebp
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2023-10-30 16:25:50 +08:00 |
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xuzefan
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1d5fb08be1
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fix: allow changing iterations from make
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2023-10-27 10:07:32 +08:00 |
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Guokai Chen
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addb491e30
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tests: add oraclebp mmio test (#31)
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2023-05-28 19:57:40 +08:00 |
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William Wang
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4cdfb7b042
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Merge pull request #32 from OpenXiangShan/maprobe-230305
maprobe: add basic lsu microbenchmark
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2023-05-17 16:37:05 +08:00 |
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William Wang
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3ba0a11b57
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maprobe: disable random access test by default
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2023-04-06 17:39:04 +08:00 |
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William Wang
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d19b76e385
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maprobe: fix linear_access asm to support 2 load/cycle
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2023-04-06 16:54:40 +08:00 |
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William Wang
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ceb50bb657
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maprobe: add continuosly access latency test
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2023-04-02 13:26:55 +08:00 |
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William Wang
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fcdbdc0640
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maprobe: add l2_l3_pressure_test & replacement_test
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2023-03-13 18:21:14 +08:00 |
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William Wang
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d903857dd9
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maprobe: generate acpa matrix
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2023-03-07 18:05:58 +08:00 |
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William Wang
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d9b43ff870
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maprobe: let all test return result
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2023-03-07 16:49:47 +08:00 |
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William Wang
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b27f2968b4
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maprobe: support matrix print
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2023-03-07 16:29:44 +08:00 |
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William Wang
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ac66935e15
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maprobe: add basic store test and batch load test
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2023-03-07 14:24:46 +08:00 |
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William Wang
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47fe2bc9d6
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maprobe: fix usage of volatile to avoid extra store
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2023-03-06 18:13:39 +08:00 |
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William Wang
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421b3b8f17
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maprobe: add linear read, random read, l-l vio test
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2023-03-06 17:20:30 +08:00 |
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William Wang
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4f4982b1a1
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apps,maprobe: reorg maprobe files
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2023-03-05 16:05:30 +08:00 |
|
Haoyuan Feng
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20be83d0e6
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Merge pull request #30 from OpenXiangShan/fix-sv39
tests, sv39: should sfence before test
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2023-02-19 21:14:15 +08:00 |
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good-circle
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6211ffb16e
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tests, sv39: should sfence before test
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2023-02-19 21:12:54 +08:00 |
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bugGenerator
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3f2d7d7cdf
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tests: add riscv64 ppn access fault test (#29)
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2023-02-05 09:37:33 +08:00 |
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good-circle
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1e2b038eb1
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tests: add riscv64 ppn access fault test
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2023-02-04 16:02:38 +08:00 |
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Yinan Xu
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7a156413c1
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extintr: add one to PLIC enable bit
PLIC interrupt number starts at 1 instead of 0.
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2022-11-17 21:48:56 +08:00 |
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Yinan Xu
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aa2b97f99d
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extintr: shrink test case size
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2022-11-16 17:24:11 +08:00 |
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Yinan Xu
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5bee478a7f
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xs: fix the offset of random bits in intrGen
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2022-11-16 17:23:41 +08:00 |
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Yinan Xu
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856ad74412
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extintr: manually enable the WFI instruction
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2022-11-16 16:56:16 +08:00 |
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Yinan Xu
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465c6d398a
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xs: fix the number of external interrupts
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2022-11-16 16:55:09 +08:00 |
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Yinan Xu
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536580b49f
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cte: disable printf in SEIP handler
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2022-11-16 16:54:46 +08:00 |
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William Wang
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72904e12d2
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tests,sv39: fix southlake compiling breakage
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2022-11-07 18:18:00 +08:00 |
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Guokai Chen
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2660786ba7
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Merge pull request #23 from OpenXiangShan/fix-s-timer
arch,riscv: fix supervisor timer interrupt
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2022-11-07 17:25:51 +08:00 |
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Guokai Chen
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ca39c0e3f1
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arch,riscv: fix supervisor timer interrupt
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2022-11-07 17:18:16 +08:00 |
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William Wang
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67e4e75079
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Merge pull request #21 from OpenXiangShan/merge-southlake
Add drivers and tests for southlake
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2022-11-03 20:12:08 +08:00 |
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William Wang
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e495761765
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Merge pull request #20 from OpenXiangShan/extra-pmp-test
Add extra RISC-V PMP tests
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2022-11-03 20:09:13 +08:00 |
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William Wang
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f77baf5fad
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Merge branch 'southlake'
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2022-11-03 20:08:26 +08:00 |
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William Wang
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175e8de348
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tests: add test_mem_throughput_same_set
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2022-11-03 19:58:04 +08:00 |
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William Wang
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f5e7537ad5
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tests: add riscv64 hugepage-pmp-atom mixed test
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2022-10-29 23:11:48 +08:00 |
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William Wang
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926cbae137
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tests,pmp: fix riscv64-xs pmp test
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2022-10-27 22:07:36 +08:00 |
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lixin
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cac71287d0
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tests: add an aliasgenerator test
* used to test nanhu's alias mechanism
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2022-10-12 21:07:14 +08:00 |
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Ziyue Zhang
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d7af67a645
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tests: add a script to build bitmanip test
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2022-10-05 20:06:27 +08:00 |
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William Wang
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e884a91012
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boot: init fregs after fp csr init
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2022-09-01 11:38:51 +08:00 |