split x86-32 and x86-64 trap.S

am/arch/x86_32-qemu.mk

@@ -1,7 +1,7 @@
 include $(AM_HOME)/am/arch/isa/x86.mk
 
 AM_SRCS   := x86_64/qemu/start.S \
-             x86_64/qemu/trap.S \
+             x86_64/qemu/trap32.S \
              x86_64/qemu/trm.c \
              x86_64/qemu/cte.c \
              x86_64/qemu/ioe.c \

am/arch/x86_64-qemu.mk

@@ -1,7 +1,7 @@
 include $(AM_HOME)/am/arch/isa/x86_64.mk
 
 AM_SRCS   := x86_64/qemu/start.S \
-             x86_64/qemu/trap.S \
+             x86_64/qemu/trap64.S \
              x86_64/qemu/trm.c \
              x86_64/qemu/cte.c \
              x86_64/qemu/ioe.c \

am/include/arch/x86_32-qemu.h

@@ -3,7 +3,7 @@
 
 struct _Context {
   struct _AddressSpace *uvm;
-  uint32_t eax, ebx, ecx, edx,
+  uint32_t ds, eax, ebx, ecx, edx,
            esi, edi, ebp,
            eip, cs, eflags, esp, ss;
 };

am/include/arch/x86_64-qemu.h

@@ -8,7 +8,7 @@ struct _Context {
            r8, r9, r10, r11,
            r12, r13, r14, r15,
            rip, cs, rflags,
-           rsp0, ss0, rsp, ss;
+           rsp, ss, rsp0, ss0;
 };
 
 

am/src/x86_64/qemu/cte.c

@@ -12,6 +12,7 @@
 
 void irq_x86(struct trap_frame *tf) {
   _Context ctx;
+  printf("[%d/%d] ", tf->irq, _cpu());
 
 #if __x86_64
   ctx        = tf->saved_context;
@@ -20,9 +21,12 @@ void irq_x86(struct trap_frame *tf) {
   ctx.rflags = tf->rflags;
   ctx.rsp    = tf->rsp;
   ctx.ss     = tf->ss;
+
+  /*
   dump(rax); dump(rbx); dump(rcx); dump(rdx); dump(rbp); dump(rsp); dump(rsi); dump(rdi);
   dump(r8); dump(r9); dump(r10); dump(r11); dump(r12); dump(r13); dump(r14); dump(r15);
   dump(cs); dump(ss); dump(rip); dump(rflags);
+  */
 #else
   ctx     = tf->saved_context;
   ctx.eip = tf->eip;
@@ -35,7 +39,8 @@ void irq_x86(struct trap_frame *tf) {
   }
 
   dump(eax); dump(ebx); dump(ecx); dump(edx); 
-  dump(ebp); dump(esp); dump(esi); dump(edi); dump(cs); dump(eip); dump(eflags); 
+  dump(ebp); dump(esp); dump(esi); dump(edi);
+  dump(cs); dump(ds); dump(eip); dump(eflags); 
 #endif
 
   if (IRQ 0 <= tf->irq && tf->irq < IRQ 32) {

am/src/x86_64/qemu/trap32.S

@@ -0,0 +1,50 @@
+#include <x86.h>
+
+trap:
+  cli
+
+  subl $20, %esp
+  pushl %ebp
+  pushl %edi
+  pushl %esi
+  pushl %edx
+  pushl %ecx
+  pushl %ebx
+  pushl %eax
+  movw %ds, %ax
+  pushl %ax
+  pushl $0  // uvm
+
+  movw $KSEL(SEG_KDATA), %ax
+  movw %ax, %ds
+  movw %ax, %es
+  movw %ax, %ss
+
+  pushl %esp
+  call am_on_irq
+
+__am_iret:
+  movl 
+  addl $4, %esp
+  popl %eax
+  movl %eax, %esp
+
+  addl $4, %esp
+  popl %eax
+  movw %ax, %ds
+  movw %ax, %es
+  popl %eax
+  popl %ebx
+  popl %ecx
+  popl %edx
+  popl %esi
+  popl %edi
+  popl %ebp
+  iret
+
+#define NOERR     push $0
+#define ERR
+#define IRQ_DEF(id, dpl, err) \
+  .globl __am_irq##id; __am_irq##id: cli;      err; push $id; jmp trap;
+IRQS(IRQ_DEF)
+  .globl  __am_irqall;  __am_irqall: cli; push $0; push $-1; jmp trap;

am/src/x86_64/qemu/trap64.S

@@ -3,7 +3,6 @@
 trap:
   cli
 
-#if __x86_64__
   subq $56, %rsp
 
   pushq %r15
@@ -26,34 +25,26 @@ trap:
   movq %rsp, %rdi
   call am_on_irq
 
-#else
-  subl $20, %esp
-  pushl %ebp
-  pushl %edi
-  pushl %esi
-  pushl %edx
-  pushl %ecx
-  pushl %ebx
-  pushl %eax
-  pushl $0  // uvm
-
-  movw $KSEL(SEG_KDATA), %ax
-  movw %ax, %ds
-  movw %ax, %es
-  movw %ax, %ss
-
-  pushl %esp
-  call am_on_irq
-#endif
-
 .globl __am_iret
 __am_iret:
-  jmp __am_iret
-#if __x86_64__
+  movq %rdi, %rsp
+  addq $8, %rsp
+  popq %rax
+  popq %rbx
+  popq %rcx
+  popq %rdx
+  popq %rbp
+  popq %rsi
+  popq %rdi
+  popq %r8
+  popq %r9
+  popq %r10
+  popq %r11
+  popq %r12
+  popq %r13
+  popq %r14
+  popq %r15
   iretq
-#else
-  iret
-#endif
 
 #define NOERR     push $0
 #define ERR

tests/hello/hello.c

@@ -13,6 +13,8 @@ _Context *on_intr(_Event ev, _Context *ctx) {
 void foo() {
   _intr_write(1);
   while (1) { 
+//    for (volatile int i = 0; i < 100000; i++);
+//    printf(".");
 //    asm volatile("int $0x80");
   }
 }

tests/hello/x64.gdb

@@ -4,6 +4,5 @@ layout regs
 set pagination off
 set confirm off
 file build/hello-x86_64-qemu.o
-b _start64
-b _start
+b __am_iret
 c