trace code

.gitignore

@@ -1,8 +1,22 @@
+*.*
+*
+!*/
+!Makefile
+!*.mk
+!*.scala
+!*.[cSh]
+!*.v
+!*.cpp
+!*.cc
+!.gitignore
+!.scalafmt.conf
+!build.sc
+!README.md
+build/
+
 # mill
 out/
 .bsp/
 .idea/
 .idea_modules/
 test_run_dir/
-
-build/

Makefile

@@ -6,6 +6,7 @@ test:
 	mill -i $(PRJ).test
 
 verilog:
+	$(call git_commit, "generate verilog")
 	mkdir -p $(BUILD_DIR)
 	mill -i $(PRJ).runMain Elaborate -td $(BUILD_DIR)
 
@@ -22,3 +23,9 @@ clean:
 	-rm -rf $(BUILD_DIR)
 
 .PHONY: test verilog help reformat checkformat clean
+
+sim:
+	$(call git_commit, "sim RTL") # DO NOT REMOVE THIS LINE!!!
+	@echo "Write this Makefile by yourself."
+
+-include ../Makefile